Docs: Update for release FEX-2508.1

this provokes RA spilling and hit an assertion fail on main.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

.clang-format

@@ -32,7 +32,7 @@ AttributeMacros:
 BinPackArguments: true
 BinPackParameters: true
 BitFieldColonSpacing: Both
-BreakAfterAttributes: Always # clang 16 required
+BreakAfterAttributes: Leave
 BreakBeforeBraces: Attach
 BreakBeforeBinaryOperators: None
 BreakBeforeInlineASMColon: OnlyMultiline # clang 16 required
@@ -60,7 +60,7 @@ IndentRequires: false
 IndentWidth: 2
 InsertBraces: true
 KeepEmptyLinesAtTheStartOfBlocks: true
-LambdaBodyIndentation: OuterScope
+LambdaBodyIndentation: Signature
 LineEnding: LF # clang 16 required
 MaxEmptyLinesToKeep: 2
 NamespaceIndentation: Inner

.clang-format-ignore

@@ -1,10 +1,4 @@
 # This file is used to ignore files and directories from clang-format
-
-# Ignore all files in the External directory
-External/*
-
-# SoftFloat-3e code doesn't belong to us
-FEXCore/Source/Common/SoftFloat-3e/*
 Source/Common/cpp-optparse/*
 
 # Files with human-indented tables for readability - don't mess with these

.git-blame-ignore-revs

@@ -16,3 +16,7 @@
 
 # Reformat of CodeEmitter inl files
 8760c593ece92d7e9fa94c40da0368fd367c9cad
+
+# Whole-tree reformat with clang-format-19
+5267cde60e7642852d18f20ae8568643bb5293d5
+

.github/workflows/mingw_build.yml

@@ -78,7 +78,7 @@ jobs:
       # Note the current convention is to use the -S and -B options here to specify source
       # and build directories, but this is only available with CMake 3.13 and higher.
       # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/toolchain_mingw.cmake -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/Data/CMake/toolchain_mingw.cmake -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
 
     - name: Build
       working-directory: ${{runner.workspace}}/build

.github/workflows/pr-code-format.yml

@@ -28,7 +28,7 @@ jobs:
 
       - name: Get changed files
         id: changed-files
-        uses: tj-actions/changed-files@v39
+        uses: step-security/changed-files@3dbe17c78367e7d60f00d78ae6781a35be47b4a1 # v45.0.1
         with:
           separator: ","
           skip_initial_fetch: true
@@ -40,11 +40,8 @@ jobs:
           echo "Formatting files:"
           echo "$CHANGED_FILES"
 
-      - name: Check for correct clang-format version
-        run: clang-format --version | grep -qF '16.0.6'
-
-      - name: Check git-clang-format-16 exists
-        run: which git-clang-format-16
+      - name: Check git-clang-format-19 exists
+        run: which git-clang-format-19
 
       - name: Setup Python env
         uses: actions/setup-python@v4
@@ -58,19 +55,16 @@ jobs:
 
       - name: Run code formatter
         env:
-          CLANG_FORMAT_PATH: 'git-clang-format-16'
+          CLANG_FORMAT_PATH: 'git-clang-format-19'
           GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
           START_REV: ${{ github.event.pull_request.base.sha }}
           END_REV: ${{ github.event.pull_request.head.sha }}
           CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
-        # TODO(pmatos): Once we adopt v18, we should be able
-        # to take advantage of the new --diff_from_common_commit option
-        # explicitly in code-format-helper.py and not have to diff starting at
-        # the merge base.
+        # Using --diff_from_common_commit option available in clang-format-19
         run: |
           python ./External/code-format-helper/code-format-helper.py \
             --repo "FEX-emu/FEX" \
             --issue-number $GITHUB_PR_NUMBER \
-            --start-rev $(git merge-base $START_REV $END_REV) \
+            --start-rev $START_REV \
             --end-rev $END_REV \
             --changed-files "$CHANGED_FILES"

.github/workflows/wine_dll_artifacts.yml

@@ -0,0 +1,88 @@
+name: Wine DLL artifacts
+
+on:
+  push:
+    branches:
+      - main
+
+env:
+  BUILD_TYPE: Release
+
+jobs:
+  wine_dll_artifacts:
+    runs-on: ${{ matrix.arch }}
+    strategy:
+      matrix:
+        arch: [[self-hosted, ARM64, mingw]]
+      fail-fast: false
+
+    steps:
+    - uses: actions/checkout@v3
+
+    - name: Add MingGW to PATH
+      run: echo "$HOME/llvm-mingw/build/bin/" >> $GITHUB_PATH
+
+    - name : submodule checkout
+      # Need to update submodules
+      run: |
+        git submodule sync --recursive
+        git submodule update --init --depth 1
+
+    - name: Clean install directory
+      run: |
+        rm -Rf ${{runner.workspace}}/build_install
+        mkdir ${{runner.workspace}}/build_install
+
+    - name: Clean Build Environment
+      run: |
+        rm -Rf ${{runner.workspace}}/build_arm64ec
+        rm -Rf ${{runner.workspace}}/build_wow64
+
+    - name: Create Build Environment arm64ec
+      run: |
+        cmake -E make_directory ${{runner.workspace}}/build_arm64ec
+        cmake -E make_directory ${{runner.workspace}}/build_wow64
+
+    - name: Configure CMake arm64ec
+      shell: bash
+      working-directory: ${{runner.workspace}}/build_arm64ec
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/Data/CMake/toolchain_mingw.cmake -DMINGW_TRIPLE=arm64ec-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=False -DENABLE_JEMALLOC_GLIBC_ALLOC=False -DCMAKE_INSTALL_PREFIX=/usr -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=/usr
+
+    - name: Configure CMake wow64
+      shell: bash
+      working-directory: ${{runner.workspace}}/build_wow64
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/Data/CMake/toolchain_mingw.cmake -DMINGW_TRIPLE=aarch64-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=False -DENABLE_JEMALLOC_GLIBC_ALLOC=False -DCMAKE_INSTALL_PREFIX=/usr -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=/usr
+
+    - name: Build arm64ec
+      working-directory: ${{runner.workspace}}/build_arm64ec
+      shell: bash
+      run: cmake --build . --config $BUILD_TYPE
+
+    - name: install arm64ec
+      working-directory: ${{runner.workspace}}/build_arm64ec
+      shell: bash
+      env:
+        DESTDIR: ${{runner.workspace}}/build_install
+      run: cmake --build . --config $BUILD_TYPE -t install
+
+    - name: Build wow64
+      working-directory: ${{runner.workspace}}/build_wow64
+      shell: bash
+      run: cmake --build . --config $BUILD_TYPE
+
+    - name: install wow64
+      working-directory: ${{runner.workspace}}/build_wow64
+      shell: bash
+      env:
+        DESTDIR: ${{runner.workspace}}/build_install
+      run: cmake --build . --config $BUILD_TYPE -t install
+
+    - name: Upload libraries
+      uses: 'actions/upload-artifact@v4'
+      timeout-minutes: 1
+      with:
+        overwrite: true
+        name: wine_dll_artifacts
+        path: ${{runner.workspace}}/build_install/usr/lib/wine/aarch64-windows/lib*.dll
+        retention-days: 60
+        compression-level: 9

.gitmodules

@@ -5,10 +5,6 @@
 [submodule "External/cpp-optparse"]
 	path = Source/Common/cpp-optparse
 	url = https://github.com/Sonicadvance1/cpp-optparse
-[submodule "External/xbyak"]
-  shallow = true
-	path = External/xbyak
-	url = https://github.com/herumi/xbyak.git
 [submodule "External/fex-posixtest-bins"]
   shallow = true
 	path = External/fex-posixtest-bins

CMakeLists.txt

@@ -13,6 +13,7 @@ option(ENABLE_IWYU "Enables include what you use program" FALSE)
 option(ENABLE_LTO "Enable LTO with compilation" TRUE)
 option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE)
 set(USE_LINKER "" CACHE STRING "Allow overriding the linker path directly")
+option(ENABLE_UBSAN "Enables Clang UBSAN" FALSE)
 option(ENABLE_ASAN "Enables Clang ASAN" FALSE)
 option(ENABLE_TSAN "Enables Clang TSAN" FALSE)
 option(ENABLE_COVERAGE "Enables Coverage" FALSE)
@@ -34,10 +35,19 @@ set (FEXCORE_PROFILER_BACKEND "gpuvis" CACHE STRING "Set which backend to use fo
 option(ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT "Enables glibc memory allocation hooking with fault for CI testing")
 option(USE_PDB_DEBUGINFO "Builds debug info in PDB format" FALSE)
 
-set (X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686")
-set (X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64")
+set (X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686")
+set (X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64")
 set (X86_DEV_ROOTFS "/" CACHE FILEPATH "Path to the sysroot used for cross-compiling for i686 and x86_64")
-set (DATA_DIRECTORY "${CMAKE_INSTALL_PREFIX}/share/fex-emu" CACHE PATH "global data directory")
+set (DATA_DIRECTORY "" CACHE PATH "Global data directory (override)")
+set (HOSTLIBS_DATA_DIRECTORY "" CACHE PATH "Global data directory (override)")
+if (NOT DATA_DIRECTORY)
+  set (DATA_DIRECTORY "${CMAKE_INSTALL_PREFIX}/share/fex-emu")
+endif()
+
+include(GNUInstallDirs)
+if (NOT HOSTLIBS_DATA_DIRECTORY)
+  set(HOSTLIBS_DATA_DIRECTORY "${CMAKE_INSTALL_FULL_LIBDIR}/fex-emu")
+endif()
 
 string(FIND ${CMAKE_BASE_NAME} mingw CONTAINS_MINGW)
 if (NOT CONTAINS_MINGW EQUAL -1)
@@ -93,7 +103,7 @@ endif()
 # uninstall target
 if(NOT TARGET uninstall)
   configure_file(
-    "${CMAKE_CURRENT_SOURCE_DIR}/CMakeFiles/cmake_uninstall.cmake.in"
+    "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/cmake_uninstall.cmake.in"
     "${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/cmake_uninstall.cmake"
     IMMEDIATE @ONLY)
 
@@ -228,6 +238,19 @@ if (NOT ENABLE_OFFLINE_TELEMETRY)
   add_definitions(-DFEX_DISABLE_TELEMETRY=1)
 endif()
 
+if (ENABLE_UBSAN)
+  # See https://github.com/FEX-Emu/FEX/pull/4494#issuecomment-2800608944
+  # and related discussion for the use of -fno-sanitize=alignment -fno-sanitize=function
+  # with UBSAN.
+  # alignment: we don't follow a strict alignment policy, for example IR uses packed structs
+  # that are regularly access unaligned.
+  # function: syscalls cast function pointers to void (*)(unsigned long...), causing warnings
+  # related to this access.
+  add_definitions(-DENABLE_UBSAN=1)
+  add_compile_options(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined)
+  link_libraries(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined)
+endif()
+
 if (ENABLE_ASAN)
   add_definitions(-DENABLE_ASAN=1)
   add_compile_options(-fno-omit-frame-pointer -fsanitize=address -fsanitize-address-use-after-scope)
@@ -384,15 +407,18 @@ if (TUNE_CPU STREQUAL "native")
         list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=native")
       endif()
     else()
-      # Due to an oversight in llvm, it declares any reasonably new Kryo CPU to only be ARMv8.0
-      # Manually detect newer CPU revisions until clang and llvm fixes their bug
-      # This script will either provide a supported CPU or 'native'
-      # Additionally -march doesn't work under AArch64+Clang, so you have to use -mcpu or -mtune
       execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/aarch64_fit_native.py" "/proc/cpuinfo" "${CMAKE_CXX_COMPILER_VERSION}"
         OUTPUT_VARIABLE AARCH64_CPU)
 
       string(STRIP ${AARCH64_CPU} AARCH64_CPU)
 
+      execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/NeedDisabledSVE.py"
+        RESULT_VARIABLE NEEDS_SVE_DISABLED)
+      if (NEEDS_SVE_DISABLED)
+        message(STATUS "Platform has bugged SVE. Disabling")
+        set(AARCH64_CPU "cortex-a78")
+      endif()
+
       check_cxx_compiler_flag("-mcpu=${AARCH64_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
       if(COMPILER_SUPPORTS_CPU_TYPE)
         list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${AARCH64_CPU}")
@@ -404,7 +430,7 @@ if (TUNE_CPU STREQUAL "native")
       list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=native")
     endif()
   endif()
-else()
+elseif (NOT TUNE_CPU STREQUAL "none")
   check_cxx_compiler_flag("-mcpu=${TUNE_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
   if(COMPILER_SUPPORTS_CPU_TYPE)
     list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${TUNE_CPU}")
@@ -423,10 +449,6 @@ endif()
 
 add_compile_options(-Wall)
 
-configure_file(
-  ${CMAKE_CURRENT_SOURCE_DIR}/include/Config.h.in
-  ${CMAKE_BINARY_DIR}/generated/ConfigDefines.h)
-
 include(CTest)
 if (BUILD_TESTS)
   message(STATUS "Unit tests are enabled")
@@ -444,6 +466,8 @@ if (BUILD_TESTS)
   set(TEST_JOB_FLAG "-j${TEST_JOB_COUNT}")
 endif()
 
+add_subdirectory(External/SoftFloat-3e/)
+add_subdirectory(External/cephes/)
 add_subdirectory(FEXHeaderUtils/)
 add_subdirectory(CodeEmitter/)
 add_subdirectory(FEXCore/)
@@ -607,12 +631,12 @@ set (CPACK_PACKAGE_CONTACT "FEX-Emu Maintainers <team@fex-emu.com>")
 set (CPACK_PACKAGE_VERSION_MAJOR "${FEX_VERSION_MAJOR}")
 set (CPACK_PACKAGE_VERSION_MINOR "${FEX_VERSION_MINOR}")
 set (CPACK_PACKAGE_VERSION_PATCH "${FEX_VERSION_PATCH}")
-set (CPACK_PACKAGE_DESCRIPTION_FILE "${CMAKE_CURRENT_SOURCE_DIR}/CPack/Description.txt")
+set (CPACK_PACKAGE_DESCRIPTION_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/CPack/Description.txt")
 
 # Debian defines
 set (CPACK_DEBIAN_PACKAGE_DEPENDS "libc6, libstdc++6, libepoxy0, libsdl2-2.0-0, libegl1, libx11-6, squashfuse")
 set (CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA
-  "${CMAKE_CURRENT_SOURCE_DIR}/CPack/postinst;${CMAKE_CURRENT_SOURCE_DIR}/CPack/prerm;${CMAKE_CURRENT_SOURCE_DIR}/CPack/triggers")
+  "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/CPack/postinst;${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/CPack/prerm;${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/CPack/triggers")
 if (CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
   # binfmt_misc conflicts with qemu-user-static
   # We also only install binfmt_misc on aarch64 hosts

CPack/Description.txt

@@ -1,3 +0,0 @@
-x86 and x86-64 Linux emulator
-
-FEX is very much work in progress, so expect things to change.

CodeEmitter/CodeEmitter/Buffer.h

@@ -3,6 +3,7 @@
 #include <cstddef>
 #include <cstdint>
 #include <cstring>
+#include <type_traits>
 
 namespace ARMEmitter {
 class Buffer {
@@ -21,42 +22,38 @@ public:
     Size = BaseSize;
   }
 
+  template<typename T>
+  requires (std::is_trivially_copyable_v<T>)
+  void dcn(const T& Data) {
+    std::memcpy(CurrentOffset, &Data, sizeof(Data));
+    CurrentOffset += sizeof(Data);
+  }
   void dc8(uint8_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
+    dcn(Data);
   }
-
   void dc16(uint16_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
+    dcn(Data);
   }
-
   void dc32(uint32_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
+    dcn(Data);
+  }
+  void dc64(uint64_t Data) {
+    dcn(Data);
   }
 
-  void dc64(uint64_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
   void EmitString(const char* String) {
     const auto StringLength = strlen(String);
     memcpy(CurrentOffset, String, StringLength);
     CurrentOffset += StringLength;
   }
 
-  void Align() {
-    // Align the buffer to instruction size
-    auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & 0b11;
+  void Align(size_t Size = 4) {
+    // Align the buffer to provided size.
+    auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & (Size - 1);
     if (!CurrentAlignment) {
       return;
     }
-    CurrentOffset += 4 - CurrentAlignment;
+    CurrentOffset += Size - CurrentAlignment;
   }
 
   template<typename T>

CodeEmitter/CodeEmitter/Emitter.h

@@ -86,6 +86,14 @@ constexpr size_t SubRegSizeInBits(SubRegSize size) {
   return size_t {8} << FEXCore::ToUnderlying(size);
 }
 
+// Many floating point operations constrain their element sizes to the
+// main three float sizes half, single, and double precision. This just
+// combines all the checks together for brevity.
+[[nodiscard]]
+constexpr bool IsStandardFloatSize(SubRegSize size) {
+  return size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit;
+}
+
 /* This `ScalarRegSize` enum is used for most scalar float
  * operations.
  *
@@ -355,6 +363,7 @@ enum class SystemRegister : uint32_t {
   TPIDRRO_EL0 = GenSystemReg<0b11, 0b011, 0b1101, 0b0000, 0b011>,
   CNTFRQ_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b000>,
   CNTVCT_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b010>,
+  CNTVCTSS_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b110>,
 };
 
 template<uint32_t op1, uint32_t CRm, uint32_t op2>
@@ -572,6 +581,10 @@ enum class Rotation : uint32_t {
 template<typename T>
 concept IsXOrWRegister = std::is_same_v<T, XRegister> || std::is_same_v<T, WRegister>;
 
+// Concept for contraining some instructions to accept only a QRegister or DRegister.
+template<typename T>
+concept IsQOrDRegister = std::is_same_v<T, QRegister> || std::is_same_v<T, DRegister>;
+
 // Whether or not a given set of vector registers are sequential
 // in increasing order as far as the register file is concerned (modulo its size)
 //

CodeEmitter/CodeEmitter/LoadstoreOps.inl

@@ -416,8 +416,7 @@ public:
         0;
     ASIMDSTLD<size, true, 1>(Op, Opcode, rt, Index, rn, Reg::r0);
   }
-  template<SubRegSize size, typename T>
-  requires (std::is_same_v<QRegister, T> || std::is_same_v<DRegister, T>)
+  template<SubRegSize size, IsQOrDRegister T>
   void ld1r(T rt, Register rn) {
     constexpr uint32_t Op = 0b0000'1101'000 << 21;
     constexpr uint32_t Opcode = 0b110;
@@ -435,8 +434,7 @@ public:
         0;
     ASIMDSTLD<size, true, 2>(Op, Opcode, rt, Index, rn, Reg::r0);
   }
-  template<SubRegSize size, typename T>
-  requires (std::is_same_v<QRegister, T> || std::is_same_v<DRegister, T>)
+  template<SubRegSize size, IsQOrDRegister T>
   void ld2r(T rt, T rt2, Register rn) {
     LOGMAN_THROW_A_FMT(AreVectorsSequential(rt, rt2), "rt and rt2 must be sequential");
     constexpr uint32_t Op = 0b0000'1101'000 << 21;
@@ -455,8 +453,7 @@ public:
         0;
     ASIMDSTLD<size, true, 3>(Op, Opcode, rt, Index, rn, Reg::r0);
   }
-  template<SubRegSize size, typename T>
-  requires (std::is_same_v<QRegister, T> || std::is_same_v<DRegister, T>)
+  template<SubRegSize size, IsQOrDRegister T>
   void ld3r(T rt, T rt2, T rt3, Register rn) {
     LOGMAN_THROW_A_FMT(AreVectorsSequential(rt, rt2, rt3), "rt, rt2, and rt3 must be sequential");
     constexpr uint32_t Op = 0b0000'1101'000 << 21;
@@ -475,8 +472,7 @@ public:
         0;
     ASIMDSTLD<size, true, 4>(Op, Opcode, rt, Index, rn, Reg::r0);
   }
-  template<SubRegSize size, typename T>
-  requires (std::is_same_v<QRegister, T> || std::is_same_v<DRegister, T>)
+  template<SubRegSize size, IsQOrDRegister T>
   void ld4r(T rt, T rt2, T rt3, T rt4, Register rn) {
     LOGMAN_THROW_A_FMT(AreVectorsSequential(rt, rt2, rt3, rt4), "rt, rt2, rt3, and rt4 must be sequential");
     constexpr uint32_t Op = 0b0000'1101'000 << 21;
@@ -1652,8 +1648,8 @@ public:
   template<typename T>
   void ASIMDLoadStoreSinglePost(uint32_t Op, uint32_t Q, uint32_t L, uint32_t R, uint32_t opcode, uint32_t S, uint32_t size,
                                 ARMEmitter::Register rm, ARMEmitter::Register rn, T rt) {
-    LOGMAN_THROW_A_FMT(std::is_same_v<ARMEmitter::QRegister, T> || std::is_same_v<ARMEmitter::DRegister, T>, "Only supports 128-bit and "
-                                                                                                             "64-bit vector registers.");
+    LOGMAN_THROW_A_FMT((std::is_same_v<ARMEmitter::QRegister, T> || std::is_same_v<ARMEmitter::DRegister, T>), "Only supports 128-bit and "
+                                                                                                               "64-bit vector registers.");
     uint32_t Instr = Op;
 
     Instr |= Q << 30;
@@ -2136,7 +2132,370 @@ public:
   }
 
   // Memory copy/set
-  // TODO
+  void cpyfp(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0000, rs, rn, rd);
+  }
+  void cpyfm(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0000, rs, rn, rd);
+  }
+  void cpyfe(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0000, rs, rn, rd);
+  }
+  void cpyfpwt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0001, rs, rn, rd);
+  }
+  void cpyfmwt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0001, rs, rn, rd);
+  }
+  void cpyfewt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0001, rs, rn, rd);
+  }
+  void cpyfprt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0010, rs, rn, rd);
+  }
+  void cpyfmrt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0010, rs, rn, rd);
+  }
+  void cpyfert(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0010, rs, rn, rd);
+  }
+  void cpyfpt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0011, rs, rn, rd);
+  }
+  void cpyfmt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0011, rs, rn, rd);
+  }
+  void cpyfet(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0011, rs, rn, rd);
+  }
+  void cpyfpwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0100, rs, rn, rd);
+  }
+  void cpyfmwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0100, rs, rn, rd);
+  }
+  void cpyfewn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0100, rs, rn, rd);
+  }
+  void cpyfpwtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0101, rs, rn, rd);
+  }
+  void cpyfmwtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0101, rs, rn, rd);
+  }
+  void cpyfewtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0101, rs, rn, rd);
+  }
+  void cpyfprtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0110, rs, rn, rd);
+  }
+  void cpyfmrtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0110, rs, rn, rd);
+  }
+  void cpyfertwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0110, rs, rn, rd);
+  }
+  void cpyfptwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b0111, rs, rn, rd);
+  }
+  void cpyfmtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b0111, rs, rn, rd);
+  }
+  void cpyfetwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b0111, rs, rn, rd);
+  }
+  void cpyfprn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1000, rs, rn, rd);
+  }
+  void cpyfmrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1000, rs, rn, rd);
+  }
+  void cpyfern(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1000, rs, rn, rd);
+  }
+  void cpyfpwtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1001, rs, rn, rd);
+  }
+  void cpyfmwtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1001, rs, rn, rd);
+  }
+  void cpyfewtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1001, rs, rn, rd);
+  }
+  void cpyfprtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1010, rs, rn, rd);
+  }
+  void cpyfmrtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1010, rs, rn, rd);
+  }
+  void cpyfertrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1010, rs, rn, rd);
+  }
+  void cpyfptrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1011, rs, rn, rd);
+  }
+  void cpyfmtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1011, rs, rn, rd);
+  }
+  void cpyfetrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1011, rs, rn, rd);
+  }
+  void cpyfpn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1100, rs, rn, rd);
+  }
+  void cpyfmn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1100, rs, rn, rd);
+  }
+  void cpyfen(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1100, rs, rn, rd);
+  }
+  void cpyfpwtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1101, rs, rn, rd);
+  }
+  void cpyfmwtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1101, rs, rn, rd);
+  }
+  void cpyfewtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1101, rs, rn, rd);
+  }
+  void cpyfprtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1110, rs, rn, rd);
+  }
+  void cpyfmrtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1110, rs, rn, rd);
+  }
+  void cpyfertn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1110, rs, rn, rd);
+  }
+  void cpyfptn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b00, 0b1111, rs, rn, rd);
+  }
+  void cpyfmtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b01, 0b1111, rs, rn, rd);
+  }
+  void cpyfetn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 0, 0b10, 0b1111, rs, rn, rd);
+  }
+
+  void setp(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0000, rs, rn, rd);
+  }
+  void setm(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0100, rs, rn, rd);
+  }
+  void sete(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b1000, rs, rn, rd);
+  }
+  void setpt(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0001, rs, rn, rd);
+  }
+  void setmt(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0101, rs, rn, rd);
+  }
+  void setet(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b1001, rs, rn, rd);
+  }
+  void setpn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0010, rs, rn, rd);
+  }
+  void setmn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0110, rs, rn, rd);
+  }
+  void seten(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b1010, rs, rn, rd);
+  }
+  void setptn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0011, rs, rn, rd);
+  }
+  void setmtn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b0111, rs, rn, rd);
+  }
+  void setetn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 0, 0b11, 0b1011, rs, rn, rd);
+  }
+
+  void cpyp(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0000, rs, rn, rd);
+  }
+  void cpym(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0000, rs, rn, rd);
+  }
+  void cpye(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0000, rs, rn, rd);
+  }
+  void cpypwt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0001, rs, rn, rd);
+  }
+  void cpymwt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0001, rs, rn, rd);
+  }
+  void cpyewt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0001, rs, rn, rd);
+  }
+  void cpyprt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0010, rs, rn, rd);
+  }
+  void cpymrt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0010, rs, rn, rd);
+  }
+  void cpyert(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0010, rs, rn, rd);
+  }
+  void cpypt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0011, rs, rn, rd);
+  }
+  void cpymt(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0011, rs, rn, rd);
+  }
+  void cpyet(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0011, rs, rn, rd);
+  }
+  void cpypwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0100, rs, rn, rd);
+  }
+  void cpymwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0100, rs, rn, rd);
+  }
+  void cpyewn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0100, rs, rn, rd);
+  }
+  void cpypwtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0101, rs, rn, rd);
+  }
+  void cpymwtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0101, rs, rn, rd);
+  }
+  void cpyewtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0101, rs, rn, rd);
+  }
+  void cpyprtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0110, rs, rn, rd);
+  }
+  void cpymrtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0110, rs, rn, rd);
+  }
+  void cpyertwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0110, rs, rn, rd);
+  }
+  void cpyptwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b0111, rs, rn, rd);
+  }
+  void cpymtwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b0111, rs, rn, rd);
+  }
+  void cpyetwn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b0111, rs, rn, rd);
+  }
+  void cpyprn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1000, rs, rn, rd);
+  }
+  void cpymrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1000, rs, rn, rd);
+  }
+  void cpyern(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1000, rs, rn, rd);
+  }
+  void cpypwtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1001, rs, rn, rd);
+  }
+  void cpymwtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1001, rs, rn, rd);
+  }
+  void cpyewtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1001, rs, rn, rd);
+  }
+  void cpyprtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1010, rs, rn, rd);
+  }
+  void cpymrtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1010, rs, rn, rd);
+  }
+  void cpyertrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1010, rs, rn, rd);
+  }
+  void cpyptrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1011, rs, rn, rd);
+  }
+  void cpymtrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1011, rs, rn, rd);
+  }
+  void cpyetrn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1011, rs, rn, rd);
+  }
+  void cpypn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1100, rs, rn, rd);
+  }
+  void cpymn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1100, rs, rn, rd);
+  }
+  void cpyen(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1100, rs, rn, rd);
+  }
+  void cpypwtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1101, rs, rn, rd);
+  }
+  void cpymwtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1101, rs, rn, rd);
+  }
+  void cpyewtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1101, rs, rn, rd);
+  }
+  void cpyprtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1110, rs, rn, rd);
+  }
+  void cpymrtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1110, rs, rn, rd);
+  }
+  void cpyertn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1110, rs, rn, rd);
+  }
+  void cpyptn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b00, 0b1111, rs, rn, rd);
+  }
+  void cpymtn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b01, 0b1111, rs, rn, rd);
+  }
+  void cpyetn(Register rd, Register rs, Register rn) {
+    MemoryCopyAndMemorySet(0, 1, 0b10, 0b1111, rs, rn, rd);
+  }
+
+  void setgp(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0000, rs, rn, rd);
+  }
+  void setgm(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0100, rs, rn, rd);
+  }
+  void setge(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b1000, rs, rn, rd);
+  }
+  void setgpt(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0001, rs, rn, rd);
+  }
+  void setgmt(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0101, rs, rn, rd);
+  }
+  void setget(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b1001, rs, rn, rd);
+  }
+  void setgpn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0010, rs, rn, rd);
+  }
+  void setgmn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0110, rs, rn, rd);
+  }
+  void setgen(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b1010, rs, rn, rd);
+  }
+  void setgptn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0011, rs, rn, rd);
+  }
+  void setgmtn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b0111, rs, rn, rd);
+  }
+  void setgetn(Register rd, Register rn, Register rs) {
+    MemoryCopyAndMemorySet(0, 1, 0b11, 0b1011, rs, rn, rd);
+  }
+
   // Loadstore no-allocate pair
   void stnp(ARMEmitter::WRegister rt, ARMEmitter::WRegister rt2, ARMEmitter::Register rn, int32_t Imm) {
     LOGMAN_THROW_A_FMT(Imm >= -256 && Imm <= 252 && ((Imm & 0b11) == 0), "Unscaled offset too large");
@@ -3819,7 +4178,12 @@ public:
   }
 
   // Loadstore PAC
-  // TODO
+  void ldraa(XRegister rt, XRegister rn, IndexType type, int32_t offset = 0) {
+    LoadStorePAC(0b11, 0, 0, offset, type, rn, rt);
+  }
+  void ldrab(XRegister rt, XRegister rn, IndexType type, int32_t offset = 0) {
+    LoadStorePAC(0b11, 0, 1, offset, type, rn, rt);
+  }
 
   // Loadstore unsigned immediate
   // Maximum values of unsigned immediate offsets for particular data sizes.
@@ -3968,6 +4332,20 @@ private:
     dc32(Instr);
   }
 
+  void MemoryCopyAndMemorySet(uint32_t sz, uint32_t o0, uint32_t op1, uint32_t op2, Register rs, Register rn, Register rd) {
+    uint32_t Instr = 0b0001'1001'0000'0000'0000'0100'0000'0000;
+
+    Instr |= sz << 30;
+    Instr |= o0 << 26;
+    Instr |= op1 << 22;
+    Instr |= rs.Idx() << 16;
+    Instr |= op2 << 12;
+    Instr |= rn.Idx() << 5;
+    Instr |= rd.Idx();
+
+    dc32(Instr);
+  }
+
   // Loadstore no-allocate pair
   template<typename T>
   void LoadStoreNoAllocate(uint32_t Op, T rt, T rt2, ARMEmitter::Register rn, uint32_t Imm) {
@@ -4034,6 +4412,30 @@ private:
     dc32(Instr);
   }
 
+  void LoadStorePAC(uint32_t size, uint32_t VR, uint32_t M, int32_t imm, IndexType type, Register rn, Register rt) {
+    LOGMAN_THROW_A_FMT((imm % 8) == 0, "Immediate ({}) must be divisible by 8", imm);
+    LOGMAN_THROW_A_FMT(imm >= -4096 && imm <= 4088, "Immediate ({}) must be within [-4096, 4088]", imm);
+    LOGMAN_THROW_A_FMT(type == IndexType::OFFSET || type == IndexType::PRE, "PAC may only use offset or pre-indexed values");
+
+    // The immediate is scaled down in order to fit within the available 10 immediate bits.
+    const auto scaled_imm = static_cast<uint32_t>(imm / 8);
+    const auto imm9 = scaled_imm & 0b1'1111'1111;
+    const auto S = (scaled_imm >> 9) & 1;
+
+    const auto W = type == IndexType::OFFSET ? 0U : 1U;
+
+    uint32_t Instr = 0b0011'1000'0010'0000'0000'0100'0000'0000;
+    Instr |= size << 30;
+    Instr |= VR << 26;
+    Instr |= M << 23;
+    Instr |= S << 22;
+    Instr |= imm9 << 12;
+    Instr |= W << 11;
+    Instr |= rn.Idx() << 5;
+    Instr |= rt.Idx();
+    dc32(Instr);
+  }
+
   // Loadstore unsigned immediate
   template<typename T>
   void LoadStoreUnsigned(uint32_t size, uint32_t V, uint32_t opc, T rt, Register rn, uint32_t Imm) {

CodeEmitter/CodeEmitter/Registers.h

@@ -30,9 +30,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(Register) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<Register>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<Register>, "Needs to be standard");
+static_assert(sizeof(Register) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<Register>);
+static_assert(std::is_standard_layout_v<Register>);
 
 /* 32-bit GPR register class.
  * This class will imply a 32-bit register size being used.
@@ -58,9 +58,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(Register) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<Register>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<Register>, "Needs to be standard");
+static_assert(sizeof(WRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<WRegister>);
+static_assert(std::is_standard_layout_v<WRegister>);
 
 /* 64-bit GPR register class.
  * This class will imply a 64-bit register size being used.
@@ -86,9 +86,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(Register) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<Register>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<Register>, "Needs to be standard");
+static_assert(sizeof(XRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<XRegister>);
+static_assert(std::is_standard_layout_v<XRegister>);
 
 inline constexpr WRegister Register::W() const {
   return WRegister {Index};
@@ -283,9 +283,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(VRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<VRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<VRegister>, "Needs to be standard");
+static_assert(sizeof(VRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<VRegister>);
+static_assert(std::is_standard_layout_v<VRegister>);
 
 /* 8-bit ASIMD register class
  * This class implies 8-bit scalar register.
@@ -315,9 +315,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(BRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<BRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<BRegister>, "Needs to be standard");
+static_assert(sizeof(BRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<BRegister>);
+static_assert(std::is_standard_layout_v<BRegister>);
 
 /* 16-bit ASIMD register class
  * This class implies 16-bit scalar register.
@@ -347,9 +347,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(HRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<HRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<HRegister>, "Needs to be standard");
+static_assert(sizeof(HRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<HRegister>);
+static_assert(std::is_standard_layout_v<HRegister>);
 
 /* 32-bit ASIMD register class
  * This class implies 32-bit scalar register.
@@ -379,9 +379,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(SRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<SRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<SRegister>, "Needs to be standard");
+static_assert(sizeof(SRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<SRegister>);
+static_assert(std::is_standard_layout_v<SRegister>);
 
 /* 64-bit ASIMD register class
  * This class doesn't imply Vector or Scalar.
@@ -412,9 +412,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(DRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<DRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<DRegister>, "Needs to be standard");
+static_assert(sizeof(DRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<DRegister>);
+static_assert(std::is_standard_layout_v<DRegister>);
 
 /* 128-bit ASIMD register class
  * This class doesn't imply Vector or Scalar.
@@ -445,9 +445,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(QRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<QRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<QRegister>, "Needs to be standard");
+static_assert(sizeof(QRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<QRegister>);
+static_assert(std::is_standard_layout_v<QRegister>);
 
 /* Unsized SVE register class.
  * This class explicitly implies the instruction will operate using SVE.
@@ -474,9 +474,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(ZRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<ZRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<ZRegister>, "Needs to be standard");
+static_assert(sizeof(ZRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<ZRegister>);
+static_assert(std::is_standard_layout_v<ZRegister>);
 
 // VRegister
 inline constexpr BRegister VRegister::B() const {
@@ -919,9 +919,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(PRegister) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<PRegister>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<PRegister>, "Needs to be standard");
+static_assert(sizeof(PRegister) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<PRegister>);
+static_assert(std::is_standard_layout_v<PRegister>);
 
 // Unsized predicate register for SVE with zeroing semantics.
 class PRegisterZero {
@@ -947,9 +947,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(PRegisterZero) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<PRegisterZero>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<PRegisterZero>, "Needs to be standard");
+static_assert(sizeof(PRegisterZero) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<PRegisterZero>);
+static_assert(std::is_standard_layout_v<PRegisterZero>);
 
 // Unsized predicate register for SVE with merging semantics.
 class PRegisterMerge {
@@ -975,9 +975,9 @@ public:
 private:
   uint32_t Index;
 };
-static_assert(sizeof(PRegisterZero) == sizeof(uint32_t), "Needs to be uint32_t");
-static_assert(std::is_trivial_v<PRegisterZero>, "Needs to be trivial");
-static_assert(std::is_standard_layout_v<PRegisterZero>, "Needs to be standard");
+static_assert(sizeof(PRegisterMerge) == sizeof(uint32_t));
+static_assert(std::is_trivially_copyable_v<PRegisterMerge>);
+static_assert(std::is_standard_layout_v<PRegisterMerge>);
 
 // PRegister
 inline constexpr PRegisterZero PRegister::Zeroing() const {

CodeEmitter/CodeEmitter/SVEOps.inl

@@ -60,8 +60,7 @@ public:
   }
 
   void fcmla(SubRegSize size, ZRegister zda, PRegisterMerge pv, ZRegister zn, ZRegister zm, Rotation rot) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT(pv <= PReg::p7.Merging(), "fcmla can only use p0 to p7");
 
     uint32_t Op = 0b0110'0100'0000'0000'0000'0000'0000'0000;
@@ -76,8 +75,7 @@ public:
   }
 
   void fcadd(SubRegSize size, ZRegister zd, PRegisterMerge pv, ZRegister zn, ZRegister zm, Rotation rot) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT(pv <= PReg::p7.Merging(), "fcadd can only use p0 to p7");
     LOGMAN_THROW_A_FMT(rot == Rotation::ROTATE_90 || rot == Rotation::ROTATE_270, "fcadd rotation may only be 90 or 270 degrees");
     LOGMAN_THROW_A_FMT(zd == zn, "fcadd zd and zn must be the same register");
@@ -815,16 +813,12 @@ public:
   // SVE Integer Misc - Unpredicated
   // SVE floating-point trig select coefficient
   void ftssel(SubRegSize size, ZRegister zd, ZRegister zn, ZRegister zm) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "ftssel may only have "
-                                                                                                               "16-bit, 32-bit, or 64-bit "
-                                                                                                               "element sizes");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "ftssel may only use 16/32/64-bit element sizes");
     SVEIntegerMiscUnpredicated(0b00, zm.Idx(), FEXCore::ToUnderlying(size), zd, zn);
   }
   // SVE floating-point exponential accelerator
   void fexpa(SubRegSize size, ZRegister zd, ZRegister zn) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "fexpa may only have "
-                                                                                                               "16-bit, 32-bit, or 64-bit "
-                                                                                                               "element sizes");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "fexpa may only use 16/32/64-bit element sizes");
     SVEIntegerMiscUnpredicated(0b10, 0b00000, FEXCore::ToUnderlying(size), zd, zn);
   }
   // SVE constructive prefix (unpredicated)
@@ -1503,9 +1497,9 @@ public:
   }
 
   // SVE broadcast floating-point immediate (unpredicated)
-  void fdup(ARMEmitter::SubRegSize size, ARMEmitter::ZRegister zd, float Value) {
-    LOGMAN_THROW_A_FMT(size == ARMEmitter::SubRegSize::i16Bit || size == ARMEmitter::SubRegSize::i32Bit || size == ARMEmitter::SubRegSize::i64Bit,
-                       "Unsupported fmov size");
+  void fdup(SubRegSize size, ZRegister zd, float Value) {
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Unsupported fmov size");
+
     uint32_t Imm {};
     if (size == SubRegSize::i16Bit) {
       LOGMAN_MSG_A_FMT("Unsupported");
@@ -1518,7 +1512,7 @@ public:
 
     SVEBroadcastFloatImmUnpredicated(0b00, 0, Imm, size, zd);
   }
-  void fmov(ARMEmitter::SubRegSize size, ARMEmitter::ZRegister zd, float Value) {
+  void fmov(SubRegSize size, ZRegister zd, float Value) {
     fdup(size, zd, Value);
   }
 
@@ -2134,11 +2128,31 @@ public:
 
   // SVE2 Crypto Extensions
   // SVE2 crypto unary operations
-  // XXX:
+  void aesimc(ZRegister zdn, ZRegister zn) {
+    SVE2CryptoUnaryOperation(1, zdn, zn);
+  }
+  void aesmc(ZRegister zdn, ZRegister zn) {
+    SVE2CryptoUnaryOperation(0, zdn, zn);
+  }
+
   // SVE2 crypto destructive binary operations
-  // XXX:
+  void aese(ZRegister zdn, ZRegister zn, ZRegister zm) {
+    SVE2CryptoDestructiveBinaryOperation(0, 0, zdn, zn, zm);
+  }
+  void aesd(ZRegister zdn, ZRegister zn, ZRegister zm) {
+    SVE2CryptoDestructiveBinaryOperation(0, 1, zdn, zn, zm);
+  }
+  void sm4e(ZRegister zdn, ZRegister zn, ZRegister zm) {
+    SVE2CryptoDestructiveBinaryOperation(1, 0, zdn, zn, zm);
+  }
+
   // SVE2 crypto constructive binary operations
-  // XXX:
+  void sm4ekey(ZRegister zd, ZRegister zn, ZRegister zm) {
+    SVE2CryptoConstructiveBinaryOperation(0, zd, zn, zm);
+  }
+  void rax1(ZRegister zd, ZRegister zn, ZRegister zm) {
+    SVE2CryptoConstructiveBinaryOperation(1, zd, zn, zm);
+  }
 
   // SVE Floating Point Widening Multiply-Add - Indexed
   // SVE BFloat16 floating-point dot product (indexed)
@@ -3381,8 +3395,8 @@ private:
   }
 
   void SVEBroadcastFloatImmPredicated(SubRegSize size, ZRegister zd, PRegister pg, float value) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Unsupported fcpy/fmov "
-                                                                                                               "size");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Unsupported fcpy/fmov size");
+
     uint32_t imm {};
     if (size == SubRegSize::i16Bit) {
       LOGMAN_MSG_A_FMT("Unsupported");
@@ -3558,7 +3572,7 @@ private:
   // SVE2 floating-point pairwise operations
   void SVEFloatPairwiseArithmetic(uint32_t opc, SubRegSize size, PRegister pg, ZRegister zd, ZRegister zn, ZRegister zm) {
     LOGMAN_THROW_A_FMT(zd == zn, "zd needs to equal zn");
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Invalid float size");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Invalid float size");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
 
     uint32_t Instr = 0b0110'0100'0001'0000'1000'0000'0000'0000;
@@ -3572,7 +3586,7 @@ private:
 
   // SVE floating-point arithmetic (unpredicated)
   void SVEFloatArithmeticUnpredicated(uint32_t opc, SubRegSize size, ZRegister zm, ZRegister zn, ZRegister zd) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Invalid float size");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Invalid float size");
 
     uint32_t Instr = 0b0110'0101'0000'0000'0000'0000'0000'0000;
     Instr |= FEXCore::ToUnderlying(size) << 22;
@@ -3680,7 +3694,7 @@ private:
   // SVE floating-point arithmetic (predicated)
   void SVEFloatArithmeticPredicated(uint32_t opc, SubRegSize size, PRegister pg, ZRegister zd, ZRegister zn, ZRegister zm) {
     LOGMAN_THROW_A_FMT(zd == zn, "zn needs to equal zd");
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Invalid float size");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Invalid float size");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
 
     uint32_t Instr = 0b0110'0101'0000'0000'1000'0000'0000'0000;
@@ -3708,9 +3722,7 @@ private:
   }
 
   void SVEFPRecursiveReduction(uint32_t opc, SubRegSize size, VRegister vd, PRegister pg, ZRegister zn) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "FP reduction operation can "
-                                                                                                               "only use 16-bit, 32-bit, "
-                                                                                                               "or 64-bit element sizes");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "FP reduction operation can only use 16/32/64-bit element sizes");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "FP reduction operation can only use p0-p7 as a governing predicate");
 
     uint32_t Instr = 0b0110'0101'0000'0000'0010'0000'0000'0000;
@@ -3892,6 +3904,35 @@ private:
     dc32(Instr);
   }
 
+  void SVE2CryptoUnaryOperation(uint32_t op, ZRegister zdn, ZRegister zn) {
+    LOGMAN_THROW_A_FMT(zdn == zn, "zdn and zn must be the same register");
+
+    uint32_t Instr = 0b0100'0101'0010'0000'1110'0000'0000'0000;
+    Instr |= op << 10;
+    Instr |= zdn.Idx();
+    dc32(Instr);
+  }
+
+  void SVE2CryptoDestructiveBinaryOperation(uint32_t op, uint32_t o2, ZRegister zdn, ZRegister zn, ZRegister zm) {
+    LOGMAN_THROW_A_FMT(zdn == zn, "zdn and zn must be the same register");
+
+    uint32_t Instr = 0b0100'0101'0010'0010'1110'0000'0000'0000;
+    Instr |= op << 16;
+    Instr |= o2 << 10;
+    Instr |= zm.Idx() << 5;
+    Instr |= zdn.Idx();
+    dc32(Instr);
+  }
+
+  void SVE2CryptoConstructiveBinaryOperation(uint32_t op, ZRegister zd, ZRegister zn, ZRegister zm) {
+    uint32_t Instr = 0b0100'0101'0010'0000'1111'0000'0000'0000;
+    Instr |= zm.Idx() << 16;
+    Instr |= op << 10;
+    Instr |= zn.Idx() << 5;
+    Instr |= zd.Idx();
+    dc32(Instr);
+  }
+
   void SVE2BitwisePermute(SubRegSize size, uint32_t opc, ZRegister zd, ZRegister zn, ZRegister zm) {
     LOGMAN_THROW_A_FMT(size != SubRegSize::i128Bit, "Can't use 128-bit element size");
 
@@ -4063,7 +4104,7 @@ private:
     // 0b111 - I - Current
 
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Unsupported size in {}", __func__);
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Unsupported size in {}", __func__);
 
     uint32_t Instr = 0b0110'0101'0000'0000'1010'0000'0000'0000;
     Instr |= FEXCore::ToUnderlying(size) << 22;
@@ -4672,7 +4713,7 @@ private:
 
   void SVEFloatUnary(uint32_t opc, SubRegSize size, PRegister pg, ZRegister zn, ZRegister zd) {
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "Unsupported size in {}", __func__);
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "Unsupported size in {}", __func__);
 
     uint32_t Instr = 0b0110'0101'0000'1100'1010'0000'0000'0000;
     Instr |= FEXCore::ToUnderlying(size) << 22;
@@ -4760,8 +4801,7 @@ private:
   }
 
   void SVEFPUnaryOpsUnpredicated(uint32_t opc, SubRegSize size, ZRegister zd, ZRegister zn) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
 
     uint32_t Instr = 0b0110'0101'0000'1000'0011'0000'0000'0000;
     Instr |= FEXCore::ToUnderlying(size) << 22;
@@ -4772,8 +4812,7 @@ private:
   }
 
   void SVEFPSerialReductionPredicated(uint32_t opc, SubRegSize size, VRegister vd, PRegister pg, VRegister vn, ZRegister zm) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
     LOGMAN_THROW_A_FMT(vd == vn, "vn must be the same as vd");
 
@@ -4787,8 +4826,7 @@ private:
   }
 
   void SVEFPCompareWithZero(uint32_t eqlt, uint32_t ne, SubRegSize size, PRegister pd, PRegister pg, ZRegister zn) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
 
     uint32_t Instr = 0b0110'0101'0001'0000'0010'0000'0000'0000;
@@ -4803,8 +4841,7 @@ private:
 
   void SVEFPMultiplyAdd(uint32_t opc, SubRegSize size, ZRegister zd, PRegister pg, ZRegister zn, ZRegister zm) {
     // NOTE: opc also includes the op0 bit (bit 15) like op0:opc, since the fields are adjacent
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT(pg <= PReg::p7, "Can only use p0-p7 as a governing predicate");
 
     uint32_t Instr = 0b0110'0101'0010'0000'0000'0000'0000'0000;
@@ -4818,8 +4855,7 @@ private:
   }
 
   void SVEFPMultiplyAddIndexed(uint32_t op, SubRegSize size, ZRegister zda, ZRegister zn, ZRegister zm, uint32_t index) {
-    LOGMAN_THROW_A_FMT(size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit, "SubRegSize must be 16-bit, "
-                                                                                                               "32-bit, or 64-bit");
+    LOGMAN_THROW_A_FMT(IsStandardFloatSize(size), "SubRegSize must be 16-bit, 32-bit, or 64-bit");
     LOGMAN_THROW_A_FMT((size <= SubRegSize::i32Bit && zm <= ZReg::z7) || (size == SubRegSize::i64Bit && zm <= ZReg::z15),
                        "16-bit and 32-bit indexed variants may only use Zm between z0-z7\n"
                        "64-bit variants may only use Zm between z0-z15");
@@ -5051,7 +5087,7 @@ private:
     const uint32_t element_size = SubRegSizeInBits(size);
 
     if (is_left_shift) {
-      LOGMAN_THROW_A_FMT(shift >= 0 && shift < element_size, "Invalid left shift value ({}). Must be within [0, {}]", shift, element_size - 1);
+      LOGMAN_THROW_A_FMT(shift < element_size, "Invalid left shift value ({}). Must be within [0, {}]", shift, element_size - 1);
     } else {
       LOGMAN_THROW_A_FMT(shift > 0 && shift <= element_size, "Invalid right shift value ({}). Must be within [1, {}]", shift, element_size);
     }

CodeEmitter/CodeEmitter/ScalarOps.inl

@@ -27,8 +27,6 @@ struct EmitterOps : Emitter {
 public:
   // Advanced SIMD scalar copy
   void dup(ScalarRegSize size, VRegister rd, VRegister rn, uint32_t Index) {
-    constexpr uint32_t Op = 0b0101'1110'0000'0000'0000'01 << 10;
-
     const uint32_t SizeImm = FEXCore::ToUnderlying(size);
     const uint32_t IndexShift = SizeImm + 1;
     const uint32_t ElementSize = 1U << SizeImm;
@@ -38,10 +36,10 @@ public:
 
     const uint32_t imm5 = (Index << IndexShift) | ElementSize;
 
-    ASIMDScalarCopy(Op, 1, imm5, 0b0000, rd, rn);
+    ASIMDScalarCopy(1, 1, imm5, 0b0000, rd, rn);
   }
 
-  void mov(ARMEmitter::ScalarRegSize size, ARMEmitter::VRegister rd, ARMEmitter::VRegister rn, uint32_t Index) {
+  void mov(ScalarRegSize size, VRegister rd, VRegister rn, uint32_t Index) {
     dup(size, rd, rn, Index);
   }
 
@@ -137,7 +135,15 @@ public:
   }
 
   // Advanced SIMD scalar three same extra
-  // XXX:
+  void sqrdmlah(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm) {
+    LOGMAN_THROW_A_FMT(size == ScalarRegSize::i16Bit || size == ScalarRegSize::i32Bit, "Only supports 16/32-bit");
+    ASIMDScalarThreeSameExtra(1, size, 0b0000, rm, rn, rd);
+  }
+  void sqrdmlsh(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm) {
+    LOGMAN_THROW_A_FMT(size == ScalarRegSize::i16Bit || size == ScalarRegSize::i32Bit, "Only supports 16/32-bit");
+    ASIMDScalarThreeSameExtra(1, size, 0b0001, rm, rn, rd);
+  }
+
   // Advanced SIMD scalar two-register miscellaneous
   void suqadd(ScalarRegSize size, VRegister rd, VRegister rn) {
     ASIMDScalar2RegMisc(0, 0, size, 0b00011, rd, rn);
@@ -744,10 +750,51 @@ public:
     const uint32_t immb = InvertedShift & 0b111;
     ASIMDScalarShiftByImm(1, immh, immb, 0b10011, rd, rn);
   }
+
   // TODO: UCVTF, FCVTZU
+
   // Advanced SIMD scalar x indexed element
-  // XXX:
-  //
+  void sqdmlal(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(0, size, 0b0011, rm, rn, rd, index);
+  }
+  void sqdmlsl(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(0, size, 0b0111, rm, rn, rd, index);
+  }
+  void sqdmull(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(0, size, 0b1011, rm, rn, rd, index);
+  }
+  void sqdmulh(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(0, size, 0b1100, rm, rn, rd, index);
+  }
+  void sqrdmulh(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(0, size, 0b1101, rm, rn, rd, index);
+  }
+  void fmla(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    ASIMDScalarXIndexedElement(0, size, 0b0001, rm, rn, rd, index);
+  }
+  void fmls(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    ASIMDScalarXIndexedElement(0, size, 0b0101, rm, rn, rd, index);
+  }
+  void fmul(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    ASIMDScalarXIndexedElement(0, size, 0b1001, rm, rn, rd, index);
+  }
+  void sqrdmlah(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(1, size, 0b1101, rm, rn, rd, index);
+  }
+  void sqrdmlsh(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i64Bit, "Scalar size must not be 64-bit");
+    ASIMDScalarXIndexedElement(1, size, 0b1111, rm, rn, rd, index);
+  }
+  void fmulx(ScalarRegSize size, VRegister rd, VRegister rn, VRegister rm, uint32_t index) {
+    ASIMDScalarXIndexedElement(1, size, 0b1001, rm, rn, rd, index);
+  }
+
   // Floating-point data-processing (1 source)
   void fmov(ScalarRegSize size, VRegister rd, VRegister rn) {
     Float1Source(size, 0, 0, 0b000000, rd, rn);
@@ -1233,10 +1280,10 @@ public:
 
 private:
   // Advanced SIMD scalar copy
-  void ASIMDScalarCopy(uint32_t Op, uint32_t Q, uint32_t imm5, uint32_t imm4, ARMEmitter::VRegister rd, ARMEmitter::VRegister rn) {
-    uint32_t Instr = Op;
-
+  void ASIMDScalarCopy(uint32_t Q, uint32_t b28, uint32_t imm5, uint32_t imm4, VRegister rd, VRegister rn) {
+    uint32_t Instr = 0b0000'1110'0000'0000'0000'01U << 10;
     Instr |= Q << 30;
+    Instr |= b28 << 28;
     Instr |= imm5 << 16;
     Instr |= imm4 << 11;
     Instr |= Encode_rn(rn);
@@ -1269,7 +1316,17 @@ private:
   }
 
   // Advanced SIMD scalar three same extra
-  // XXX:
+  void ASIMDScalarThreeSameExtra(uint32_t U, ScalarRegSize size, uint32_t opcode, VRegister rm, VRegister rn, VRegister rd) {
+    uint32_t Instr = 0b0101'1110'0000'0000'1000'0100'0000'0000;
+    Instr |= U << 29;
+    Instr |= FEXCore::ToUnderlying(size) << 22;
+    Instr |= rm.Idx() << 16;
+    Instr |= opcode << 11;
+    Instr |= rn.Idx() << 5;
+    Instr |= rd.Idx();
+    dc32(Instr);
+  }
+
   // Advanced SIMD scalar two-register miscellaneous
   void ASIMDScalar2RegMisc(uint32_t b20, uint32_t U, ScalarRegSize size, uint32_t opcode, VRegister rd, VRegister rn) {
     uint32_t Instr = 0b0101'1110'0010'0000'0000'1000'0000'0000;
@@ -1283,8 +1340,6 @@ private:
     dc32(Instr);
   }
 
-  // Advanced SIMD scalar pairwise
-  // XXX:
   // Advanced SIMD scalar three different
   void ASIMD3RegDifferent(uint32_t U, ScalarRegSize size, uint32_t opcode, VRegister rd, VRegister rn, VRegister rm) {
     uint32_t Instr = 0b0101'1110'0010'0000'0000'0000'0000'0000;
@@ -1321,8 +1376,50 @@ private:
     Instr |= Encode_rd(rd);
     dc32(Instr);
   }
+
   // Advanced SIMD scalar x indexed element
-  // XXX:
+  void ASIMDScalarXIndexedElement(uint32_t U, ScalarRegSize size, uint32_t opcode, VRegister rm, VRegister rn, VRegister rd, uint32_t index) {
+    LOGMAN_THROW_A_FMT(size != ScalarRegSize::i8Bit, "Scalar size must not be 8-bit");
+
+    [[maybe_unused]] const auto invalid_bound = 16U >> FEXCore::ToUnderlying(size);
+    LOGMAN_THROW_A_FMT(index < invalid_bound, "Index ({}) must be within [0-{}]", index, invalid_bound - 1);
+
+    uint32_t Instr = 0b0101'1111'0000'0000'0000'0000'0000'0000;
+
+    // FMUL/FMLA/FMLS indexed variants deal with size differently.
+    if (opcode == 0b0001 || opcode == 0b0101 || opcode == 0b1001) {
+      // Unlike other instructions in the group, 16-bit is encoded as zero
+      // and 32/64-bit are encoded with the top bit always set to one.
+      if (size != ScalarRegSize::i16Bit) {
+        Instr |= (0b10 | (FEXCore::ToUnderlying(size) & 1)) << 22;
+      }
+    } else {
+      Instr |= FEXCore::ToUnderlying(size) << 22;
+    }
+
+    uint32_t H = 0;
+    uint32_t LM = 0;
+    if (size == ScalarRegSize::i16Bit) {
+      LOGMAN_THROW_A_FMT(rm <= VReg::v15, "rm ({}) must be within [v0-v15]", rm.Idx());
+      H = (index >> 2) & 1;
+      LM = index & 0b11;
+    } else if (size == ScalarRegSize::i32Bit) {
+      H = (index >> 1) & 1;
+      LM = (index & 0b01) << 1;
+    } else {
+      H = index & 1;
+    }
+
+    Instr |= U << 29;
+    Instr |= LM << 20;
+    Instr |= rm.Idx() << 16;
+    Instr |= opcode << 12;
+    Instr |= H << 11;
+    Instr |= rn.Idx() << 5;
+    Instr |= rd.Idx();
+    dc32(Instr);
+  }
+
   // Floating-point data-processing (1 source)
   void Float1Source(uint32_t M, uint32_t S, uint32_t ptype, uint32_t opcode, VRegister rd, VRegister rn) {
     uint32_t Instr = 0b0001'1110'0010'0000'0100'0000'0000'0000;

CodeEmitter/CodeEmitter/SystemOps.inl

@@ -13,6 +13,12 @@ struct EmitterOps : Emitter {
 #endif
 
 public:
+  // Reserved
+  void udf(uint32_t Imm) {
+    LOGMAN_THROW_A_FMT(Imm < 0x1'0000, "Immediate needs to be 16-bit");
+    dc32(Imm);
+  }
+
   // System with result
   // TODO: SYSL
   // System Instruction

CodeEmitter/CodeEmitter/VixlUtils.inl

@@ -224,9 +224,13 @@ static bool IsImmLogical(uint64_t value, unsigned width, unsigned* n = nullptr,
   //    11110s     2    UInt(s)
   //
   // So we 'or' (2 * -d) with our computed s to form imms.
-  if ((n != NULL) || (imm_s != NULL) || (imm_r != NULL)) {
+  if (n != nullptr) {
     *n = out_n;
+  }
+  if (imm_s != nullptr) {
     *imm_s = ((2 * -d) | (s - 1)) & 0x3f;
+  }
+  if (imm_r != nullptr) {
     *imm_r = r;
   }
 

Data/CMake/CPack/Description.txt

@@ -0,0 +1,3 @@
+x86 and x86-64 Linux emulator
+
+FEX allows you to run x86 applications on ARM64 Linux devices. It offers broad compatibility with both 32-bit and 64-bit binaries, and it can be used alongside Wine/Proton to play Windows games.

Data/CMake/toolchain_aarch64.cmake

@@ -1,6 +1,6 @@
 # This is a reference AArch64 cross compile script
 # Pass in to cmake when building:
-# eg: cmake -DCMAKE_TOOLCHAIN_FILE=../CMakeToolchains/AArch64.cmake ..
+# eg: cmake --toolchain ../Data/CMake/toolchain_aarch64.cmake ..
 if (NOT DEFINED ENV{SYSROOT})
   message(FATAL_ERROR "Need to have SYSROOT environment variable set")
 endif()

Data/CMake/toolchain_mingw.cmake

@@ -4,6 +4,7 @@ set(CMAKE_RC_COMPILER ${MINGW_TRIPLE}-windres)
 set(CMAKE_C_COMPILER ${MINGW_TRIPLE}-clang)
 set(CMAKE_CXX_COMPILER ${MINGW_TRIPLE}-clang++)
 set(CMAKE_DLLTOOL ${MINGW_TRIPLE}-dlltool)
+set(CMAKE_AR ${MINGW_TRIPLE}-ar)
 
 # Compile everything as static to avoid requiring the MinGW runtime libraries, force page aligned sections so that
 # debug symbols work correctly, and disable loop alignment to workaround an LLVM bug

Data/Dockerfile

@@ -0,0 +1,31 @@
+# --- Stage 1: Builder ---
+FROM ubuntu:22.04 as builder
+
+RUN DEBIAN_FRONTEND="noninteractive" apt-get update
+RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
+clang-13 llvm-13 nasm ninja-build pkg-config \
+libcap-dev libglfw3-dev libepoxy-dev python3-dev libsdl2-dev \
+python3 linux-headers-generic  \
+git  qtbase5-dev qtdeclarative5-dev lld
+
+RUN git clone --recurse-submodules https://github.com/FEX-Emu/FEX.git
+WORKDIR /FEX
+RUN mkdir build
+
+ARG CC=clang-13
+ARG CXX=clang++-13
+RUN cmake -DCMAKE_INSTALL_PREFIX=/usr -DCMAKE_BUILD_TYPE=Release -DUSE_LINKER=lld -DENABLE_LTO=True -DBUILD_TESTS=False -DENABLE_ASSERTIONS=False -G Ninja .
+RUN ninja
+
+WORKDIR /FEX/build
+
+# --- Stage 2: Runner ---
+FROM builder as runner
+
+RUN DEBIAN_FRONTEND="noninteractive" apt-get update
+RUN DEBIAN_FRONTEND="noninteractive" apt install -y \
+libcap-dev libglfw3-dev libepoxy-dev
+
+COPY --from=builder /FEX/Bin/* /usr/bin/
+
+WORKDIR /

Data/nix/FEXLinuxTests/shell.nix

@@ -0,0 +1,35 @@
+{ pkgs ? import <nixpkgs> { } }:
+
+let
+  pkgsCross32 = pkgs.pkgsCross.gnu32;
+  pkgsCross64 = pkgs.pkgsCross.gnu64;
+
+  gcc32 = pkgs.writeText "toolchain_nix_gcc_x86_32.txt" ''
+    set(CMAKE_SYSTEM_PROCESSOR i686)
+    set(CMAKE_C_COMPILER ${pkgsCross32.buildPackages.gcc}/bin/i686-unknown-linux-gnu-gcc)
+    set(CMAKE_CXX_COMPILER ${pkgsCross32.buildPackages.gcc}/bin/i686-unknown-linux-gnu-g++)
+  '';
+
+  gcc64 = pkgs.writeText "toolchain_nix_gcc_x86_64.txt" ''
+    set(CMAKE_SYSTEM_PROCESSOR x86_64)
+    set(CMAKE_C_COMPILER ${pkgsCross64.buildPackages.gcc}/bin/x86_64-unknown-linux-gnu-gcc)
+    set(CMAKE_CXX_COMPILER ${pkgsCross64.buildPackages.gcc}/bin/x86_64-unknown-linux-gnu-g++)
+  '';
+in
+pkgs.mkShell {
+  buildInputs = [
+    pkgsCross64.buildPackages.clang
+    pkgsCross32.buildPackages.clang
+  ];
+
+  shellHook = ''
+    if [[ $- == *i* ]]; then
+      echo "toolchain32: ${gcc32}"
+      echo "toolchain64: ${gcc64}"
+      echo ""
+      echo "Use \$FEX_CMAKE_TOOLCHAINS to configure CMake."
+    fi
+  '';
+
+  FEX_CMAKE_TOOLCHAINS = "-DX86_32_TOOLCHAIN_FILE=${gcc32} -DX86_64_TOOLCHAIN_FILE=${gcc64}";
+}

Data/nix/LibraryForwarding/shell.nix

@@ -0,0 +1,83 @@
+{ pkgs ? import <nixpkgs> { } }:
+
+let
+  pkgsCross32 = pkgs.pkgsCross.gnu32;
+  pkgsCross64 = pkgs.pkgsCross.gnu64;
+
+  devRootFS = pkgs.buildEnv {
+    name = "fex-dev-rootfs";
+    paths = [
+      pkgsCross64.stdenv.cc.libc_dev
+      pkgsCross32.stdenv.cc.libc_dev
+      pkgsCross64.stdenv.cc.cc
+      pkgsCross32.stdenv.cc.cc
+
+      pkgs.alsa-lib.dev
+      pkgs.libdrm.dev
+      pkgs.libGL.dev
+      pkgs.wayland.dev
+      pkgs.xorg.libX11.dev
+      pkgs.xorg.libxcb.dev
+      pkgs.xorg.libXrandr.dev
+      pkgs.xorg.libXrender.dev
+      pkgs.xorg.xorgproto
+    ];
+    ignoreCollisions = true;
+    pathsToLink = [
+      "/include"
+      "/lib"
+    ];
+
+    postBuild = ''
+      mkdir -p $out/usr
+      ln -s $out/include $out/usr/
+    '';
+  };
+
+  toolchain32 = pkgs.writeText "toolchain_nix_x86_32.txt" ''
+    set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_SYSTEM_PROCESSOR i686)
+    set(CMAKE_C_COMPILER clang)
+    set(CMAKE_CXX_COMPILER clang++)
+    set(CMAKE_C_COMPILER ${pkgsCross32.buildPackages.clang}/bin/i686-unknown-linux-gnu-clang)
+    set(CMAKE_CXX_COMPILER ${pkgsCross32.buildPackages.clang}/bin/i686-unknown-linux-gnu-clang++)
+    set(CLANG_FLAGS "-nodefaultlibs -nostartfiles -lstdc++ -target i686-linux-gnu -msse2 -mfpmath=sse --sysroot=${devRootFS} -iwithsysroot/include")
+    set(CMAKE_C_FLAGS "''${CMAKE_C_FLAGS} ''${CLANG_FLAGS}")
+    set(CMAKE_CXX_FLAGS "''${CMAKE_CXX_FLAGS} ''${CLANG_FLAGS}")
+  '';
+
+  toolchain64 = pkgs.writeText "toolchain_nix_x86_64.txt" ''
+    set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
+    set(CMAKE_SYSTEM_PROCESSOR x86_64)
+    set(CMAKE_C_COMPILER clang)
+    set(CMAKE_CXX_COMPILER clang++)
+    set(CMAKE_C_COMPILER ${pkgsCross64.buildPackages.clang}/bin/x86_64-unknown-linux-gnu-clang)
+    set(CMAKE_CXX_COMPILER ${pkgsCross64.buildPackages.clang}/bin/x86_64-unknown-linux-gnu-clang++)
+    set(CLANG_FLAGS "-nodefaultlibs -nostartfiles -lstdc++ -target x86_64-linux-gnu --sysroot=${devRootFS} -iwithsysroot/usr/include")
+    set(CMAKE_C_FLAGS "''${CMAKE_C_FLAGS} ''${CLANG_FLAGS}")
+    set(CMAKE_CXX_FLAGS "''${CMAKE_CXX_FLAGS} ''${CLANG_FLAGS}")
+  '';
+in
+pkgs.mkShell {
+  buildInputs = [
+    pkgsCross64.buildPackages.clang
+    pkgsCross32.buildPackages.clang
+  ];
+
+  shellHook = ''
+    if [[ $- == *i* ]]; then
+      echo "Set up dev RootFS at ${devRootFS}"
+      echo "toolchain32: ${toolchain32}"
+      echo "toolchain64: ${toolchain64}"
+      echo ""
+      echo "Use \$FEX_CMAKE_TOOLCHAINS to configure CMake."
+    fi
+  '';
+
+  FEX_CMAKE_TOOLCHAINS = "-DX86_32_TOOLCHAIN_FILE=${toolchain32} -DX86_64_TOOLCHAIN_FILE=${toolchain64} -DX86_DEV_ROOTFS=${devRootFS}";
+  ROOTFS = "${devRootFS}";
+}

Data/nix/WineOnArm/shell.nix

@@ -0,0 +1,52 @@
+{ pkgs ? import <nixpkgs> { } }:
+
+let
+  toolchain = pkgs.fetchzip {
+    url = "https://github.com/bylaws/llvm-mingw/releases/download/20250305/llvm-mingw-20250305-ucrt-ubuntu-20.04-aarch64.tar.xz";
+    sha256 = "sha256-cA03/ab9O61eO9+S2JzIXD4V0HzTXK5/AYyxW2d73Po=";
+  };
+
+  cmakeToolchainFile = pkgs.substitute {
+    # Use absolute paths that are discoverable outside of the nix shell
+    src = ../../CMake/toolchain_mingw.cmake;
+    substitutions = ["--replace-fail" "\${MINGW_TRIPLE}-" "${toolchain}/bin/\${MINGW_TRIPLE}-"];
+  };
+
+  mesonCrossFile = pkgs.writeText "crossfile_llvm_mingw.txt" ''
+    [binaries]
+    ar = '${toolchain}/bin/arm64ec-w64-mingw32-ar'
+    c = '${toolchain}/bin/arm64ec-w64-mingw32-gcc'
+    cpp = '${toolchain}/bin/arm64ec-w64-mingw32-g++'
+    ld = '${toolchain}/bin/arm64ec-w64-mingw32-ld'
+    windres = '${toolchain}/bin/arm64ec-w64-mingw32-windres'
+    strip = '${toolchain}/bin/strip'
+    widl = '${toolchain}/bin/arm64ec-w64-mingw32-widl'
+    pkgconfig = 'aarch64-linux-gnu-pkg-config'
+    [host_machine]
+    system = 'windows'
+    cpu_family = 'aarch64'
+    cpu = 'aarch64'
+    endian = 'little'
+  '';
+in
+pkgs.mkShell {
+  buildInputs = [
+    toolchain
+  ];
+
+  shellHook = ''
+    if [[ $- == *i* ]]; then
+      echo "llvm-mingw set up at ${toolchain}."
+      echo ""
+      echo "To configure DXVK/vkd3d-proton: meson setup \$FEX_MESON_CROSSFILE"
+      echo ""
+      echo "To configure 32-bit FEX build: cmake \$FEX_CMAKE_TOOLCHAIN_WOW64"
+      echo "To configure 64-bit FEX build: cmake \$FEX_CMAKE_TOOLCHAIN_ARM64EC"
+    fi
+  '';
+
+  # E.g. cmake $FEX_CMAKE_TOOLCHAIN_ARM64EC -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTS=False
+  FEX_CMAKE_TOOLCHAIN_ARM64EC = "--toolchain ${cmakeToolchainFile} -DMINGW_TRIPLE=arm64ec-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows";
+  FEX_CMAKE_TOOLCHAIN_WOW64 = "--toolchain ${cmakeToolchainFile} -DMINGW_TRIPLE=aarch64-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows";
+  FEX_MESON_CROSSFILE = "--cross-file ${mesonCrossFile}";
+}

Data/nix/cmake_configure_woa32.sh

@@ -0,0 +1,21 @@
+#! /usr/bin/env nix-shell
+#! nix-shell -i bash WineOnArm/shell.nix
+
+# Helper script to configure CMake for building FEX as library for emulation
+# of 32-bit applications in Wine/Proton.
+# The required cross-toolchains will be set up and managed by nix.
+
+if [ $# -eq 0 ]
+then
+  echo "Expected CMake argument list"
+  exit 1
+fi
+
+if [ -f CMakeCache.txt ]
+then
+  echo "Expected empty build folder"
+  exit 1
+fi
+
+set -o xtrace
+cmake $FEX_CMAKE_TOOLCHAIN_WOW64 -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTS=False $@

Data/nix/cmake_configure_woa64.sh

@@ -0,0 +1,21 @@
+#! /usr/bin/env nix-shell
+#! nix-shell -i bash WineOnArm/shell.nix
+
+# Helper script to configure CMake for building FEX as library for emulation
+# of 64-bit applications in Wine/Proton
+# Nix is used to install and manage the required cross-toolchains.
+
+if [ $# -eq 0 ]
+then
+  echo "Expected CMake argument list"
+  exit 1
+fi
+
+if [ -f CMakeCache.txt ]
+then
+  echo "Expected empty build folder"
+  exit 1
+fi
+
+set -o xtrace
+cmake $FEX_CMAKE_TOOLCHAIN_ARM64EC -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTS=False $@

Data/nix/cmake_enable_flt.sh

@@ -0,0 +1,17 @@
+#! /usr/bin/env nix-shell
+#! nix-shell -i bash FEXLinuxTests/shell.nix
+
+# Helper script to configure CMake for building FEXLinuxTests.
+# Nix is used to install and manage the required cross-toolchains.
+
+if [ ! -f CMakeCache.txt ]
+then
+  echo "Must be run from a pre-configured CMake build folder"
+  exit 1
+fi
+
+# Remove previous build to ensure the new toolchain is applied
+rm -rf unittests/FEXLinuxTests
+
+set -o xtrace
+cmake . $FEX_CMAKE_TOOLCHAINS -DBUILD_TESTS=ON -DBUILD_FEX_LINUX_TESTS=ON

Data/nix/cmake_enable_libfwd.sh

@@ -0,0 +1,22 @@
+# Helper script to configure CMake for library forwarding in FEX.
+# Nix is used to install and manage the required cross-toolchains.
+
+if [ ! -f CMakeCache.txt ]
+then
+  echo "Must be run from a pre-configured CMake build folder"
+  exit 1
+fi
+
+# Remove previous build to ensure the new toolchain is applied
+rm -rf guest-libs guest-libs-32 Guest Guest_32
+
+# Set clang executable path manually since the one from the nix store
+# will be picked up otherwise
+CLANG_EXEC_PATH=""
+if ! grep -q CLANG_EXEC_PATH CMakeCache.txt
+then
+  CLANG_EXEC_PATH="-DCLANG_EXEC_PATH=`which clang`"
+fi
+
+nix-shell `dirname -- "$0"`/LibraryForwarding/shell.nix \
+  --run "set -o xtrace; cmake . \$FEX_CMAKE_TOOLCHAINS -DBUILD_THUNKS=ON $CLANG_EXEC_PATH; set +o xtrace"

Dockerfile

@@ -1,31 +0,0 @@
-# --- Stage 1: Builder ---
-FROM ubuntu:20.04 as builder
-
-RUN DEBIAN_FRONTEND="noninteractive" apt-get update
-RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
-clang-10 llvm-10 nasm ninja-build pkg-config \
-libcap-dev libglfw3-dev libepoxy-dev python3-dev libsdl2-dev \
-python3 linux-headers-generic \
-git
-
-RUN git clone --recurse-submodules https://github.com/FEX-Emu/FEX.git
-
-CMD [ "mkdir /opt/FEX/build" ]
-
-WORKDIR /opt/FEX/build
-
-ARG CC=clang-10
-ARG CXX=clang++-10
-RUN cmake -G Ninja .. -DCMAKE_BUILD_TYPE=Release
-RUN ninja
-
-# --- Stage 2: Runner ---
-FROM ubuntu:20.04
-
-RUN DEBIAN_FRONTEND="noninteractive" apt-get update
-RUN DEBIAN_FRONTEND="noninteractive" apt install -y \
-libcap-dev libglfw3-dev libepoxy-dev
-
-COPY --from=builder /opt/FEX/build/Bin/* /usr/bin/
-
-WORKDIR /root

External/.clang-format

@@ -0,0 +1 @@
+DisableFormat: true

External/SoftFloat-3e/CMakeLists.txt

@@ -0,0 +1,98 @@
+
+set (SRCS
+  # F80 support
+  src/extF80_add.c
+  src/extF80_div.c
+  src/extF80_sub.c
+  src/extF80_mul.c
+  src/extF80_rem.c
+  src/extF80_sqrt.c
+  src/extF80_le.c
+  src/extF80_to_i32.c
+  src/extF80_to_i64.c
+  src/extF80_to_ui64.c
+  src/extF80_to_f32.c
+  src/extF80_to_f64.c
+  src/i32_to_extF80.c
+  src/ui64_to_extF80.c
+  src/extF80_to_f128.c
+  src/f128_to_extF80.c
+
+  # F128 support
+  src/f128_add.c
+  src/f128_div.c
+  src/f128_eq.c
+  src/f128_eq_signaling.c
+  src/f128_isSignalingNaN.c
+  src/f128_le.c
+  src/f128_le_quiet.c
+  src/f128_lt.c
+  src/f128_lt_quiet.c
+  src/f128_mulAdd.c
+  src/f128_mul.c
+  src/f128_rem.c
+  src/f128_sqrt.c
+  src/f128_sub.c
+  src/f128_to_f16.c
+  src/f128_to_f32.c
+  src/f128_to_f64.c
+  src/f128_to_i32.c
+  src/f128_to_i64.c
+  src/f128_to_ui32.c
+  src/f128_to_ui64.c
+  src/s_addMagsF128.c
+  src/s_subMagsF128.c
+  src/s_normRoundPackToF128.c
+  src/s_roundPackToF128.c
+  src/s_propagateNaNF128UI.c
+
+  # Conversion
+  src/f32_to_f128.c
+  src/i32_to_f128.c
+
+  src/s_roundToUI64.c
+  src/s_f128UIToCommonNaN.c
+  src/s_commonNaNToF128UI.c
+  src/s_normSubnormalF128Sig.c
+  src/s_roundToI32.c
+  src/s_roundToI64.c
+  src/s_roundPackToF32.c
+  src/s_addMagsExtF80.c
+  src/s_extF80UIToCommonNaN.c
+  src/s_commonNaNToF32UI.c
+  src/s_commonNaNToF64UI.c
+  src/s_roundPackToF64.c
+  src/s_propagateNaNExtF80UI.c
+  src/s_roundPackToExtF80.c
+  src/s_normSubnormalExtF80Sig.c
+  src/s_subMagsExtF80.c
+  src/s_shiftRightJam128.c
+  src/s_shiftRightJam128Extra.c
+  src/s_normRoundPackToExtF80.c
+  src/s_approxRecip_1Ks.c
+  src/s_approxRecipSqrt32_1.c
+  src/s_approxRecipSqrt_1Ks.c
+  src/softfloat_raiseFlags.c
+  src/f64_to_extF80.c
+  src/s_commonNaNToExtF80UI.c
+  src/s_normSubnormalF64Sig.c
+  src/s_f64UIToCommonNaN.c
+  src/extF80_roundToInt.c
+  src/extF80_eq.c
+  src/extF80_lt.c
+  src/f32_to_extF80.c
+  src/s_normSubnormalF32Sig.c
+  src/s_f32UIToCommonNaN.c)
+
+if (_M_ARM_64 AND HAS_CLANG_PRESERVE_ALL)
+  list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=__attribute__((preserve_all));-DFEXCORE_HAS_PRESERVE_ALL_ATTR=1")
+else()
+  list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=;-DFEXCORE_HAS_PRESERVE_ALL_ATTR=0")
+endif()
+
+list(APPEND DEFINES "-DSOFTFLOAT_BUILTIN_CLZ=1;-DINLINE=static inline;-DINLINE_LEVEL=4;-DSOFTFLOAT_FAST_INT64=1;-DSOFTFLOAT_FAST_DIV32TO16=1;-DSOFTFLOAT_FAST_DIV64TO32=1")
+
+add_library(softfloat_3e STATIC ${SRCS})
+target_include_directories(softfloat_3e PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include/)
+target_include_directories(softfloat_3e PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include/SoftFloat-3e/)
+target_compile_definitions(softfloat_3e PUBLIC ${DEFINES})

External/SoftFloat-3e/include/SoftFloat-3e/softfloat.h

@@ -149,7 +149,7 @@ float64_t f32_to_f64( float32_t );
 #ifdef SOFTFLOAT_FAST_INT64
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t f32_to_extF80( struct softfloat_state *, float32_t );
-float128_t f32_to_f128( float32_t );
+float128_t f32_to_f128( struct softfloat_state *, float32_t );
 #endif
 void f32_to_extF80M( float32_t, extFloat80_t * );
 void f32_to_f128M( float32_t, float128_t * );
@@ -243,13 +243,17 @@ FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t extF80_sqrt( struct softfloat_state *, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
 bool extF80_eq( struct softfloat_state *, extFloat80_t, extFloat80_t );
-bool extF80_le( extFloat80_t, extFloat80_t );
+bool extF80_le( struct softfloat_state *, extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
 bool extF80_lt( struct softfloat_state *, extFloat80_t, extFloat80_t );
 bool extF80_eq_signaling( extFloat80_t, extFloat80_t );
 bool extF80_le_quiet( extFloat80_t, extFloat80_t );
 bool extF80_lt_quiet( extFloat80_t, extFloat80_t );
 bool extF80_isSignalingNaN( extFloat80_t );
+static inline extFloat80_t extF80_complement_sign(extFloat80_t a) {
+  a.signExp ^= 1ULL << 15;
+  return a;
+}
 #endif
 uint_fast32_t extF80M_to_ui32( const extFloat80_t *, uint_fast8_t, bool );
 uint_fast64_t extF80M_to_ui64( const extFloat80_t *, uint_fast8_t, bool );
@@ -284,34 +288,38 @@ bool extF80M_isSignalingNaN( const extFloat80_t * );
 | 128-bit (quadruple-precision) floating-point operations.
 *----------------------------------------------------------------------------*/
 #ifdef SOFTFLOAT_FAST_INT64
-uint_fast32_t f128_to_ui32( float128_t, uint_fast8_t, bool );
-uint_fast64_t f128_to_ui64( float128_t, uint_fast8_t, bool );
-int_fast32_t f128_to_i32( float128_t, uint_fast8_t, bool );
-int_fast64_t f128_to_i64( float128_t, uint_fast8_t, bool );
+uint_fast32_t f128_to_ui32( struct softfloat_state *, float128_t, uint_fast8_t, bool );
+uint_fast64_t f128_to_ui64( struct softfloat_state *, float128_t, uint_fast8_t, bool );
+int_fast32_t f128_to_i32( struct softfloat_state *, float128_t, uint_fast8_t, bool );
+int_fast64_t f128_to_i64( struct softfloat_state *, float128_t, uint_fast8_t, bool );
 uint_fast32_t f128_to_ui32_r_minMag( float128_t, bool );
 uint_fast64_t f128_to_ui64_r_minMag( float128_t, bool );
 int_fast32_t f128_to_i32_r_minMag( float128_t, bool );
 int_fast64_t f128_to_i64_r_minMag( float128_t, bool );
-float16_t f128_to_f16( float128_t );
-float32_t f128_to_f32( float128_t );
-float64_t f128_to_f64( float128_t );
+float16_t f128_to_f16( struct softfloat_state *, float128_t );
+float32_t f128_to_f32( struct softfloat_state *, float128_t );
+float64_t f128_to_f64( struct softfloat_state *, float128_t );
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t f128_to_extF80( struct softfloat_state *, float128_t );
 float128_t f128_roundToInt( float128_t, uint_fast8_t, bool );
-float128_t f128_add( float128_t, float128_t );
-float128_t f128_sub( float128_t, float128_t );
-float128_t f128_mul( float128_t, float128_t );
-float128_t f128_mulAdd( float128_t, float128_t, float128_t );
-float128_t f128_div( float128_t, float128_t );
-float128_t f128_rem( float128_t, float128_t );
-float128_t f128_sqrt( float128_t );
-bool f128_eq( float128_t, float128_t );
-bool f128_le( float128_t, float128_t );
-bool f128_lt( float128_t, float128_t );
-bool f128_eq_signaling( float128_t, float128_t );
-bool f128_le_quiet( float128_t, float128_t );
-bool f128_lt_quiet( float128_t, float128_t );
+float128_t f128_add( struct softfloat_state *, float128_t, float128_t );
+float128_t f128_sub( struct softfloat_state *, float128_t, float128_t );
+float128_t f128_mul( struct softfloat_state *, float128_t, float128_t );
+float128_t f128_mulAdd( struct softfloat_state *, float128_t, float128_t, float128_t );
+float128_t f128_div( struct softfloat_state *, float128_t, float128_t );
+float128_t f128_rem( struct softfloat_state *, float128_t, float128_t );
+float128_t f128_sqrt( struct softfloat_state *, float128_t );
+bool f128_eq( struct softfloat_state *, float128_t, float128_t );
+bool f128_le( struct softfloat_state *, float128_t, float128_t );
+bool f128_lt( struct softfloat_state *, float128_t, float128_t );
+bool f128_eq_signaling( struct softfloat_state *, float128_t, float128_t );
+bool f128_le_quiet( struct softfloat_state *, float128_t, float128_t );
+bool f128_lt_quiet( struct softfloat_state *, float128_t, float128_t );
 bool f128_isSignalingNaN( float128_t );
+static inline float128_t f128_complement_sign(float128_t a) {
+  a.v[1] ^= 1ULL << 63;
+  return a;
+}
 #endif
 uint_fast32_t f128M_to_ui32( const float128_t *, uint_fast8_t, bool );
 uint_fast64_t f128M_to_ui64( const float128_t *, uint_fast8_t, bool );

External/SoftFloat-3e/src/extF80_le.c

@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_le( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+{
+    union { struct extFloat80M s; extFloat80_t f; } uA;
+    uint_fast16_t uiA64;
+    uint_fast64_t uiA0;
+    union { struct extFloat80M s; extFloat80_t f; } uB;
+    uint_fast16_t uiB64;
+    uint_fast64_t uiB0;
+    bool signA, signB;
+
+    uA.f = a;
+    uiA64 = uA.s.signExp;
+    uiA0  = uA.s.signif;
+    uB.f = b;
+    uiB64 = uB.s.signExp;
+    uiB0  = uB.s.signif;
+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        return false;
+    }
+    signA = signExtF80UI64( uiA64 );
+    signB = signExtF80UI64( uiB64 );
+    return
+        (signA != signB)
+            ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)
+            : ((uiA64 == uiB64) && (uiA0 == uiB0))
+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+

External/SoftFloat-3e/src/f128_add.c

@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+float128_t f128_add( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+    float128_t
+        (*magsFuncPtr)(
+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
+#endif
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    signB = signF128UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+    if ( signA == signB ) {
+        return softfloat_addMagsF128( state, uiA64, uiA0, uiB64, uiB0, signA );
+    } else {
+        return softfloat_subMagsF128( state, uiA64, uiA0, uiB64, uiB0, signA );
+    }
+#else
+    magsFuncPtr =
+        (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128;
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+

External/SoftFloat-3e/src/f128_div.c

@@ -0,0 +1,199 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t f128_div( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    int_fast32_t expA;
+    struct uint128 sigA;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signB;
+    int_fast32_t expB;
+    struct uint128 sigB;
+    bool signZ;
+    struct exp32_sig128 normExpSig;
+    int_fast32_t expZ;
+    struct uint128 rem;
+    uint_fast32_t recip32;
+    int ix;
+    uint_fast64_t q64;
+    uint_fast32_t q;
+    struct uint128 term;
+    uint_fast32_t qs[3];
+    uint_fast64_t sigZExtra;
+    struct uint128 sigZ, uiZ;
+    union ui128_f128 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    expA  = expF128UI64( uiA64 );
+    sigA.v64 = fracF128UI64( uiA64 );
+    sigA.v0  = uiA0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    signB = signF128UI64( uiB64 );
+    expB  = expF128UI64( uiB64 );
+    sigB.v64 = fracF128UI64( uiB64 );
+    sigB.v0  = uiB0;
+    signZ = signA ^ signB;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( expA == 0x7FFF ) {
+        if ( sigA.v64 | sigA.v0 ) goto propagateNaN;
+        if ( expB == 0x7FFF ) {
+            if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
+            goto invalid;
+        }
+        goto infinity;
+    }
+    if ( expB == 0x7FFF ) {
+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
+        goto zero;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ! expB ) {
+        if ( ! (sigB.v64 | sigB.v0) ) {
+            if ( ! (expA | sigA.v64 | sigA.v0) ) goto invalid;
+            softfloat_raiseFlags( state, softfloat_flag_infinite );
+            goto infinity;
+        }
+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );
+        expB = normExpSig.exp;
+        sigB = normExpSig.sig;
+    }
+    if ( ! expA ) {
+        if ( ! (sigA.v64 | sigA.v0) ) goto zero;
+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );
+        expA = normExpSig.exp;
+        sigA = normExpSig.sig;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    expZ = expA - expB + 0x3FFE;
+    sigA.v64 |= UINT64_C( 0x0001000000000000 );
+    sigB.v64 |= UINT64_C( 0x0001000000000000 );
+    rem = sigA;
+    if ( softfloat_lt128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 ) ) {
+        --expZ;
+        rem = softfloat_add128( sigA.v64, sigA.v0, sigA.v64, sigA.v0 );
+    }
+    recip32 = softfloat_approxRecip32_1( sigB.v64>>17 );
+    ix = 3;
+    for (;;) {
+        q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32;
+        q = (q64 + 0x80000000)>>32;
+        --ix;
+        if ( ix < 0 ) break;
+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );
+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+            --q;
+            rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+        }
+        qs[ix] = q;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ((q + 1) & 7) < 2 ) {
+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );
+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+            --q;
+            rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+        } else if ( softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 ) ) {
+            ++q;
+            rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+        }
+        if ( rem.v64 | rem.v0 ) q |= 1;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    sigZExtra = (uint64_t) ((uint_fast64_t) q<<60);
+    term = softfloat_shortShiftLeft128( 0, qs[1], 54 );
+    sigZ =
+        softfloat_add128(
+            (uint_fast64_t) qs[2]<<19, ((uint_fast64_t) qs[0]<<25) + (q>>4),
+            term.v64, term.v0
+        );
+    return
+        softfloat_roundPackToF128( state, signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ propagateNaN:
+    uiZ = softfloat_propagateNaNF128UI( state, uiA64, uiA0, uiB64, uiB0 );
+    goto uiZ;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ invalid:
+    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    uiZ.v64 = defaultNaNF128UI64;
+    uiZ.v0  = defaultNaNF128UI0;
+    goto uiZ;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ infinity:
+    uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );
+    goto uiZ0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ zero:
+    uiZ.v64 = packToF128UI64( signZ, 0, 0 );
+ uiZ0:
+    uiZ.v0 = 0;
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_eq.c

@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool f128_eq( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        if (
+               softfloat_isSigNaNF128UI( uiA64, uiA0 )
+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )
+        ) {
+            softfloat_raiseFlags( state, softfloat_flag_invalid );
+        }
+        return false;
+    }
+    return
+           (uiA0 == uiB0)
+        && (   (uiA64 == uiB64)
+            || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+           );
+
+}
+

External/SoftFloat-3e/src/f128_eq_signaling.c

@@ -0,0 +1,67 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+bool f128_eq_signaling( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        return false;
+    }
+    return
+           (uiA0 == uiB0)
+        && (   (uiA64 == uiB64)
+            || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+           );
+
+}
+

External/SoftFloat-3e/src/f128_isSignalingNaN.c

@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool f128_isSignalingNaN( float128_t a )
+{
+    union ui128_f128 uA;
+
+    uA.f = a;
+    return softfloat_isSigNaNF128UI( uA.ui.v64, uA.ui.v0 );
+
+}
+

External/SoftFloat-3e/src/f128_le.c

@@ -0,0 +1,72 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+bool f128_le( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signA, signB;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        return false;
+    }
+    signA = signF128UI64( uiA64 );
+    signB = signF128UI64( uiB64 );
+    return
+        (signA != signB)
+            ? signA
+                  || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+                            | uiA0 | uiB0)
+            : ((uiA64 == uiB64) && (uiA0 == uiB0))
+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+

External/SoftFloat-3e/src/f128_le_quiet.c

@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool f128_le_quiet( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signA, signB;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        if (
+               softfloat_isSigNaNF128UI( uiA64, uiA0 )
+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )
+        ) {
+            softfloat_raiseFlags( state, softfloat_flag_invalid );
+        }
+        return false;
+    }
+    signA = signF128UI64( uiA64 );
+    signB = signF128UI64( uiB64 );
+    return
+        (signA != signB)
+            ? signA
+                  || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+                            | uiA0 | uiB0)
+            : ((uiA64 == uiB64) && (uiA0 == uiB0))
+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+

External/SoftFloat-3e/src/f128_lt.c

@@ -0,0 +1,72 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+bool f128_lt( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signA, signB;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        return false;
+    }
+    signA = signF128UI64( uiA64 );
+    signB = signF128UI64( uiB64 );
+    return
+        (signA != signB)
+            ? signA
+                  && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+                          | uiA0 | uiB0)
+            : ((uiA64 != uiB64) || (uiA0 != uiB0))
+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+

External/SoftFloat-3e/src/f128_lt_quiet.c

@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool f128_lt_quiet( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signA, signB;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {
+        if (
+               softfloat_isSigNaNF128UI( uiA64, uiA0 )
+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )
+        ) {
+            softfloat_raiseFlags( state, softfloat_flag_invalid );
+        }
+        return false;
+    }
+    signA = signF128UI64( uiA64 );
+    signB = signF128UI64( uiB64 );
+    return
+        (signA != signB)
+            ? signA
+                  && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+                          | uiA0 | uiB0)
+            : ((uiA64 != uiB64) || (uiA0 != uiB0))
+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+

External/SoftFloat-3e/src/f128_mul.c

@@ -0,0 +1,163 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t f128_mul( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    int_fast32_t expA;
+    struct uint128 sigA;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signB;
+    int_fast32_t expB;
+    struct uint128 sigB;
+    bool signZ;
+    uint_fast64_t magBits;
+    struct exp32_sig128 normExpSig;
+    int_fast32_t expZ;
+    uint64_t sig256Z[4];
+    uint_fast64_t sigZExtra;
+    struct uint128 sigZ;
+    struct uint128_extra sig128Extra;
+    struct uint128 uiZ;
+    union ui128_f128 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    expA  = expF128UI64( uiA64 );
+    sigA.v64 = fracF128UI64( uiA64 );
+    sigA.v0  = uiA0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    signB = signF128UI64( uiB64 );
+    expB  = expF128UI64( uiB64 );
+    sigB.v64 = fracF128UI64( uiB64 );
+    sigB.v0  = uiB0;
+    signZ = signA ^ signB;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( expA == 0x7FFF ) {
+        if (
+            (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0))
+        ) {
+            goto propagateNaN;
+        }
+        magBits = expB | sigB.v64 | sigB.v0;
+        goto infArg;
+    }
+    if ( expB == 0x7FFF ) {
+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
+        magBits = expA | sigA.v64 | sigA.v0;
+        goto infArg;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ! expA ) {
+        if ( ! (sigA.v64 | sigA.v0) ) goto zero;
+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );
+        expA = normExpSig.exp;
+        sigA = normExpSig.sig;
+    }
+    if ( ! expB ) {
+        if ( ! (sigB.v64 | sigB.v0) ) goto zero;
+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );
+        expB = normExpSig.exp;
+        sigB = normExpSig.sig;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    expZ = expA + expB - 0x4000;
+    sigA.v64 |= UINT64_C( 0x0001000000000000 );
+    sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 16 );
+    softfloat_mul128To256M( sigA.v64, sigA.v0, sigB.v64, sigB.v0, sig256Z );
+    sigZExtra = sig256Z[indexWord( 4, 1 )] | (sig256Z[indexWord( 4, 0 )] != 0);
+    sigZ =
+        softfloat_add128(
+            sig256Z[indexWord( 4, 3 )], sig256Z[indexWord( 4, 2 )],
+            sigA.v64, sigA.v0
+        );
+    if ( UINT64_C( 0x0002000000000000 ) <= sigZ.v64 ) {
+        ++expZ;
+        sig128Extra =
+            softfloat_shortShiftRightJam128Extra(
+                sigZ.v64, sigZ.v0, sigZExtra, 1 );
+        sigZ = sig128Extra.v;
+        sigZExtra = sig128Extra.extra;
+    }
+    return
+        softfloat_roundPackToF128( state, signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ propagateNaN:
+    uiZ = softfloat_propagateNaNF128UI( state, uiA64, uiA0, uiB64, uiB0 );
+    goto uiZ;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ infArg:
+    if ( ! magBits ) {
+        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        uiZ.v64 = defaultNaNF128UI64;
+        uiZ.v0  = defaultNaNF128UI0;
+        goto uiZ;
+    }
+    uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );
+    goto uiZ0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ zero:
+    uiZ.v64 = packToF128UI64( signZ, 0, 0 );
+ uiZ0:
+    uiZ.v0 = 0;
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_mulAdd.c

@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+float128_t f128_mulAdd( struct softfloat_state *state, float128_t a, float128_t b, float128_t c )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    union ui128_f128 uC;
+    uint_fast64_t uiC64, uiC0;
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    uC.f = c;
+    uiC64 = uC.ui.v64;
+    uiC0  = uC.ui.v0;
+    return softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 );
+
+}
+

External/SoftFloat-3e/src/f128_rem.c

@@ -0,0 +1,190 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t f128_rem( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    int_fast32_t expA;
+    struct uint128 sigA;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    int_fast32_t expB;
+    struct uint128 sigB;
+    struct exp32_sig128 normExpSig;
+    struct uint128 rem;
+    int_fast32_t expDiff;
+    uint_fast32_t q, recip32;
+    uint_fast64_t q64;
+    struct uint128 term, altRem, meanRem;
+    bool signRem;
+    struct uint128 uiZ;
+    union ui128_f128 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    expA  = expF128UI64( uiA64 );
+    sigA.v64 = fracF128UI64( uiA64 );
+    sigA.v0  = uiA0;
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    expB  = expF128UI64( uiB64 );
+    sigB.v64 = fracF128UI64( uiB64 );
+    sigB.v0  = uiB0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( expA == 0x7FFF ) {
+        if (
+            (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0))
+        ) {
+            goto propagateNaN;
+        }
+        goto invalid;
+    }
+    if ( expB == 0x7FFF ) {
+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
+        return a;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ! expB ) {
+        if ( ! (sigB.v64 | sigB.v0) ) goto invalid;
+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );
+        expB = normExpSig.exp;
+        sigB = normExpSig.sig;
+    }
+    if ( ! expA ) {
+        if ( ! (sigA.v64 | sigA.v0) ) return a;
+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );
+        expA = normExpSig.exp;
+        sigA = normExpSig.sig;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    sigA.v64 |= UINT64_C( 0x0001000000000000 );
+    sigB.v64 |= UINT64_C( 0x0001000000000000 );
+    rem = sigA;
+    expDiff = expA - expB;
+    if ( expDiff < 1 ) {
+        if ( expDiff < -1 ) return a;
+        if ( expDiff ) {
+            --expB;
+            sigB = softfloat_add128( sigB.v64, sigB.v0, sigB.v64, sigB.v0 );
+            q = 0;
+        } else {
+            q = softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 );
+            if ( q ) {
+                rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+            }
+        }
+    } else {
+        recip32 = softfloat_approxRecip32_1( sigB.v64>>17 );
+        expDiff -= 30;
+        for (;;) {
+            q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32;
+            if ( expDiff < 0 ) break;
+            q = (q64 + 0x80000000)>>32;
+            rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+            term = softfloat_mul128By32( sigB.v64, sigB.v0, q );
+            rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+            if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+                rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+            }
+            expDiff -= 29;
+        }
+        /*--------------------------------------------------------------------
+        | (`expDiff' cannot be less than -29 here.)
+        *--------------------------------------------------------------------*/
+        q = (uint32_t) (q64>>32)>>(~expDiff & 31);
+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 );
+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );
+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+            altRem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+            goto selectRem;
+        }
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    do {
+        altRem = rem;
+        ++q;
+        rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );
+    } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) );
+ selectRem:
+    meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 );
+    if (
+        (meanRem.v64 & UINT64_C( 0x8000000000000000 ))
+            || (! (meanRem.v64 | meanRem.v0) && (q & 1))
+    ) {
+        rem = altRem;
+    }
+    signRem = signA;
+    if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+        signRem = ! signRem;
+        rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 );
+    }
+    return softfloat_normRoundPackToF128( state, signRem, expB - 1, rem.v64, rem.v0 );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ propagateNaN:
+    uiZ = softfloat_propagateNaNF128UI( state, uiA64, uiA0, uiB64, uiB0 );
+    goto uiZ;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ invalid:
+    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    uiZ.v64 = defaultNaNF128UI64;
+    uiZ.v0  = defaultNaNF128UI0;
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_sqrt.c

@@ -0,0 +1,201 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t f128_sqrt( struct softfloat_state *state, float128_t a )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    int_fast32_t expA;
+    struct uint128 sigA, uiZ;
+    struct exp32_sig128 normExpSig;
+    int_fast32_t expZ;
+    uint_fast32_t sig32A, recipSqrt32, sig32Z;
+    struct uint128 rem;
+    uint32_t qs[3];
+    uint_fast32_t q;
+    uint_fast64_t x64, sig64Z;
+    struct uint128 y, term;
+    uint_fast64_t sigZExtra;
+    struct uint128 sigZ;
+    union ui128_f128 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    expA  = expF128UI64( uiA64 );
+    sigA.v64 = fracF128UI64( uiA64 );
+    sigA.v0  = uiA0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( expA == 0x7FFF ) {
+        if ( sigA.v64 | sigA.v0 ) {
+            uiZ = softfloat_propagateNaNF128UI( state, uiA64, uiA0, 0, 0 );
+            goto uiZ;
+        }
+        if ( ! signA ) return a;
+        goto invalid;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( signA ) {
+        if ( ! (expA | sigA.v64 | sigA.v0) ) return a;
+        goto invalid;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ! expA ) {
+        if ( ! (sigA.v64 | sigA.v0) ) return a;
+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );
+        expA = normExpSig.exp;
+        sigA = normExpSig.sig;
+    }
+    /*------------------------------------------------------------------------
+    | (`sig32Z' is guaranteed to be a lower bound on the square root of
+    | `sig32A', which makes `sig32Z' also a lower bound on the square root of
+    | `sigA'.)
+    *------------------------------------------------------------------------*/
+    expZ = ((expA - 0x3FFF)>>1) + 0x3FFE;
+    expA &= 1;
+    sigA.v64 |= UINT64_C( 0x0001000000000000 );
+    sig32A = sigA.v64>>17;
+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );
+    sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32;
+    if ( expA ) {
+        sig32Z >>= 1;
+        rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 12 );
+    } else {
+        rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 13 );
+    }
+    qs[2] = sig32Z;
+    rem.v64 -= (uint_fast64_t) sig32Z * sig32Z;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32;
+    x64 = (uint_fast64_t) sig32Z<<32;
+    sig64Z = x64 + ((uint_fast64_t) q<<3);
+    y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+    /*------------------------------------------------------------------------
+    | (Repeating this loop is a rare occurrence.)
+    *------------------------------------------------------------------------*/
+    for (;;) {
+        term = softfloat_mul64ByShifted32To128( x64 + sig64Z, q );
+        rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );
+        if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;
+        --q;
+        sig64Z -= 1<<3;
+    }
+    qs[1] = q;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    q = ((rem.v64>>2) * recipSqrt32)>>32;
+    y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+    sig64Z <<= 1;
+    /*------------------------------------------------------------------------
+    | (Repeating this loop is a rare occurrence.)
+    *------------------------------------------------------------------------*/
+    for (;;) {
+        term = softfloat_shortShiftLeft128( 0, sig64Z, 32 );
+        term = softfloat_add128( term.v64, term.v0, 0, (uint_fast64_t) q<<6 );
+        term = softfloat_mul128By32( term.v64, term.v0, q );
+        rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );
+        if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;
+        --q;
+    }
+    qs[0] = q;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    q = (((rem.v64>>2) * recipSqrt32)>>32) + 2;
+    sigZExtra = (uint64_t) ((uint_fast64_t) q<<59);
+    term = softfloat_shortShiftLeft128( 0, qs[1], 53 );
+    sigZ =
+        softfloat_add128(
+            (uint_fast64_t) qs[2]<<18, ((uint_fast64_t) qs[0]<<24) + (q>>5),
+            term.v64, term.v0
+        );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( (q & 0xF) <= 2 ) {
+        q &= ~3;
+        sigZExtra = (uint64_t) ((uint_fast64_t) q<<59);
+        y = softfloat_shortShiftLeft128( sigZ.v64, sigZ.v0, 6 );
+        y.v0 |= sigZExtra>>58;
+        term = softfloat_sub128( y.v64, y.v0, 0, q );
+        y    = softfloat_mul64ByShifted32To128( term.v0,  q );
+        term = softfloat_mul64ByShifted32To128( term.v64, q );
+        term = softfloat_add128( term.v64, term.v0, 0, y.v64 );
+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 20 );
+        term = softfloat_sub128( term.v64, term.v0, rem.v64, rem.v0 );
+        /*--------------------------------------------------------------------
+        | The concatenation of `term' and `y.v0' is now the negative remainder
+        | (3 words altogether).
+        *--------------------------------------------------------------------*/
+        if ( term.v64 & UINT64_C( 0x8000000000000000 ) ) {
+            sigZExtra |= 1;
+        } else {
+            if ( term.v64 | term.v0 | y.v0 ) {
+                if ( sigZExtra ) {
+                    --sigZExtra;
+                } else {
+                    sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, 0, 1 );
+                    sigZExtra = ~0;
+                }
+            }
+        }
+    }
+    return softfloat_roundPackToF128( state, 0, expZ, sigZ.v64, sigZ.v0, sigZExtra );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ invalid:
+    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    uiZ.v64 = defaultNaNF128UI64;
+    uiZ.v0  = defaultNaNF128UI0;
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_sub.c

@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+float128_t f128_sub( struct softfloat_state *state, float128_t a, float128_t b )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool signA;
+    union ui128_f128 uB;
+    uint_fast64_t uiB64, uiB0;
+    bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+    float128_t
+        (*magsFuncPtr)(
+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
+#endif
+
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    signA = signF128UI64( uiA64 );
+    uB.f = b;
+    uiB64 = uB.ui.v64;
+    uiB0  = uB.ui.v0;
+    signB = signF128UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+    if ( signA == signB ) {
+        return softfloat_subMagsF128( state, uiA64, uiA0, uiB64, uiB0, signA );
+    } else {
+        return softfloat_addMagsF128( state, uiA64, uiA0, uiB64, uiB0, signA );
+    }
+#else
+    magsFuncPtr =
+        (signA == signB) ? softfloat_subMagsF128 : softfloat_addMagsF128;
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+

External/SoftFloat-3e/src/f128_to_f16.c

@@ -0,0 +1,95 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float16_t f128_to_f16( struct softfloat_state *state, float128_t a )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t frac64;
+    struct commonNaN commonNaN;
+    uint_fast16_t uiZ, frac16;
+    union ui16_f16 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0);
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp == 0x7FFF ) {
+        if ( frac64 ) {
+            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );
+        } else {
+            uiZ = packToF16UI( sign, 0x1F, 0 );
+        }
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    frac16 = softfloat_shortShiftRightJam64( frac64, 34 );
+    if ( ! (exp | frac16) ) {
+        uiZ = packToF16UI( sign, 0, 0 );
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    exp -= 0x3FF1;
+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+        if ( exp < -0x40 ) exp = -0x40;
+    }
+    return softfloat_roundPackToF16( sign, exp, frac16 | 0x4000 );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_to_f32.c

@@ -0,0 +1,95 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float32_t f128_to_f32( struct softfloat_state *state, float128_t a )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t frac64;
+    struct commonNaN commonNaN;
+    uint_fast32_t uiZ, frac32;
+    union ui32_f32 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0);
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp == 0x7FFF ) {
+        if ( frac64 ) {
+            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );
+        } else {
+            uiZ = packToF32UI( sign, 0xFF, 0 );
+        }
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    frac32 = softfloat_shortShiftRightJam64( frac64, 18 );
+    if ( ! (exp | frac32) ) {
+        uiZ = packToF32UI( sign, 0, 0 );
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    exp -= 0x3F81;
+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+        if ( exp < -0x1000 ) exp = -0x1000;
+    }
+    return softfloat_roundPackToF32( state, sign, exp, frac32 | 0x40000000 );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_to_f64.c

@@ -0,0 +1,100 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float64_t f128_to_f64( struct softfloat_state *state, float128_t a )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t frac64, frac0;
+    struct commonNaN commonNaN;
+    uint_fast64_t uiZ;
+    struct uint128 frac128;
+    union ui64_f64 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    frac64 = fracF128UI64( uiA64 );
+    frac0  = uiA0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp == 0x7FFF ) {
+        if ( frac64 | frac0 ) {
+            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );
+        } else {
+            uiZ = packToF64UI( sign, 0x7FF, 0 );
+        }
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    frac128 = softfloat_shortShiftLeft128( frac64, frac0, 14 );
+    frac64 = frac128.v64 | (frac128.v0 != 0);
+    if ( ! (exp | frac64) ) {
+        uiZ = packToF64UI( sign, 0, 0 );
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    exp -= 0x3C01;
+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+        if ( exp < -0x1000 ) exp = -0x1000;
+    }
+    return
+        softfloat_roundPackToF64(
+            state, sign, exp, frac64 | UINT64_C( 0x4000000000000000 ) );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/f128_to_i32.c

@@ -0,0 +1,85 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast32_t f128_to_i32( struct softfloat_state *state, float128_t a, uint_fast8_t roundingMode, bool exact )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t sig64, sig0;
+    int_fast32_t shiftDist;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    sig64 = fracF128UI64( uiA64 );
+    sig0  = uiA0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)
+    if ( (exp == 0x7FFF) && (sig64 | sig0) ) {
+#if (i32_fromNaN == i32_fromPosOverflow)
+        sign = 0;
+#elif (i32_fromNaN == i32_fromNegOverflow)
+        sign = 1;
+#else
+        softfloat_raiseFlags( softfloat_flag_invalid );
+        return i32_fromNaN;
+#endif
+    }
+#endif
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );
+    sig64 |= (sig0 != 0);
+    shiftDist = 0x4023 - exp;
+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );
+    return softfloat_roundToI32( state, sign, sig64, roundingMode, exact );
+
+}
+

External/SoftFloat-3e/src/f128_to_i64.c

@@ -0,0 +1,95 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast64_t f128_to_i64( struct softfloat_state *state, float128_t a, uint_fast8_t roundingMode, bool exact )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t sig64, sig0;
+    int_fast32_t shiftDist;
+    struct uint128 sig128;
+    struct uint64_extra sigExtra;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    sig64 = fracF128UI64( uiA64 );
+    sig0  = uiA0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    shiftDist = 0x402F - exp;
+    if ( shiftDist <= 0 ) {
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        if ( shiftDist < -15 ) {
+            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            return
+                (exp == 0x7FFF) && (sig64 | sig0) ? i64_fromNaN
+                    : sign ? i64_fromNegOverflow : i64_fromPosOverflow;
+        }
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        sig64 |= UINT64_C( 0x0001000000000000 );
+        if ( shiftDist ) {
+            sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist );
+            sig64 = sig128.v64;
+            sig0  = sig128.v0;
+        }
+    } else {
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );
+        sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist );
+        sig64 = sigExtra.v;
+        sig0  = sigExtra.extra;
+    }
+    return softfloat_roundToI64( state, sign, sig64, sig0, roundingMode, exact );
+
+}
+

External/SoftFloat-3e/src/f128_to_ui32.c

@@ -0,0 +1,86 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast32_t
+ f128_to_ui32( struct softfloat_state *state, float128_t a, uint_fast8_t roundingMode, bool exact )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t sig64;
+    int_fast32_t shiftDist;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0);
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)
+    if ( (exp == 0x7FFF) && sig64 ) {
+#if (ui32_fromNaN == ui32_fromPosOverflow)
+        sign = 0;
+#elif (ui32_fromNaN == ui32_fromNegOverflow)
+        sign = 1;
+#else
+        softfloat_raiseFlags( softfloat_flag_invalid );
+        return ui32_fromNaN;
+#endif
+    }
+#endif
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );
+    shiftDist = 0x4023 - exp;
+    if ( 0 < shiftDist ) {
+        sig64 = softfloat_shiftRightJam64( sig64, shiftDist );
+    }
+    return softfloat_roundToUI32( sign, sig64, roundingMode, exact );
+
+}
+

External/SoftFloat-3e/src/f128_to_ui64.c

@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast64_t
+ f128_to_ui64( struct softfloat_state *state, float128_t a, uint_fast8_t roundingMode, bool exact )
+{
+    union ui128_f128 uA;
+    uint_fast64_t uiA64, uiA0;
+    bool sign;
+    int_fast32_t exp;
+    uint_fast64_t sig64, sig0;
+    int_fast32_t shiftDist;
+    struct uint128 sig128;
+    struct uint64_extra sigExtra;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA64 = uA.ui.v64;
+    uiA0  = uA.ui.v0;
+    sign  = signF128UI64( uiA64 );
+    exp   = expF128UI64( uiA64 );
+    sig64 = fracF128UI64( uiA64 );
+    sig0  = uiA0;
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    shiftDist = 0x402F - exp;
+    if ( shiftDist <= 0 ) {
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        if ( shiftDist < -15 ) {
+            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            return
+                (exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN
+                    : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
+        }
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        sig64 |= UINT64_C( 0x0001000000000000 );
+        if ( shiftDist ) {
+            sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist );
+            sig64 = sig128.v64;
+            sig0  = sig128.v0;
+        }
+    } else {
+        /*--------------------------------------------------------------------
+        *--------------------------------------------------------------------*/
+        if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );
+        sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist );
+        sig64 = sigExtra.v;
+        sig0  = sigExtra.extra;
+    }
+    return softfloat_roundToUI64( state, sign, sig64, sig0, roundingMode, exact );
+
+}
+

External/SoftFloat-3e/src/f32_to_f128.c

@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t f32_to_f128( struct softfloat_state *state, float32_t a )
+{
+    union ui32_f32 uA;
+    uint_fast32_t uiA;
+    bool sign;
+    int_fast16_t exp;
+    uint_fast32_t frac;
+    struct commonNaN commonNaN;
+    struct uint128 uiZ;
+    struct exp16_sig32 normExpSig;
+    union ui128_f128 uZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uA.f = a;
+    uiA = uA.ui;
+    sign = signF32UI( uiA );
+    exp  = expF32UI( uiA );
+    frac = fracF32UI( uiA );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( exp == 0xFF ) {
+        if ( frac ) {
+            softfloat_f32UIToCommonNaN( state, uiA, &commonNaN );
+            uiZ = softfloat_commonNaNToF128UI( &commonNaN );
+        } else {
+            uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 );
+            uiZ.v0  = 0;
+        }
+        goto uiZ;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( ! exp ) {
+        if ( ! frac ) {
+            uiZ.v64 = packToF128UI64( sign, 0, 0 );
+            uiZ.v0  = 0;
+            goto uiZ;
+        }
+        normExpSig = softfloat_normSubnormalF32Sig( frac );
+        exp = normExpSig.exp - 1;
+        frac = normExpSig.sig;
+    }
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    uiZ.v64 = packToF128UI64( sign, exp + 0x3F80, (uint_fast64_t) frac<<25 );
+    uiZ.v0  = 0;
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/i32_to_f128.c

@@ -0,0 +1,64 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+float128_t i32_to_f128( int32_t a )
+{
+    uint_fast64_t uiZ64;
+    bool sign;
+    uint_fast32_t absA;
+    int_fast8_t shiftDist;
+    union ui128_f128 uZ;
+
+    uiZ64 = 0;
+    if ( a ) {
+        sign = (a < 0);
+        absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;
+        shiftDist = softfloat_countLeadingZeros32( absA ) + 17;
+        uiZ64 =
+            packToF128UI64(
+                sign, 0x402E - shiftDist, (uint_fast64_t) absA<<shiftDist );
+    }
+    uZ.ui.v64 = uiZ64;
+    uZ.ui.v0  = 0;
+    return uZ.f;
+
+}
+

External/SoftFloat-3e/src/internals.h

@@ -196,16 +196,20 @@ struct exp32_sig128
 
 float128_t
  softfloat_roundPackToF128(
+     struct softfloat_state *,
      bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast64_t );
 float128_t
  softfloat_normRoundPackToF128(
+     struct softfloat_state *,
      bool, int_fast32_t, uint_fast64_t, uint_fast64_t );
 
 float128_t
  softfloat_addMagsF128(
+     struct softfloat_state *,
      uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
 float128_t
  softfloat_subMagsF128(
+     struct softfloat_state *,
      uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
 float128_t
  softfloat_mulAddF128(

External/SoftFloat-3e/src/s_addMagsF128.c

@@ -0,0 +1,155 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+
+float128_t
+ softfloat_addMagsF128(
+     struct softfloat_state *state,
+     uint_fast64_t uiA64,
+     uint_fast64_t uiA0,
+     uint_fast64_t uiB64,
+     uint_fast64_t uiB0,
+     bool signZ
+ )
+{
+    int_fast32_t expA;
+    struct uint128 sigA;
+    int_fast32_t expB;
+    struct uint128 sigB;
+    int_fast32_t expDiff;
+    struct uint128 uiZ, sigZ;
+    int_fast32_t expZ;
+    uint_fast64_t sigZExtra;
+    struct uint128_extra sig128Extra;
+    union ui128_f128 uZ;
+
+    expA = expF128UI64( uiA64 );
+    sigA.v64 = fracF128UI64( uiA64 );
+    sigA.v0  = uiA0;
+    expB = expF128UI64( uiB64 );
+    sigB.v64 = fracF128UI64( uiB64 );
+    sigB.v0  = uiB0;
+    expDiff = expA - expB;
+    if ( ! expDiff ) {
+        if ( expA == 0x7FFF ) {
+            if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN;
+            uiZ.v64 = uiA64;
+            uiZ.v0  = uiA0;
+            goto uiZ;
+        }
+        sigZ = softfloat_add128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 );
+        if ( ! expA ) {
+            uiZ.v64 = packToF128UI64( signZ, 0, sigZ.v64 );
+            uiZ.v0  = sigZ.v0;
+            goto uiZ;
+        }
+        expZ = expA;
+        sigZ.v64 |= UINT64_C( 0x0002000000000000 );
+        sigZExtra = 0;
+        goto shiftRight1;
+    }
+    if ( expDiff < 0 ) {
+        if ( expB == 0x7FFF ) {
+            if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
+            uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );
+            uiZ.v0  = 0;
+            goto uiZ;
+        }
+        expZ = expB;
+        if ( expA ) {
+            sigA.v64 |= UINT64_C( 0x0001000000000000 );
+        } else {
+            ++expDiff;
+            sigZExtra = 0;
+            if ( ! expDiff ) goto newlyAligned;
+        }
+        sig128Extra =
+            softfloat_shiftRightJam128Extra( sigA.v64, sigA.v0, 0, -expDiff );
+        sigA = sig128Extra.v;
+        sigZExtra = sig128Extra.extra;
+    } else {
+        if ( expA == 0x7FFF ) {
+            if ( sigA.v64 | sigA.v0 ) goto propagateNaN;
+            uiZ.v64 = uiA64;
+            uiZ.v0  = uiA0;
+            goto uiZ;
+        }
+        expZ = expA;
+        if ( expB ) {
+            sigB.v64 |= UINT64_C( 0x0001000000000000 );
+        } else {
+            --expDiff;
+            sigZExtra = 0;
+            if ( ! expDiff ) goto newlyAligned;
+        }
+        sig128Extra =
+            softfloat_shiftRightJam128Extra( sigB.v64, sigB.v0, 0, expDiff );
+        sigB = sig128Extra.v;
+        sigZExtra = sig128Extra.extra;
+    }
+ newlyAligned:
+    sigZ =
+        softfloat_add128(
+            sigA.v64 | UINT64_C( 0x0001000000000000 ),
+            sigA.v0,
+            sigB.v64,
+            sigB.v0
+        );
+    --expZ;
+    if ( sigZ.v64 < UINT64_C( 0x0002000000000000 ) ) goto roundAndPack;
+    ++expZ;
+ shiftRight1:
+    sig128Extra =
+        softfloat_shortShiftRightJam128Extra(
+            sigZ.v64, sigZ.v0, sigZExtra, 1 );
+    sigZ = sig128Extra.v;
+    sigZExtra = sig128Extra.extra;
+ roundAndPack:
+    return
+        softfloat_roundPackToF128( state, signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );
+ propagateNaN:
+    uiZ = softfloat_propagateNaNF128UI( state, uiA64, uiA0, uiB64, uiB0 );
+ uiZ:
+    uZ.ui = uiZ;
+    return uZ.f;
+
+}
+