mirror of
https://github.com/FEX-Emu/FEX.git
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InstCountCI: Update
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed
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5243f50ed1
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e1124480be
4 files changed
+49
-86
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@@ -1364,7 +1364,7 @@
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},
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"Sekiro spill block": {
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"x86InstructionCount": 119,
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"ExpectedInstructionCount": 118,
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"ExpectedInstructionCount": 115,
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"Comment": [
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"This block of code came from the settings screen when it loaded",
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"It was originally at RIP: 0x14232cca0 and has been deobfuscated"
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@@ -1535,8 +1535,7 @@
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"asr w4, w4, #25",
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"mul w4, w4, w20",
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"add w10, w10, w4",
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"mov w4, w10",
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"asr w4, w4, #26",
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"asr w4, w10, #26",
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"add w9, w9, w4",
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"lsl w4, w4, #26",
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"sub w10, w10, w4",
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@@ -1563,8 +1562,7 @@
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"add w17, w17, w13",
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"str w19, [x4, #8]",
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"lsl w13, w13, #26",
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"mov w14, w17",
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"asr w14, w14, #25",
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"asr w14, w17, #25",
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"sub w16, w16, w13",
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"add w15, w15, w14",
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"str w29, [x4, #12]",
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@@ -1597,8 +1595,7 @@
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"ldr w4, [x8]",
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"sub w4, w4, w11",
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"str w4, [x10, #32]",
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"mov w4, w7",
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"and w4, w4, #0xfe000000",
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"and w4, w7, #0xfe000000",
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"sub w7, w7, w4",
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"str w7, [x10, #36]",
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"mvn w27, w8",
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@@ -17,7 +17,7 @@
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"Instructions": {
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"libnss3 sha": {
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"x86InstructionCount": 168,
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"ExpectedInstructionCount": 534,
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"ExpectedInstructionCount": 521,
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"Comment": [
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"This block of code comes from libnss3 which causes panic spilling in FEX's RA.",
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"This code is hit in steamwebhelper calling in to this function.",
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@@ -203,8 +203,7 @@
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"ext v18.16b, v2.16b, v2.16b, #8",
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"ldr q22, [x11, #32]",
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"ldr q21, [x11, #48]",
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"mov v19.16b, v16.16b",
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"ext v19.16b, v18.16b, v19.16b, #8",
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"ext v19.16b, v18.16b, v16.16b, #8",
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"mov v18.d[1], v16.d[1]",
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"mov w20, #0x1000",
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"movk w20, #0x1, lsl #16",
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@@ -248,8 +247,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v21.16b",
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"ext v16.16b, v22.16b, v16.16b, #4",
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"ext v16.16b, v22.16b, v21.16b, #4",
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"add v24.4s, v24.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v24.16b, v24.16b, #12",
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@@ -281,8 +279,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v24.16b",
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"ext v16.16b, v21.16b, v16.16b, #4",
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"ext v16.16b, v21.16b, v24.16b, #4",
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"add v23.4s, v23.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v23.16b, v23.16b, #12",
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@@ -314,8 +311,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v23.16b",
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"ext v16.16b, v24.16b, v16.16b, #4",
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"ext v16.16b, v24.16b, v23.16b, #4",
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"add v22.4s, v22.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v22.16b, v22.16b, #12",
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@@ -347,8 +343,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v22.16b",
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"ext v16.16b, v23.16b, v16.16b, #4",
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"ext v16.16b, v23.16b, v22.16b, #4",
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"add v21.4s, v21.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v21.16b, v21.16b, #12",
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@@ -380,8 +375,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v21.16b",
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"ext v16.16b, v22.16b, v16.16b, #4",
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"ext v16.16b, v22.16b, v21.16b, #4",
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"add v24.4s, v24.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v24.16b, v24.16b, #12",
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@@ -413,8 +407,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v24.16b",
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"ext v16.16b, v21.16b, v16.16b, #4",
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"ext v16.16b, v21.16b, v24.16b, #4",
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"add v23.4s, v23.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v23.16b, v23.16b, #12",
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@@ -446,8 +439,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v23.16b",
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"ext v16.16b, v24.16b, v16.16b, #4",
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"ext v16.16b, v24.16b, v23.16b, #4",
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"add v22.4s, v22.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v22.16b, v22.16b, #12",
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@@ -479,8 +471,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v22.16b",
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"ext v16.16b, v23.16b, v16.16b, #4",
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"ext v16.16b, v23.16b, v22.16b, #4",
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"add v21.4s, v21.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v21.16b, v21.16b, #12",
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@@ -512,8 +503,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v21.16b",
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"ext v16.16b, v22.16b, v16.16b, #4",
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"ext v16.16b, v22.16b, v21.16b, #4",
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"add v24.4s, v24.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v24.16b, v24.16b, #12",
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@@ -545,8 +535,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v24.16b",
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"ext v16.16b, v21.16b, v16.16b, #4",
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"ext v16.16b, v21.16b, v24.16b, #4",
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"add v23.4s, v23.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v23.16b, v23.16b, #12",
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@@ -578,8 +567,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v23.16b",
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"ext v16.16b, v24.16b, v16.16b, #4",
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"ext v16.16b, v24.16b, v23.16b, #4",
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"add v22.4s, v22.4s, v16.4s",
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"ldr q16, [x29, x20, sxtx]",
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"ext v2.16b, v22.16b, v22.16b, #12",
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@@ -611,8 +599,7 @@
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"sha256h2 q3, q2, v4.4s",
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"zip2 v2.2d, v3.2d, v5.2d",
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"rev64 v17.4s, v2.4s",
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"mov v16.16b, v22.16b",
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"ext v16.16b, v23.16b, v16.16b, #4",
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"ext v16.16b, v23.16b, v22.16b, #4",
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"ldr q2, [x29, x20, sxtx]",
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"add v23.4s, v23.4s, v2.4s",
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"add v21.4s, v21.4s, v16.4s",
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@@ -14,7 +14,7 @@
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"Instructions": {
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"The Witcher 3": {
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"x86InstructionCount": 7,
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"ExpectedInstructionCount": 10,
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"ExpectedInstructionCount": 9,
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"x86Insts": [
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"mov eax, 0x1",
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"lock xadd qword [rcx], rax",
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@@ -27,8 +27,7 @@
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"ExpectedArm64ASM": [
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"mov w4, #0x1",
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"ldaddal x4, x4, [x7]",
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"mov x5, x4",
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"and w5, w5, #0x1f",
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"and w5, w4, #0x1f",
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"add x5, x5, #0x1 (1)",
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"lsl x5, x5, #6",
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"eor x27, x5, x7",
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@@ -203,7 +202,7 @@
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},
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"bytemark num sort": {
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"x86InstructionCount": 4,
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"ExpectedInstructionCount": 6,
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"ExpectedInstructionCount": 5,
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"Comment": [
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"Saw this in bytemark"
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],
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@@ -215,8 +214,7 @@
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],
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"ExpectedArm64ASM": [
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"ldr x17, [x10, x13, sxtx #3]",
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"mov x15, x13",
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"orr x15, x15, #0x1",
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"orr x15, x13, #0x1",
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"ldr x20, [x10, x15, sxtx #3]",
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"eor x27, x17, x20",
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"subs x26, x17, x20"
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@@ -289,7 +287,7 @@
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},
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"bytemark huffman 1": {
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"x86InstructionCount": 18,
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"ExpectedInstructionCount": 23,
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"ExpectedInstructionCount": 21,
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"x86Insts": [
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"mov r9,rdx",
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"mov r8,rcx",
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@@ -313,11 +311,9 @@
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"ExpectedArm64ASM": [
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||||
"mov x13, x5",
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"mov x12, x7",
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"mov w14, w10",
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"lsr w14, w14, #3",
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"lsr w14, w10, #3",
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"ldrb w14, [x9, x14, sxtx]",
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"mov w15, w10",
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"and w15, w15, #0x7",
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"and w15, w10, #0x7",
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"lsr w20, w14, w15",
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||||
"rmif x20, #63, #nzCv",
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||||
"add x12, x12, x12, lsl #2",
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@@ -373,7 +369,7 @@
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},
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||||
"bytemark huffman 3": {
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||||
"x86InstructionCount": 19,
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||||
"ExpectedInstructionCount": 36,
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||||
"ExpectedInstructionCount": 34,
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||||
"x86Insts": [
|
||||
"mov ecx,eax",
|
||||
"and cl,0x7",
|
||||
@@ -396,14 +392,12 @@
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"add rdi,0xffffffffffffffff"
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||||
],
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"ExpectedArm64ASM": [
|
||||
"mov w7, w4",
|
||||
"and x7, x7, #0xffffffffffffff07",
|
||||
"and w7, w4, #0xffffff07",
|
||||
"mov w20, #0x1",
|
||||
"bfxil x12, x20, #0, #8",
|
||||
"lsl w20, w12, w7",
|
||||
"bfxil x12, x20, #0, #8",
|
||||
"mov w13, w4",
|
||||
"lsr w13, w13, #3",
|
||||
"lsr w13, w4, #3",
|
||||
"ldrb w14, [x9, x13, sxtx]",
|
||||
"mov w20, #0xfe",
|
||||
"bfxil x15, x20, #0, #8",
|
||||
@@ -480,7 +474,7 @@
|
||||
},
|
||||
"000000000020e9bd <DoNNetIteration+0x21d>:": {
|
||||
"x86InstructionCount": 35,
|
||||
"ExpectedInstructionCount": 55,
|
||||
"ExpectedInstructionCount": 53,
|
||||
"x86Insts": [
|
||||
"mov rsi,0xfffffffffffffee8",
|
||||
"xchg ax,ax",
|
||||
@@ -534,8 +528,7 @@
|
||||
"mul x5, x4, x20",
|
||||
"lsr x5, x5, #32",
|
||||
"add w5, w5, w4",
|
||||
"mov w11, w5",
|
||||
"lsr w11, w11, #31",
|
||||
"lsr w11, w5, #31",
|
||||
"asr w5, w5, #19",
|
||||
"add w5, w5, w11",
|
||||
"mov w20, #0x408b",
|
||||
@@ -546,8 +539,7 @@
|
||||
"mov w20, #0xb589",
|
||||
"movk w20, #0x14f8, lsl #16",
|
||||
"mul x11, x5, x20",
|
||||
"mov x12, x11",
|
||||
"lsr x12, x12, #63",
|
||||
"lsr x12, x11, #63",
|
||||
"asr x11, x11, #45",
|
||||
"add w11, w11, w12",
|
||||
"mov w20, #0x86a0",
|
||||
@@ -693,7 +685,7 @@
|
||||
},
|
||||
"bytemark strsift": {
|
||||
"x86InstructionCount": 15,
|
||||
"ExpectedInstructionCount": 20,
|
||||
"ExpectedInstructionCount": 19,
|
||||
"x86Insts": [
|
||||
"mov rsi,rdx",
|
||||
"and rsi,0xfffffffffffffffc",
|
||||
@@ -712,8 +704,7 @@
|
||||
"cmp rsi,r8"
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"mov x10, x5",
|
||||
"and x10, x10, #0xfffffffffffffffc",
|
||||
"and x10, x5, #0xfffffffffffffffc",
|
||||
"fmov d16, x7",
|
||||
"dup v16.2d, v16.d[0]",
|
||||
"ldr x11, [x8, #32]",
|
||||
@@ -736,7 +727,7 @@
|
||||
},
|
||||
"bytemark idea 1": {
|
||||
"x86InstructionCount": 8,
|
||||
"ExpectedInstructionCount": 12,
|
||||
"ExpectedInstructionCount": 11,
|
||||
"x86Insts": [
|
||||
"movzx eax,ax",
|
||||
"imul r8d,eax",
|
||||
@@ -750,8 +741,7 @@
|
||||
"ExpectedArm64ASM": [
|
||||
"uxth w4, w4",
|
||||
"mul w12, w12, w4",
|
||||
"mov w4, w12",
|
||||
"lsr w4, w4, #16",
|
||||
"lsr w4, w12, #16",
|
||||
"uxth w13, w12",
|
||||
"sub w12, w12, w4",
|
||||
"cmp w13, w4",
|
||||
@@ -764,7 +754,7 @@
|
||||
},
|
||||
"bytemark idea 2": {
|
||||
"x86InstructionCount": 12,
|
||||
"ExpectedInstructionCount": 16,
|
||||
"ExpectedInstructionCount": 15,
|
||||
"x86Insts": [
|
||||
"movzx eax,ax",
|
||||
"imul r10d,eax",
|
||||
@@ -782,8 +772,7 @@
|
||||
"ExpectedArm64ASM": [
|
||||
"uxth w4, w4",
|
||||
"mul w14, w14, w4",
|
||||
"mov w4, w14",
|
||||
"lsr w4, w4, #16",
|
||||
"lsr w4, w14, #16",
|
||||
"uxth w10, w14",
|
||||
"sub w14, w14, w4",
|
||||
"cmp w10, w4",
|
||||
@@ -800,7 +789,7 @@
|
||||
},
|
||||
"bytemark idea 3": {
|
||||
"x86InstructionCount": 11,
|
||||
"ExpectedInstructionCount": 14,
|
||||
"ExpectedInstructionCount": 13,
|
||||
"x86Insts": [
|
||||
"movzx eax,si",
|
||||
"imul r8d,eax",
|
||||
@@ -817,8 +806,7 @@
|
||||
"ExpectedArm64ASM": [
|
||||
"uxth w4, w10",
|
||||
"mul w12, w12, w4",
|
||||
"mov w4, w12",
|
||||
"lsr w4, w4, #16",
|
||||
"lsr w4, w12, #16",
|
||||
"uxth w10, w12",
|
||||
"sub w12, w12, w4",
|
||||
"cmp w10, w4",
|
||||
|
||||
@@ -9486,7 +9486,7 @@
|
||||
},
|
||||
"Block3": {
|
||||
"x86InstructionCount": 702,
|
||||
"ExpectedInstructionCount": 104,
|
||||
"ExpectedInstructionCount": 95,
|
||||
"x86Insts": [
|
||||
"mov eax,dword [ebp + 0xffffff44]",
|
||||
"mov ecx,dword [eax + 0x4]",
|
||||
@@ -10195,8 +10195,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w7, w4",
|
||||
@@ -10204,8 +10203,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"add w4, w4, #0x1 (1)",
|
||||
"lsl w4, w4, #5",
|
||||
@@ -10214,8 +10212,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w4, #0x40 (64)",
|
||||
@@ -10224,8 +10221,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w7, w4",
|
||||
@@ -10234,8 +10230,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"add w4, w4, #0x1 (1)",
|
||||
"lsl w4, w4, #5",
|
||||
@@ -10245,8 +10240,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w4, #0x40 (64)",
|
||||
@@ -10256,8 +10250,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w7, w4",
|
||||
@@ -10266,8 +10259,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"add w4, w4, #0x1 (1)",
|
||||
"lsl w4, w4, #5",
|
||||
@@ -10277,8 +10269,7 @@
|
||||
"ldur w4, [x9, #-188]",
|
||||
"ldr w7, [x4, #4]",
|
||||
"ldur w5, [x9, #-132]",
|
||||
"mov x4, x5",
|
||||
"add w4, w4, w4",
|
||||
"add w4, w5, w5",
|
||||
"add w4, w4, w5",
|
||||
"lsl w4, w4, #5",
|
||||
"add w4, w4, #0x40 (64)",
|
||||
|
||||
Reference in new issue
Block a user