steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-06 19:00:17 +02:00
Code Issues Packages Projects Releases 66 Wiki Activity

InstCountCI: Update

Browse Source 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed 2025-03-25 15:23:58 -04:00
1 parent 694e674fe6
commit 4aa477de3e
9 files changed
+93 -93
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

unittests/InstructionCountCI/AVX128/VEX_map1.json
+6 -6
View File
@@ -4573,14 +4573,14 @@
"fcvtzs v5.2s, v5.2s",
"fcmgt v6.2d, v4.2d, v17.2d",
"shrn v6.2s, v6.2d, #32",
"bif v5.16b, v3.16b, v6.16b",
"frintz v6.2d, v2.2d",
"fcvtn v6.2s, v6.2d",
"fcvtzs v6.2s, v6.2s",
"bsl v6.16b, v5.16b, v3.16b",
"frintz v5.2d, v2.2d",
"fcvtn v5.2s, v5.2d",
"fcvtzs v5.2s, v5.2s",
"fcmgt v2.2d, v4.2d, v2.2d",
"shrn v2.2s, v2.2d, #32",
"bsl v2.16b, v6.16b, v3.16b",
"zip1 v16.2d, v5.2d, v2.2d",
"bsl v2.16b, v5.16b, v3.16b",
"zip1 v16.2d, v6.2d, v2.2d",
"stp xzr, xzr, [x28, #16]"
]
},
unittests/InstructionCountCI/AVX128/VEX_map3.json
+10 -10
View File
@@ -1870,8 +1870,8 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ext v16.16b, v18.16b, v17.16b, #1",
"ext v2.16b, v3.16b, v2.16b, #1",
"str q2, [x28, #16]"
"ext v3.16b, v3.16b, v2.16b, #1",
"str q3, [x28, #16]"
]
},
"vpalignr ymm0, ymm1, ymm2, 15": {
@@ -1883,8 +1883,8 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ext v16.16b, v18.16b, v17.16b, #15",
"ext v2.16b, v3.16b, v2.16b, #15",
"str q2, [x28, #16]"
"ext v3.16b, v3.16b, v2.16b, #15",
"str q3, [x28, #16]"
]
},
"vpalignr ymm0, ymm1, ymm2, 16": {
@@ -3419,8 +3419,8 @@
"mov v16.16b, v5.16b",
"bsl v16.16b, v18.16b, v17.16b",
"sshr v4.4s, v4.4s, #31",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
},
"vblendvpd xmm0, xmm1, xmm2, xmm3": {
@@ -3448,8 +3448,8 @@
"mov v16.16b, v5.16b",
"bsl v16.16b, v18.16b, v17.16b",
"sshr v4.2d, v4.2d, #63",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
},
"vpblendvb xmm0, xmm1, xmm2, xmm3": {
@@ -3477,8 +3477,8 @@
"mov v16.16b, v5.16b",
"bsl v16.16b, v18.16b, v17.16b",
"sshr v4.16b, v4.16b, #7",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
},
"vaeskeygenassist xmm0, xmm1, 0": {
unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json
+6 -6
View File
@@ -35,8 +35,8 @@
"movprfx z16, z18",
"bsl z16.d, z16.d, z17.d, z5.d",
"sshr v4.4s, v4.4s, #31",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
},
"vblendvpd xmm0, xmm1, xmm2, xmm3": {
@@ -64,8 +64,8 @@
"movprfx z16, z18",
"bsl z16.d, z16.d, z17.d, z5.d",
"sshr v4.2d, v4.2d, #63",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
},
"vpblendvb xmm0, xmm1, xmm2, xmm3": {
@@ -93,8 +93,8 @@
"movprfx z16, z18",
"bsl z16.d, z16.d, z17.d, z5.d",
"sshr v4.16b, v4.16b, #7",
"bit v2.16b, v3.16b, v4.16b",
"str q2, [x28, #16]"
"bsl v4.16b, v3.16b, v2.16b",
"str q4, [x28, #16]"
]
}
}
unittests/InstructionCountCI/AVX128/VEX_map_group.json
+2 -2
View File
@@ -647,8 +647,8 @@
"ldr q2, [x28, #32]",
"movi v3.2d, #0x0",
"ext v16.16b, v3.16b, v17.16b, #1",
"ext v2.16b, v3.16b, v2.16b, #1",
"str q2, [x28, #16]"
"ext v3.16b, v3.16b, v2.16b, #1",
"str q3, [x28, #16]"
]
},
"vpslldq ymm0, ymm1, 16": {
unittests/InstructionCountCI/DDD.json
+6 -6
View File
@@ -154,9 +154,9 @@
"ExpectedArm64ASM": [
"ldr d2, [x28, #1056]",
"ldr d3, [x28, #1040]",
"fcmgt v0.4s, v3.4s, v2.4s",
"bif v2.16b, v3.16b, v0.16b",
"str d2, [x28, #1040]",
"fcmgt v0.4s, v2.4s, v3.4s",
"bif v3.16b, v2.16b, v0.16b",
"str d3, [x28, #1040]",
"mov w20, #0xffff",
"strh w20, [x28, #1048]"
]
@@ -237,9 +237,9 @@
"ExpectedArm64ASM": [
"ldr d2, [x28, #1056]",
"ldr d3, [x28, #1040]",
"fcmgt v0.4s, v3.4s, v2.4s",
"bit v2.16b, v3.16b, v0.16b",
"str d2, [x28, #1040]",
"fcmgt v0.4s, v2.4s, v3.4s",
"bit v3.16b, v2.16b, v0.16b",
"str d3, [x28, #1040]",
"mov w20, #0xffff",
"strh w20, [x28, #1048]"
]
unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+53 -53
View File
@@ -1504,8 +1504,37 @@
"mov w20, #0x1",
"csetm x21, ls",
"dup v4.2d, x21",
"bit v2.16b, v3.16b, v4.16b",
"ldr s3, [x5, #4]",
"bsl v4.16b, v3.16b, v2.16b",
"ldr s2, [x5, #4]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
"stp x5, x6, [x28, #296]",
"str x8, [x28, #312]",
"sub sp, sp, #0x80 (128)",
"mov x0, sp",
"st1 {v2.2d, v3.2d}, [x0], #32",
"st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1296]",
"mov x1, x28",
"ldr x2, [x28, #1424]",
"blr x2",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
"ldp x4, x7, [x28, #280]",
"ldp x5, x6, [x28, #296]",
"ldr x8, [x28, #312]",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ldr x16, [sp], #16",
"ldp x17, x30, [sp], #16",
"mov v2.16b, v0.16b",
"ldr q3, [x28, #2944]",
"bic v2.16b, v2.16b, v3.16b",
"ldr s3, [x4, #4]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
@@ -1532,37 +1561,8 @@
"ldr x16, [sp], #16",
"ldp x17, x30, [sp], #16",
"mov v3.16b, v0.16b",
"ldr q4, [x28, #2944]",
"bic v3.16b, v3.16b, v4.16b",
"ldr s4, [x4, #4]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
"stp x5, x6, [x28, #296]",
"str x8, [x28, #312]",
"sub sp, sp, #0x80 (128)",
"mov x0, sp",
"st1 {v2.2d, v3.2d}, [x0], #32",
"st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"fmov s0, s4",
"ldrh w0, [x28, #1296]",
"mov x1, x28",
"ldr x2, [x28, #1424]",
"blr x2",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
"ldp x4, x7, [x28, #280]",
"ldp x5, x6, [x28, #296]",
"ldr x8, [x28, #312]",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ldr x16, [sp], #16",
"ldp x17, x30, [sp], #16",
"mov v4.16b, v0.16b",
"ldr q5, [x28, #2944]",
"bic v4.16b, v4.16b, v5.16b",
"bic v3.16b, v3.16b, v5.16b",
"strb wzr, [x28, #1017]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
@@ -1576,8 +1576,8 @@
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"ldrh w0, [x28, #1296]",
"mov v0.16b, v3.16b",
"mov v1.16b, v4.16b",
"mov v0.16b, v2.16b",
"mov v1.16b, v3.16b",
"mov x1, x28",
"ldr x2, [x28, #1504]",
"blr x2",
@@ -1601,9 +1601,9 @@
"rmif x21, #62, #nZcv",
"csetm x21, ls",
"dup v5.2d, x21",
"bit v3.16b, v4.16b, v5.16b",
"bsl v5.16b, v3.16b, v2.16b",
"mov w21, #0x8",
"ldr s4, [x5, #8]",
"ldr s2, [x5, #8]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
@@ -1615,7 +1615,7 @@
"st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"fmov s0, s4",
"fmov s0, s2",
"ldrh w0, [x28, #1296]",
"mov x1, x28",
"ldr x2, [x28, #1424]",
@@ -1629,10 +1629,10 @@
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ldr x16, [sp], #16",
"ldp x17, x30, [sp], #16",
"mov v4.16b, v0.16b",
"ldr q5, [x28, #2944]",
"bic v4.16b, v4.16b, v5.16b",
"ldr s5, [x4, #8]",
"mov v2.16b, v0.16b",
"ldr q3, [x28, #2944]",
"bic v2.16b, v2.16b, v3.16b",
"ldr s3, [x4, #8]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
@@ -1644,7 +1644,7 @@
"st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"fmov s0, s5",
"fmov s0, s3",
"ldrh w0, [x28, #1296]",
"mov x1, x28",
"ldr x2, [x28, #1424]",
@@ -1658,9 +1658,9 @@
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ldr x16, [sp], #16",
"ldp x17, x30, [sp], #16",
"mov v5.16b, v0.16b",
"mov v3.16b, v0.16b",
"ldr q6, [x28, #2944]",
"bic v5.16b, v5.16b, v6.16b",
"bic v3.16b, v3.16b, v6.16b",
"strb wzr, [x28, #1017]",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
@@ -1674,8 +1674,8 @@
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"ldrh w0, [x28, #1296]",
"mov v0.16b, v4.16b",
"mov v1.16b, v5.16b",
"mov v0.16b, v2.16b",
"mov v1.16b, v3.16b",
"mov x1, x28",
"ldr x2, [x28, #1504]",
"blr x2",
@@ -1699,7 +1699,7 @@
"rmif x22, #62, #nZcv",
"csetm x22, ls",
"dup v6.2d, x22",
"bit v4.16b, v5.16b, v6.16b",
"bsl v6.16b, v3.16b, v2.16b",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"stp x4, x7, [x28, #280]",
@@ -1712,8 +1712,8 @@
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"ldrh w0, [x28, #1296]",
"mov v0.16b, v2.16b",
"mov v1.16b, v2.16b",
"mov v0.16b, v4.16b",
"mov v1.16b, v4.16b",
"mov x1, x28",
"ldr x2, [x28, #1624]",
"blr x2",
@@ -1740,8 +1740,8 @@
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"ldrh w0, [x28, #1296]",
"mov v0.16b, v3.16b",
"mov v1.16b, v3.16b",
"mov v0.16b, v5.16b",
"mov v1.16b, v5.16b",
"mov x1, x28",
"ldr x2, [x28, #1624]",
"blr x2",
@@ -1794,8 +1794,8 @@
"str x16, [x0], #16",
"stp x17, x30, [x0], #16",
"ldrh w0, [x28, #1296]",
"mov v0.16b, v4.16b",
"mov v1.16b, v4.16b",
"mov v0.16b, v6.16b",
"mov v1.16b, v6.16b",
"mov x1, x28",
"ldr x2, [x28, #1624]",
"blr x2",
unittests/InstructionCountCI/Secondary.json
+2 -2
View File
@@ -192,8 +192,8 @@
"ldr d3, [x28, #2816]",
"fcvtzs v4.2s, v16.2s",
"fcmgt v3.4s, v3.4s, v16.4s",
"bit v2.8b, v4.8b, v3.8b",
"str d2, [x28, #1040]",
"bsl v3.8b, v4.8b, v2.8b",
"str d3, [x28, #1040]",
"mov w20, #0xffff",
"strh w20, [x28, #1048]"
]
unittests/InstructionCountCI/Secondary_OpSize.json
+2 -2
View File
@@ -133,8 +133,8 @@
"fcvtzs v4.2s, v4.2s",
"fcmgt v3.2d, v3.2d, v16.2d",
"shrn v3.2s, v3.2d, #32",
"bit v2.8b, v4.8b, v3.8b",
"str d2, [x28, #1040]",
"bsl v3.8b, v4.8b, v2.8b",
"str d3, [x28, #1040]",
"mov w20, #0xffff",
"strh w20, [x28, #1048]"
]
unittests/InstructionCountCI/VEX_map3.json
+6 -6
View File
@@ -3350,8 +3350,8 @@
"mov z1.q, z18.q[1]",
"mov z4.d, z18.d",
"mov z4.b, p6/m, z1.b",
"ext v3.16b, v4.16b, v3.16b, #1",
"mov z1.q, q3",
"ext v4.16b, v4.16b, v3.16b, #1",
"mov z1.q, q4",
"mov z16.d, z2.d",
"not p0.b, p7/z, p6.b",
"mov z16.b, p0/m, z1.b"
@@ -3370,8 +3370,8 @@
"mov z1.q, z18.q[1]",
"mov z4.d, z18.d",
"mov z4.b, p6/m, z1.b",
"ext v3.16b, v4.16b, v3.16b, #15",
"mov z1.q, q3",
"ext v4.16b, v4.16b, v3.16b, #15",
"mov z1.q, q4",
"mov z16.d, z2.d",
"not p0.b, p7/z, p6.b",
"mov z16.b, p0/m, z1.b"
@@ -3392,8 +3392,8 @@
"mov z4.d, z18.d",
"mov z4.b, p6/m, z1.b",
"movi v0.2d, #0x0",
"ext v3.16b, v3.16b, v0.16b, #0",
"mov z1.q, q3",
"ext v4.16b, v3.16b, v0.16b, #0",
"mov z1.q, q4",
"mov z16.d, z2.d",
"not p0.b, p7/z, p6.b",
"mov z16.b, p0/m, z1.b"