InstCountCI: Update

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed 2025-03-27 11:07:29 -04:00
1 parent cb91d585c3
commit 2215b153db
4 files changed
+76 -128

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@@ -14,7 +14,7 @@
},
"Instructions": {
"xgetbv": {
"ExpectedInstructionCount": 52,
"ExpectedInstructionCount": 50,
"Comment": "0xF 0x01 /2 RM-0",
"ExpectedArm64ASM": [
"sub sp, sp, #0xf0 (240)",
@@ -34,8 +34,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x3, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x3], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x3], #64",
@@ -60,8 +59,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64",
+35 -59
View File
@@ -2251,7 +2251,7 @@
]
},
"f2xm1": {
"ExpectedInstructionCount": 57,
"ExpectedInstructionCount": 55,
"Comment": [
"0xd9 11b 0xf0 /6"
],
@@ -2269,8 +2269,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2308,15 +2307,14 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]"
]
},
"fyl2x": {
"ExpectedInstructionCount": 65,
"ExpectedInstructionCount": 63,
"Comment": [
"0xd9 11b 0xf1 /6"
],
@@ -2340,8 +2338,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2378,8 +2375,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2389,7 +2385,7 @@
]
},
"fptan": {
"ExpectedInstructionCount": 70,
"ExpectedInstructionCount": 68,
"Comment": [
"0xd9 11b 0xf2 /6"
],
@@ -2407,8 +2403,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2446,8 +2441,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2467,7 +2461,7 @@
]
},
"fpatan": {
"ExpectedInstructionCount": 65,
"ExpectedInstructionCount": 63,
"Comment": [
"0xd9 11b 0xf3 /6"
],
@@ -2491,8 +2485,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2529,8 +2522,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2591,7 +2583,7 @@
]
},
"fprem1": {
"ExpectedInstructionCount": 63,
"ExpectedInstructionCount": 61,
"Comment": [
"0xd9 11b 0xf5 /6"
],
@@ -2615,8 +2607,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2653,8 +2644,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2686,7 +2676,7 @@
]
},
"fprem": {
"ExpectedInstructionCount": 63,
"ExpectedInstructionCount": 61,
"Comment": [
"0xd9 11b 0xf8 /7"
],
@@ -2710,8 +2700,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2748,8 +2737,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2757,7 +2745,7 @@
]
},
"fyl2xp1": {
"ExpectedInstructionCount": 72,
"ExpectedInstructionCount": 70,
"Comment": [
"0xd9 11b 0xf9 /7"
],
@@ -2788,8 +2776,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2826,8 +2813,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2851,7 +2837,7 @@
]
},
"fsincos": {
"ExpectedInstructionCount": 120,
"ExpectedInstructionCount": 116,
"Comment": [
"0xd9 11b 0xfb /7"
],
@@ -2869,8 +2855,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2908,8 +2893,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v3.8b, v0.8b",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
@@ -2921,8 +2905,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2960,8 +2943,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d3, [x0, #1040]",
@@ -2993,7 +2975,7 @@
]
},
"fscale": {
"ExpectedInstructionCount": 62,
"ExpectedInstructionCount": 60,
"Comment": [
"0xd9 11b 0xfd /7"
],
@@ -3017,8 +2999,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3055,15 +3036,14 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]"
]
},
"fsin": {
"ExpectedInstructionCount": 58,
"ExpectedInstructionCount": 56,
"Comment": [
"0xd9 11b 0xfe /7"
],
@@ -3081,8 +3061,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3120,8 +3099,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -3129,7 +3107,7 @@
]
},
"fcos": {
"ExpectedInstructionCount": 58,
"ExpectedInstructionCount": 56,
"Comment": [
"0xd9 11b 0xff /7"
],
@@ -3147,8 +3125,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3186,8 +3163,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -14,7 +14,7 @@
},
"Instructions": {
"xgetbv": {
"ExpectedInstructionCount": 52,
"ExpectedInstructionCount": 50,
"Comment": "0xF 0x01 /2 RM-0",
"ExpectedArm64ASM": [
"sub sp, sp, #0xf0 (240)",
@@ -34,8 +34,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x3, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x3], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x3], #64",
@@ -60,8 +59,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64",
+35 -59
View File
@@ -2269,7 +2269,7 @@
]
},
"f2xm1": {
"ExpectedInstructionCount": 57,
"ExpectedInstructionCount": 55,
"Comment": [
"0xd9 11b 0xf0 /6"
],
@@ -2287,8 +2287,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2326,15 +2325,14 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]"
]
},
"fyl2x": {
"ExpectedInstructionCount": 65,
"ExpectedInstructionCount": 63,
"Comment": [
"0xd9 11b 0xf1 /6"
],
@@ -2358,8 +2356,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2396,8 +2393,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2407,7 +2403,7 @@
]
},
"fptan": {
"ExpectedInstructionCount": 70,
"ExpectedInstructionCount": 68,
"Comment": [
"0xd9 11b 0xf2 /6"
],
@@ -2425,8 +2421,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2464,8 +2459,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2485,7 +2479,7 @@
]
},
"fpatan": {
"ExpectedInstructionCount": 65,
"ExpectedInstructionCount": 63,
"Comment": [
"0xd9 11b 0xf3 /6"
],
@@ -2509,8 +2503,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2547,8 +2540,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2609,7 +2601,7 @@
]
},
"fprem1": {
"ExpectedInstructionCount": 63,
"ExpectedInstructionCount": 61,
"Comment": [
"0xd9 11b 0xf5 /6"
],
@@ -2633,8 +2625,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2671,8 +2662,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2704,7 +2694,7 @@
]
},
"fprem": {
"ExpectedInstructionCount": 63,
"ExpectedInstructionCount": 61,
"Comment": [
"0xd9 11b 0xf8 /7"
],
@@ -2728,8 +2718,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2766,8 +2755,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -2775,7 +2763,7 @@
]
},
"fyl2xp1": {
"ExpectedInstructionCount": 72,
"ExpectedInstructionCount": 70,
"Comment": [
"0xd9 11b 0xf9 /7"
],
@@ -2806,8 +2794,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2844,8 +2831,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x21, lsl #4",
"str d2, [x0, #1040]",
@@ -2869,7 +2855,7 @@
]
},
"fsincos": {
"ExpectedInstructionCount": 120,
"ExpectedInstructionCount": 116,
"Comment": [
"0xd9 11b 0xfb /7"
],
@@ -2887,8 +2873,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2926,8 +2911,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v3.8b, v0.8b",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
@@ -2939,8 +2923,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -2978,8 +2961,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d3, [x0, #1040]",
@@ -3011,7 +2993,7 @@
]
},
"fscale": {
"ExpectedInstructionCount": 62,
"ExpectedInstructionCount": 60,
"Comment": [
"0xd9 11b 0xfd /7"
],
@@ -3035,8 +3017,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3073,15 +3054,14 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]"
]
},
"fsin": {
"ExpectedInstructionCount": 58,
"ExpectedInstructionCount": 56,
"Comment": [
"0xd9 11b 0xfe /7"
],
@@ -3099,8 +3079,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3138,8 +3117,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",
@@ -3147,7 +3125,7 @@
]
},
"fcos": {
"ExpectedInstructionCount": 58,
"ExpectedInstructionCount": 56,
"Comment": [
"0xd9 11b 0xff /7"
],
@@ -3165,8 +3143,7 @@
"stp x14, x15, [x28, #368]",
"stp x16, x17, [x28, #384]",
"stp x19, x29, [x28, #400]",
"str w26, [x28, #16]",
"str w27, [x28, #20]",
"stp w26, w27, [x28, #16]",
"add x0, x28, #0x1a0 (416)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64",
@@ -3204,8 +3181,7 @@
"ldp x14, x15, [x28, #368]",
"ldp x16, x17, [x28, #384]",
"ldp x19, x29, [x28, #400]",
"ldr w26, [x28, #16]",
"ldr w27, [x28, #20]",
"ldp w26, w27, [x28, #16]",
"mov v2.8b, v0.8b",
"add x0, x28, x20, lsl #4",
"str d2, [x0, #1040]",