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14,006 Commits 11 Branches 70 Tags
e862f8f86c2fd3f0463ff88096fef709c09a6f64
Commit Graph
54 Commits
Author SHA1 Message Date
Lioncache e862f8f86c unittests: Add specific paths for MOPS 2026-03-19 11:55:02 -04:00
Ryan Houdek 5875a121db InstcountCI: Update for alignment change 
NFC but touches everything.
 2026-02-21 15:24:13 -08:00
Paulo Matos de10154f29 instcountci: Implement address size modifier handling in CMPSOp and SCASOp for 64bits 2025-11-20 13:42:19 +01:00
Ryan Houdek 11946ffc4c InstcountCI: Update 2025-10-24 11:11:54 -07:00
Ryan Houdek 601dd1d2b5 InstcountCI: Update 2025-10-08 19:33:58 -07:00
Ryan Houdek e696e32b95 InstcountCI: Update 2025-08-11 20:48:47 -07:00
Alyssa Rosenzweig f99b42da5e InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-08-06 20:42:36 -04:00
Ryan Houdek 6c12db500e InstCountCI: Update for segment changes 2025-07-29 12:02:38 -07:00
Ryan Houdek 3744cad3d8 unittests/instcountci: Adds a long-lived ymm_high test 
Spills in to spill-slots when it should instead spill in to the context.
 2025-07-24 10:24:53 -07:00
Billy Laws 49482fe963 InstCountCI: Update 2025-07-24 14:53:09 +01:00
Alyssa Rosenzweig c093c08c40 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-07-02 13:04:49 -04:00
Alyssa Rosenzweig 16a70eafc6 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-30 15:59:27 -04:00
Alyssa Rosenzweig 62410c4381 InstCountCI: add another udiv case 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-24 16:10:22 -04:00
Ryan Houdek 1c38b8b046 Merge pull request #4614 from alyssarosenzweig/opt/easy-mov-elim 
Merge moves that are immediately consumed
 2025-06-19 12:26:07 -07:00
Alyssa Rosenzweig e1124480be InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-19 13:44:23 -04:00
Alyssa Rosenzweig 4f9e352ff0 InstructionCountCI: add 32-bit division cases 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-13 13:05:35 -04:00
Alyssa Rosenzweig ef250f936c InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-12 16:45:49 -04:00
Alyssa Rosenzweig 958b671736 InstructionCountCI: fix sdiv case 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-03 15:30:42 -04:00
Alyssa Rosenzweig 0c855a5ce3 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-03 15:00:39 -04:00
Ryan Houdek e81c84e00a Merge pull request #4602 from Sonicadvance1/add_instcountci_tests 
InstcountCI: Adds tests for instructions discovered by #4597
 2025-06-02 12:45:51 -07:00
Ryan Houdek f6b4c76d76 InstcountCI: Adds tests for instructions discovered by #4597 
Apparently I completely missed that cpuid, xgetbv, syscall,
l{u,}{div,rem} were failing to hit their optimized cases for inlining
and avoiding 128-bit software divide.

The divisions are a clear performance regression for 64-bit applications
since that is the only real way to do a 64-bit division on x86, I added
those specifically because it sped up games.

CPUID depends heavily on the game, since some games use that as a
serialization instruction fairly heavily.

XGETBV is trivial since it matches behaviour of CPUID (and is basically
an extension of it).

Syscall inlining can save a decent amount of time, again heavily depends
on game.

Adds multi-inst tests for all of these situations so that once it gets
fixed (Apparently broken once RCLSE got stripped out), we can see that
they keep working. Obviously tests couldn't have existed in instcountCI
before since we didn't support multi-instruction tests.
 2025-06-02 12:10:39 -07:00
Alyssa Rosenzweig 27854aa091 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-06-02 14:27:02 -04:00
Alyssa Rosenzweig 289df740cd InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-05-27 11:33:13 -04:00
Alyssa Rosenzweig 4b0e3bff54 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-03-31 16:09:54 -04:00
Alyssa Rosenzweig 3eb8be9953 InstructionCountCI: enable FRINTTS when we use float->int 
the relevant target hw (e.g. apple m1) supports this, so let's track with it on.

Secondary_REP and VEX_map1 are duplicated to have frintts and !frintts versions
so we can track the non-frintts path instead, since armv8.5 is still kinda new.
the rest just enable on to minimize combinatorics.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-03-31 16:09:50 -04:00
Alyssa Rosenzweig 46690ae352 InstructionCountCI: add blocks using F->I conversion 
to see the impact of Billy's stuff in a real world context since we don't have
hot blocks for it yet. random blocks I pulled from Control_DX11.exe which I had
handy, with rip relative addressing replaced.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2025-03-28 13:14:18 -04:00
Alyssa Rosenzweig d935d25f0c InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 11:48:03 -04:00
Alyssa Rosenzweig a299d6b1a5 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 20:17:06 -04:00
Ryan Houdek aa5d2ff31c Merge pull request #3951 from alyssarosenzweig/opt/pops 
Add a hack for multiple destinations & make good use of it
 2024-08-14 12:03:00 -07:00
Alyssa Rosenzweig f5bc06476a InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig b05329c8df InstructionCountCI: explicitly enable flagm for multiinst 
Closes: https://github.com/FEX-Emu/FEX/issues/3949
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-13 09:09:07 -04:00
Alyssa Rosenzweig ffac98051f InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig 3383786205 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-10 15:21:08 -04:00
Alyssa Rosenzweig d78b0ea435 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-07-11 13:21:14 -04:00
Ryan Houdek 2d617ad173 InstcountCI: Update 2024-07-02 20:24:58 -07:00
Alyssa Rosenzweig 1b496cda8f InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-06-26 14:49:58 -04:00
Alyssa Rosenzweig 32150cf7b5 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-06-18 12:01:23 -04:00
Alyssa Rosenzweig f5625093bb InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-06-01 09:42:50 -04:00
Alyssa Rosenzweig a8d32b9a2f InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-05-24 09:26:02 -04:00
Alyssa Rosenzweig 559772bb03 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-05-23 08:27:13 -04:00
Alyssa Rosenzweig 101bba4808 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-05-21 17:14:57 -04:00
Alyssa Rosenzweig ebfcc1e835 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-05-20 10:33:15 -04:00
Alyssa Rosenzweig 625d8ac177 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-04-17 14:54:19 -04:00
Ryan Houdek c025039651 InstcountCI: Adds a block that is causing panic spilling 2024-03-24 17:10:00 -07:00
Billy Laws 12fb26f9c0 Update InstCountCI 2024-03-20 21:08:59 +00:00
Billy Laws 29b05f6b90 Update InstCountCI 2024-03-18 23:30:19 +00:00
Ryan Houdek ca6b2e43e6 Merge pull request #3491 from alyssarosenzweig/rclse/waw 
RCLSE: Optimize store-after-store
 2024-03-14 03:23:05 -07:00
Alyssa Rosenzweig 063b81da1d InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-11 18:50:31 -04:00
Alyssa Rosenzweig ed59f73a65 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-11 18:41:33 -04:00
Ryan Houdek 27f3cb336f InstCountCI: Adds compile time constant memcpy/memset 
To showcase the code.
 2023-11-19 04:21:50 -08:00