Simon Scherer
fd64ea54fe
InstcountCI: Update
2026-09-04 07:32:09 +02:00
Simon Scherer
30e4650a8b
InstcountCI: Update
2026-09-03 08:32:59 +02:00
Ryan Houdek
fbf5187794
InstcountCI: Update
2026-09-02 18:35:36 -07:00
Ryan Houdek
20e9e2044e
InstcountCI: Update
2026-09-02 17:15:36 -07:00
Justin Becker
3471ca67c4
Bump DiskCache version number
2026-09-02 16:40:17 -07:00
Simon Scherer
bce8b13366
InstcountCI: Update
2026-09-02 07:47:24 +02:00
Pierre-Loup A. Griffais
c01bfcd52f
InstcountCI: Update
2026-09-01 03:51:12 -07:00
Ryan Houdek
1558a2c65d
InstcountCI: Update
2026-08-31 19:23:20 -07:00
Pierre-Loup A. Griffais
0d3a5f96f0
InstcountCI: Update
2026-08-30 17:17:54 -07:00
Ryan Houdek
b695c5ae11
InstCountCI: Update
...
Only adds DiskCache version to json to ensure it's tracked. No asm
changes here.
2026-08-30 14:26:45 -07:00
LC
ef19242be3
IR: Add constant for swapping midsections of 256-bit vectors around
...
This'll let us eliminate some pretty gnarly inserts while
ZIP1Q/UZP1Q/etc are still unavailable.
2026-06-29 12:50:53 -04:00
Ryan Houdek
36e1b5107e
InstcountCI: Update
2026-06-30 15:01:46 -07:00
Paulo Matos
2b8f5b57eb
instcountci: JIT-inline FPREM/FPREM1 for reduced precision x87 path
2026-05-11 10:27:08 +02:00
Paulo Matos
adbace8810
instcountci: JIT-inline F64ATAN and F64FYL2X for reduced precision x87 path
2026-04-21 20:23:45 +02:00
Paulo Matos
18f69fb16d
instcountci: JIT-inline F64SCALE and F64F2XM1 for reduced precision x87 path
2026-04-17 17:28:13 +02:00
Ryan Houdek
474439ab4b
InstcountCI: Update
2026-03-28 17:56:23 -07:00
Paulo Matos
9d5f7caa79
instcountci: JIT-inline F64SIN, F64COS, and F64TAN for reduced precision x87 path
2026-03-19 19:18:02 +01:00
Ryan Houdek
5875a121db
InstcountCI: Update for alignment change
...
NFC but touches everything.
2026-02-21 15:24:13 -08:00
Ryan Houdek
751fd70293
InstcountCI: Update
2026-01-07 12:55:34 -08:00
Ryan Houdek
11946ffc4c
InstcountCI: Update
2025-10-24 11:11:54 -07:00
Billy Laws
c45abaaa6b
Update InstCountCI
2025-09-09 21:34:59 +01:00
Ryan Houdek
e696e32b95
InstcountCI: Update
2025-08-11 20:48:47 -07:00
Billy Laws
203ac51681
Update InstCountCI
2025-08-07 14:36:12 +01:00
Billy Laws
9836e43d10
Update InstCountCI
2025-08-06 22:39:44 +01:00
Ryan Houdek
6c12db500e
InstCountCI: Update for segment changes
2025-07-29 12:02:38 -07:00
Ryan Houdek
7e1ee5bb07
FEXCore: Reintroduce support for CSSC
...
Now that the PF flag isn't using popcount, this is a win across the
board if the hardware supports it.
Been a while since I last looked at this, added a new instcountci file
to show the improvement.
2025-07-17 15:09:27 -07:00
Billy Laws
00fec3d51f
Update InstCountCI
2025-07-09 00:52:59 +01:00
Ryan Houdek
8ea276267f
InstcountCI: Update
2025-07-03 18:05:52 -07:00
Ryan Houdek
75a39c8939
InstcountCI: Update
2025-04-29 22:35:39 -07:00
Alyssa Rosenzweig
3eb8be9953
InstructionCountCI: enable FRINTTS when we use float->int
...
the relevant target hw (e.g. apple m1) supports this, so let's track with it on.
Secondary_REP and VEX_map1 are duplicated to have frintts and !frintts versions
so we can track the non-frintts path instead, since armv8.5 is still kinda new.
the rest just enable on to minimize combinatorics.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2025-03-31 16:09:50 -04:00
Ryan Houdek
d448976b3c
InstcountCI: Update
2025-02-22 04:57:59 -08:00
Ryan Houdek
686294f1c4
InstcountCI: Update
2025-01-03 13:49:40 -08:00
Billy Laws
8f5607f0e8
Update InstCountCI
2024-12-30 01:07:36 +00:00
Alyssa Rosenzweig
03e0ca9833
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-11-26 09:02:01 -05:00
Alyssa Rosenzweig
598b99fe58
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-09-22 14:06:27 -04:00
Alyssa Rosenzweig
a299d6b1a5
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-20 20:17:06 -04:00
Alyssa Rosenzweig
3383786205
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 15:21:08 -04:00
Alyssa Rosenzweig
7546160811
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-07-16 14:53:58 -04:00
Ryan Houdek
53aa30596e
InstcountCI: Update
2024-06-25 11:37:18 -07:00
Ryan Houdek
efa05ba19d
IR: Adds support for new SUBADD FMA constants
...
ADDSUB didn't cover this new variant.
2024-06-25 11:22:22 -07:00
Ryan Houdek
9b68617fa8
InstCountCI: Update for pshuf fixes
2024-06-24 07:44:21 -07:00
Paulo Matos
9acd325aa4
instcountci: Fixes AFP.NEP handling on scalar insertions
2024-06-19 10:02:54 +02:00
Alyssa Rosenzweig
32150cf7b5
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-06-18 12:01:23 -04:00
Lioncache
4cb2432b5c
OpcodeDispatcher: Make use of new x87 constants
...
Now we can load these directly instead of needing to manually materialize them.
2024-04-09 10:17:15 -04:00
Billy Laws
e03434ebde
Update InstCountCI
2024-04-08 16:04:59 +01:00
Alyssa Rosenzweig
37f2b417e4
Merge pull request #3546 from alyssarosenzweig/flag/cleanup
...
Minor cleanups around flags
2024-04-02 11:29:19 -04:00
Alyssa Rosenzweig
0a7b3efb41
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-04-01 16:42:50 -04:00
Alyssa Rosenzweig
fad243d3f6
InstCountCI: Update
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-04-01 13:48:27 -04:00
Ryan Houdek
20da1e4244
InstcountCI: Update for pmovmaskb
2024-03-17 18:52:21 -07:00
Ryan Houdek
45587278c9
InstCountCI: Update for segment changes
2024-02-01 18:17:28 -08:00