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InstcountCI: Update

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This commit is contained in:
Ryan Houdek committed 2026-03-28 17:56:23 -07:00
1 parent 4428aea5ee
commit 474439ab4b
26 files changed
+14197 -14197
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unittests/InstructionCountCI/AVX128/FMA4.json
+30 -30
View File
@@ -19,7 +19,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -33,7 +33,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -47,7 +47,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -61,7 +61,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -75,7 +75,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -89,7 +89,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -103,7 +103,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -117,7 +117,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -131,7 +131,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -145,7 +145,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -159,7 +159,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -173,7 +173,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -187,7 +187,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -201,7 +201,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -215,7 +215,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -229,7 +229,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -243,7 +243,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -257,7 +257,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -271,7 +271,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -285,7 +285,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -299,7 +299,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -313,7 +313,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -327,7 +327,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -341,7 +341,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -355,7 +355,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -369,7 +369,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -383,7 +383,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -397,7 +397,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -411,7 +411,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
},
@@ -425,7 +425,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1496]",
"ldr x0, [x28, #2912]",
"ldr x0, [x28, #2920]",
"br x0"
]
}
unittests/InstructionCountCI/AVX128/VEX_map1.json
+24 -24
View File
@@ -1122,7 +1122,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1134,7 +1134,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1146,7 +1146,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1171,7 +1171,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1185,7 +1185,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1199,7 +1199,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1223,7 +1223,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1235,7 +1235,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1247,7 +1247,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1274,7 +1274,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1288,7 +1288,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1302,7 +1302,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1326,7 +1326,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1338,7 +1338,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1350,7 +1350,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -1377,7 +1377,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1391,7 +1391,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1405,7 +1405,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -2287,7 +2287,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -2301,7 +2301,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr q3, [x28, #224]",
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q4, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@@ -2314,7 +2314,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -2328,7 +2328,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr q3, [x28, #224]",
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q4, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@@ -2341,7 +2341,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #192]"
@@ -2355,7 +2355,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #208]",
"ldr q3, [x28, #224]",
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q4, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
unittests/InstructionCountCI/Crypto/H0F38.json
+1 -1
View File
@@ -31,7 +31,7 @@
"0x66 0x0f 0x38 0xca"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q2, [x0, #432]",
"tbl v3.16b, {v16.16b}, v2.16b",
"tbl v4.16b, {v17.16b}, v2.16b",
unittests/InstructionCountCI/Crypto/H0F3A.json
+4 -4
View File
@@ -86,7 +86,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #3568]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -103,7 +103,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #3584]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -120,7 +120,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #3600]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -137,7 +137,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #3616]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
unittests/InstructionCountCI/FlagM/HotBlocks.json
+2 -2
View File
@@ -895,8 +895,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0xd",
"ldr x1, [x28, #2336]",
"ldr x3, [x28, #2344]",
"ldr x1, [x28, #2344]",
"ldr x3, [x28, #2352]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
unittests/InstructionCountCI/FlagM/SecondaryModRM.json
+2 -2
View File
@@ -42,8 +42,8 @@
"st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x3], #64",
"st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x3], #64",
"mov w1, w7",
"ldr x0, [x28, #1544]",
"ldr x2, [x28, #1560]",
"ldr x0, [x28, #1552]",
"ldr x2, [x28, #1568]",
"blr x2",
"ldr x25, [x28, #176]",
"ldr w4, [x28, #1032]",
unittests/InstructionCountCI/FlagM/VEX_map1.json
+1 -1
View File
@@ -83,7 +83,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2496]",
"ldr x0, [x28, #2504]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",
unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
+1918 -1918
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+382 -382
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+4576 -4576
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+5844 -5844
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87.json
+620 -620
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87_f64.json
+63 -63
View File
@@ -2152,8 +2152,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"ldr x0, [x28, #2248]",
"ldr x3, [x28, #2256]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2176,8 +2176,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2195,7 +2195,7 @@
"add x21, x28, x20, lsl #4",
"ldr d2, [x21, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2992]",
"ldr x0, [x28, #3000]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2232,8 +2232,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2224]",
"ldr x3, [x28, #2232]",
"ldr x0, [x28, #2232]",
"ldr x3, [x28, #2240]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2295,8 +2295,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2296]",
"ldr x0, [x28, #2296]",
"ldr x3, [x28, #2304]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2344,8 +2344,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2272]",
"ldr x3, [x28, #2280]",
"ldr x0, [x28, #2280]",
"ldr x3, [x28, #2288]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2372,8 +2372,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d2",
"fmov d1, d3",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2405,13 +2405,13 @@
"add x21, x28, x20, lsl #4",
"ldr d2, [x21, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2976]",
"ldr x0, [x28, #2984]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
"fmov d0, d2",
"ldr x0, [x28, #2984]",
"ldr x0, [x28, #2992]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2459,8 +2459,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2304]",
"ldr x3, [x28, #2312]",
"ldr x0, [x28, #2312]",
"ldr x3, [x28, #2320]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2477,7 +2477,7 @@
"add x20, x28, x20, lsl #4",
"ldr d2, [x20, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2976]",
"ldr x0, [x28, #2984]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2496,7 +2496,7 @@
"add x20, x28, x20, lsl #4",
"ldr d2, [x20, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2984]",
"ldr x0, [x28, #2992]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -3392,8 +3392,8 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3421,8 +3421,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5432,8 +5432,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5445,8 +5445,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5458,8 +5458,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5471,8 +5471,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5484,8 +5484,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5497,8 +5497,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5510,8 +5510,8 @@
"and v2.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5524,8 +5524,8 @@
"mov v2.h[4], v3.h[0]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5574,8 +5574,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5586,8 +5586,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5598,8 +5598,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5610,8 +5610,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5622,8 +5622,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5634,8 +5634,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5646,8 +5646,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5658,8 +5658,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -8092,15 +8092,15 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #2000]",
"ldr x3, [x28, #2008]",
"ldr x0, [x28, #2008]",
"ldr x3, [x28, #2016]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -8128,15 +8128,15 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1984]",
"ldr x3, [x28, #1992]",
"ldr x0, [x28, #1992]",
"ldr x3, [x28, #2000]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
unittests/InstructionCountCI/H0F3A.json
+1 -1
View File
@@ -474,7 +474,7 @@
"0x66 0x0f 0x3a 0x0e"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2712]",
"ldr x0, [x28, #2720]",
"ldr q2, [x0, #3440]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
unittests/InstructionCountCI/PrimaryGroup.json
+2 -2
View File
@@ -2786,7 +2786,7 @@
"mov x0, x5",
"mov x1, x4",
"mov x2, x6",
"ldr x3, [x28, #2960]",
"ldr x3, [x28, #2968]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
@@ -2837,7 +2837,7 @@
"mov x0, x5",
"mov x1, x4",
"mov x2, x6",
"ldr x3, [x28, #2968]",
"ldr x3, [x28, #2976]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
unittests/InstructionCountCI/SSE42_Strings.json
+8 -8
View File
@@ -41,8 +41,8 @@
"0x66 0x0f 0x3A 0x60"
],
"ExpectedArm64ASM": [
"ldr x3, [x28, #2320]",
"ldr x0, [x28, #2328]",
"ldr x3, [x28, #2328]",
"ldr x0, [x28, #2336]",
"stp x0, x30, [sp, #-16]!",
"mov x0, x4",
"mov x1, x5",
@@ -66,8 +66,8 @@
"0x66 0x0f 0x3A 0x61"
],
"ExpectedArm64ASM": [
"ldr x3, [x28, #2320]",
"ldr x0, [x28, #2328]",
"ldr x3, [x28, #2328]",
"ldr x0, [x28, #2336]",
"stp x0, x30, [sp, #-16]!",
"mov x0, x4",
"mov x1, x5",
@@ -99,8 +99,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0x0",
"ldr x1, [x28, #2336]",
"ldr x3, [x28, #2344]",
"ldr x1, [x28, #2344]",
"ldr x3, [x28, #2352]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
@@ -122,8 +122,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0x0",
"ldr x1, [x28, #2336]",
"ldr x3, [x28, #2344]",
"ldr x1, [x28, #2344]",
"ldr x3, [x28, #2352]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
unittests/InstructionCountCI/Secondary.json
+5 -5
View File
@@ -1160,7 +1160,7 @@
"mov w20, #0xffff",
"strb w20, [x28, #1202]",
"ldr d2, [x28, #1072]",
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #1056]",
@@ -1172,7 +1172,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x4]",
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"strb wzr, [x28, #1051]",
@@ -3548,7 +3548,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v16.16b, v17.16b}, v2.16b"
]
@@ -3557,7 +3557,7 @@
"ExpectedInstructionCount": 5,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #16]",
"mov v0.16b, v17.16b",
"mov v1.16b, v16.16b",
@@ -3569,7 +3569,7 @@
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q3, [x0, #16]",
"mov v0.16b, v16.16b",
"mov v1.16b, v2.16b",
unittests/InstructionCountCI/SecondaryModRM.json
+2 -2
View File
@@ -42,8 +42,8 @@
"st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x3], #64",
"st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x3], #64",
"mov w1, w7",
"ldr x0, [x28, #1544]",
"ldr x2, [x28, #1560]",
"ldr x0, [x28, #1552]",
"ldr x2, [x28, #1568]",
"blr x2",
"ldr x25, [x28, #176]",
"ldr w4, [x28, #1032]",
unittests/InstructionCountCI/Secondary_OpSize.json
+3 -3
View File
@@ -525,7 +525,7 @@
"0x66 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -539,7 +539,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v2.16b}, v3.16b"
]
@@ -677,7 +677,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2680]",
"ldr x0, [x28, #2688]",
"ldr q3, [x0, #2480]",
"tbl v16.16b, {v2.16b}, v3.16b"
]
unittests/InstructionCountCI/Secondary_REP.json
+2 -2
View File
@@ -397,7 +397,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -410,7 +410,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2680]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
unittests/InstructionCountCI/Secondary_REPNE.json
+2 -2
View File
@@ -290,7 +290,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -303,7 +303,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2664]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
unittests/InstructionCountCI/VEX_map1.json
+12 -12
View File
@@ -2788,7 +2788,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -2857,7 +2857,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -2926,7 +2926,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2688]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -3658,9 +3658,9 @@
],
"ExpectedArm64ASM": [
"frinti z2.s, p7/m, z17.s",
"ldr x0, [x28, #2608]",
"ldr x0, [x28, #2616]",
"ld1b {z3.b}, p7/z, [x0]",
"ldr x0, [x28, #2560]",
"ldr x0, [x28, #2568]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.s",
"fcmgt p0.s, p7/z, z4.s, z2.s",
@@ -3692,9 +3692,9 @@
"Map 1 0b10 0x5b 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2608]",
"ldr x0, [x28, #2616]",
"ld1b {z2.b}, p7/z, [x0]",
"ldr x0, [x28, #2560]",
"ldr x0, [x28, #2568]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.s",
"fcmgt p0.s, p7/z, z3.s, z17.s",
@@ -4438,7 +4438,7 @@
"Map 1 0b01 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2384]",
"ldr x0, [x28, #2392]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.d, z17.d, z2.d"
@@ -4461,7 +4461,7 @@
"Map 1 0b11 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2368]",
"ldr x0, [x28, #2376]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.s, z17.s, z2.s"
@@ -4602,7 +4602,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2496]",
"ldr x0, [x28, #2504]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",
@@ -4997,7 +4997,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3520]",
"ldr x0, [x28, #2584]",
"ldr x0, [x28, #2592]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.d",
"uzp1 z4.s, z4.s, z4.s",
@@ -5059,7 +5059,7 @@
"ExpectedArm64ASM": [
"frinti z2.d, p7/m, z17.d",
"ldr q3, [x28, #3520]",
"ldr x0, [x28, #2584]",
"ldr x0, [x28, #2592]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.d",
"uzp1 z5.s, z5.s, z5.s",
unittests/InstructionCountCI/VEX_map1_FRINTTS.json
+6 -6
View File
@@ -112,9 +112,9 @@
],
"ExpectedArm64ASM": [
"frinti z2.s, p7/m, z17.s",
"ldr x0, [x28, #2608]",
"ldr x0, [x28, #2616]",
"ld1b {z3.b}, p7/z, [x0]",
"ldr x0, [x28, #2560]",
"ldr x0, [x28, #2568]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.s",
"fcmgt p0.s, p7/z, z4.s, z2.s",
@@ -142,9 +142,9 @@
"Map 1 0b10 0x5b 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2608]",
"ldr x0, [x28, #2616]",
"ld1b {z2.b}, p7/z, [x0]",
"ldr x0, [x28, #2560]",
"ldr x0, [x28, #2568]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.s",
"fcmgt p0.s, p7/z, z3.s, z17.s",
@@ -174,7 +174,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3520]",
"ldr x0, [x28, #2584]",
"ldr x0, [x28, #2592]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.d",
"uzp1 z4.s, z4.s, z4.s",
@@ -209,7 +209,7 @@
"ExpectedArm64ASM": [
"frinti z2.d, p7/m, z17.d",
"ldr q3, [x28, #3520]",
"ldr x0, [x28, #2584]",
"ldr x0, [x28, #2592]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.d",
"uzp1 z5.s, z5.s, z5.s",
unittests/InstructionCountCI/VEX_map2.json
+12 -12
View File
@@ -3669,7 +3669,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2368]",
"ldr x0, [x28, #2376]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3695,7 +3695,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2384]",
"ldr x0, [x28, #2392]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3721,7 +3721,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2400]",
"ldr x0, [x28, #2408]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3747,7 +3747,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2416]",
"ldr x0, [x28, #2424]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -4621,7 +4621,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2368]",
"ldr x0, [x28, #2376]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4647,7 +4647,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2384]",
"ldr x0, [x28, #2392]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4673,7 +4673,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2400]",
"ldr x0, [x28, #2408]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4699,7 +4699,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2416]",
"ldr x0, [x28, #2424]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4725,7 +4725,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2368]",
"ldr x0, [x28, #2376]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4750,7 +4750,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2384]",
"ldr x0, [x28, #2392]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4775,7 +4775,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2400]",
"ldr x0, [x28, #2408]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4800,7 +4800,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2416]",
"ldr x0, [x28, #2424]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
unittests/InstructionCountCI/x87.json
+612 -612
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/x87_f64.json
+63 -63
View File
@@ -2170,8 +2170,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"ldr x0, [x28, #2248]",
"ldr x3, [x28, #2256]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2194,8 +2194,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2213,7 +2213,7 @@
"add x21, x28, x20, lsl #4",
"ldr d2, [x21, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2992]",
"ldr x0, [x28, #3000]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2250,8 +2250,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2224]",
"ldr x3, [x28, #2232]",
"ldr x0, [x28, #2232]",
"ldr x3, [x28, #2240]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2313,8 +2313,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2296]",
"ldr x0, [x28, #2296]",
"ldr x3, [x28, #2304]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2362,8 +2362,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2272]",
"ldr x3, [x28, #2280]",
"ldr x0, [x28, #2280]",
"ldr x3, [x28, #2288]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2390,8 +2390,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d2",
"fmov d1, d3",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2423,13 +2423,13 @@
"add x21, x28, x20, lsl #4",
"ldr d2, [x21, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2976]",
"ldr x0, [x28, #2984]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
"fmov d0, d2",
"ldr x0, [x28, #2984]",
"ldr x0, [x28, #2992]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2477,8 +2477,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2304]",
"ldr x3, [x28, #2312]",
"ldr x0, [x28, #2312]",
"ldr x3, [x28, #2320]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2495,7 +2495,7 @@
"add x20, x28, x20, lsl #4",
"ldr d2, [x20, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2976]",
"ldr x0, [x28, #2984]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -2514,7 +2514,7 @@
"add x20, x28, x20, lsl #4",
"ldr d2, [x20, #1056]",
"fmov d0, d2",
"ldr x0, [x28, #2984]",
"ldr x0, [x28, #2992]",
"str x30, [sp, #-16]!",
"blr x0",
"ldr x30, [sp], #16",
@@ -3413,8 +3413,8 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3442,8 +3442,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5471,8 +5471,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5484,8 +5484,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5497,8 +5497,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5510,8 +5510,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5523,8 +5523,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5536,8 +5536,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5549,8 +5549,8 @@
"and v2.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5563,8 +5563,8 @@
"mov v2.h[4], v3.h[0]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5613,8 +5613,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5625,8 +5625,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5637,8 +5637,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5649,8 +5649,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5661,8 +5661,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5673,8 +5673,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5685,8 +5685,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5697,8 +5697,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -8150,15 +8150,15 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #2000]",
"ldr x3, [x28, #2008]",
"ldr x0, [x28, #2008]",
"ldr x3, [x28, #2016]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1680]",
"ldr x3, [x28, #1688]",
"ldr x0, [x28, #1688]",
"ldr x3, [x28, #1696]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -8186,15 +8186,15 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1648]",
"ldr x3, [x28, #1656]",
"ldr x0, [x28, #1656]",
"ldr x3, [x28, #1664]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1984]",
"ldr x3, [x28, #1992]",
"ldr x0, [x28, #1992]",
"ldr x3, [x28, #2000]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",