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InstcountCI: Update

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This commit is contained in:
Ryan Houdek committed 2026-01-07 12:55:34 -08:00
1 parent d7c2b8f513
commit 751fd70293
31 files changed
+14408 -14408
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unittests/InstructionCountCI/AVX128/FMA4.json
+30 -30
View File
@@ -19,7 +19,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -33,7 +33,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -47,7 +47,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -61,7 +61,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -75,7 +75,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -89,7 +89,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -103,7 +103,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -117,7 +117,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -131,7 +131,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -145,7 +145,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -159,7 +159,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -173,7 +173,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -187,7 +187,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -201,7 +201,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -215,7 +215,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -229,7 +229,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -243,7 +243,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -257,7 +257,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -271,7 +271,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -285,7 +285,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -299,7 +299,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -313,7 +313,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -327,7 +327,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -341,7 +341,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -355,7 +355,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -369,7 +369,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -383,7 +383,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -397,7 +397,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -411,7 +411,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
},
@@ -425,7 +425,7 @@
"str x20, [x28, #24]",
"mov w1, #0x401",
"str x1, [x28, #1488]",
"ldr x0, [x28, #2872]",
"ldr x0, [x28, #2896]",
"br x0"
]
}
unittests/InstructionCountCI/AVX128/VEX_map1.json
+32 -32
View File
@@ -485,7 +485,7 @@
],
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #3088]",
"ldr q3, [x28, #3120]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@@ -499,7 +499,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ushr v3.4s, v16.4s, #31",
"ldr q4, [x28, #3088]",
"ldr q4, [x28, #3120]",
"ushl v3.4s, v3.4s, v4.4s",
"addv s3, v3.4s",
"mov w20, v3.s[0]",
@@ -1122,7 +1122,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1134,7 +1134,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1146,7 +1146,7 @@
"Map 1 0b01 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1171,7 +1171,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1185,7 +1185,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1199,7 +1199,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1223,7 +1223,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1235,7 +1235,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1247,7 +1247,7 @@
"Map 1 0b10 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1274,7 +1274,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1288,7 +1288,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1302,7 +1302,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1326,7 +1326,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1338,7 +1338,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1350,7 +1350,7 @@
"Map 1 0b11 0x70 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -1377,7 +1377,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1391,7 +1391,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q3, [x0, #32]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -1405,7 +1405,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q3, [x0, #48]",
"tbl v16.16b, {v17.16b}, v3.16b",
"tbl v2.16b, {v2.16b}, v3.16b",
@@ -2288,7 +2288,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -2302,7 +2302,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr q3, [x28, #64]",
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q4, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@@ -2315,7 +2315,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -2329,7 +2329,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr q3, [x28, #64]",
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q4, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@@ -2342,7 +2342,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
@@ -2356,7 +2356,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr q3, [x28, #64]",
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q4, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@@ -3885,7 +3885,7 @@
"Map 1 0b01 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.2d, v17.2d, v2.2d",
"stp xzr, xzr, [x28, #32]"
@@ -3899,7 +3899,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr q3, [x28, #64]",
"ldr q4, [x28, #2992]",
"ldr q4, [x28, #3024]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.2d, v17.2d, v5.2d",
"eor v3.16b, v3.16b, v4.16b",
@@ -3913,7 +3913,7 @@
"Map 1 0b11 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.4s, v17.4s, v2.4s",
"stp xzr, xzr, [x28, #32]"
@@ -3927,7 +3927,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #48]",
"ldr q3, [x28, #64]",
"ldr q4, [x28, #2960]",
"ldr q4, [x28, #2992]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.4s, v17.4s, v5.4s",
"eor v3.16b, v3.16b, v4.16b",
@@ -4098,7 +4098,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3216]",
"ldr q2, [x28, #3248]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@@ -4114,7 +4114,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #3216]",
"ldr q3, [x28, #3248]",
"cmlt v4.16b, v16.16b, #0",
"and v4.16b, v4.16b, v3.16b",
"addp v4.16b, v4.16b, v4.16b",
unittests/InstructionCountCI/AVX128/VEX_map2.json
+25 -25
View File
@@ -1917,7 +1917,7 @@
"Map 2 0b01 0x41 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2928]",
"ldr q2, [x28, #2960]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
@@ -4485,7 +4485,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -4502,7 +4502,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -4518,7 +4518,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -4535,7 +4535,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -4551,7 +4551,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -4568,7 +4568,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -4584,7 +4584,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -4601,7 +4601,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -5541,7 +5541,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -5558,7 +5558,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -5574,7 +5574,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -5591,7 +5591,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -5607,7 +5607,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -5624,7 +5624,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -5640,7 +5640,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -5657,7 +5657,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -5673,7 +5673,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -5689,7 +5689,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -5704,7 +5704,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -5720,7 +5720,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -5735,7 +5735,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -5751,7 +5751,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -5766,7 +5766,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -5782,7 +5782,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
+24 -24
View File
@@ -2843,7 +2843,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -2860,7 +2860,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -2876,7 +2876,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -2893,7 +2893,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -2909,7 +2909,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -2926,7 +2926,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@@ -2942,7 +2942,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -2959,7 +2959,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@@ -3879,7 +3879,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -3896,7 +3896,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -3912,7 +3912,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -3929,7 +3929,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -3945,7 +3945,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -3962,7 +3962,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@@ -3978,7 +3978,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -3995,7 +3995,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@@ -4011,7 +4011,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -4027,7 +4027,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2960]",
"ldr q5, [x28, #2992]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -4042,7 +4042,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -4058,7 +4058,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #2992]",
"ldr q5, [x28, #3024]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -4073,7 +4073,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -4089,7 +4089,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3024]",
"ldr q5, [x28, #3056]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@@ -4104,7 +4104,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@@ -4120,7 +4120,7 @@
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #64]",
"ldr q5, [x28, #3056]",
"ldr q5, [x28, #3088]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
unittests/InstructionCountCI/AVX128/VEX_map3.json
+8 -8
View File
@@ -337,7 +337,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3120]",
"ldr q2, [x28, #3152]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -348,7 +348,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3136]",
"ldr q2, [x28, #3168]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -369,7 +369,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3152]",
"ldr q2, [x28, #3184]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -391,7 +391,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3168]",
"ldr q2, [x28, #3200]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -412,7 +412,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3184]",
"ldr q2, [x28, #3216]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -423,7 +423,7 @@
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3200]",
"ldr q2, [x28, #3232]",
"tbx v16.16b, {v17.16b}, v2.16b",
"stp xzr, xzr, [x28, #32]"
]
@@ -3488,7 +3488,7 @@
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"ldr q3, [x28, #3104]",
"ldr q3, [x28, #3136]",
"mov v16.16b, v17.16b",
"aese v16.16b, v2.16b",
"tbl v16.16b, {v16.16b}, v3.16b",
@@ -3502,7 +3502,7 @@
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"ldr q3, [x28, #3104]",
"ldr q3, [x28, #3136]",
"mov v16.16b, v17.16b",
"aese v16.16b, v2.16b",
"tbl v16.16b, {v16.16b}, v3.16b",
unittests/InstructionCountCI/Crypto/H0F38.json
+1 -1
View File
@@ -31,7 +31,7 @@
"0x66 0x0f 0x38 0xca"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q2, [x0, #432]",
"tbl v3.16b, {v16.16b}, v2.16b",
"tbl v4.16b, {v17.16b}, v2.16b",
unittests/InstructionCountCI/Crypto/H0F3A.json
+10 -10
View File
@@ -55,7 +55,7 @@
"0x66 0x0f 0x3a 0xdf"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3104]",
"ldr q2, [x28, #3136]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"aese v16.16b, v3.16b",
@@ -68,7 +68,7 @@
"0x66 0x0f 0x3a 0xdf"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3104]",
"ldr q2, [x28, #3136]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"aese v16.16b, v3.16b",
@@ -84,9 +84,9 @@
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3488]",
"ldr q2, [x28, #3520]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -101,9 +101,9 @@
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3504]",
"ldr q2, [x28, #3536]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -118,9 +118,9 @@
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3520]",
"ldr q2, [x28, #3552]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
@@ -135,9 +135,9 @@
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3536]",
"ldr q2, [x28, #3568]",
"movi v3.2d, #0x0",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q4, [x0, #432]",
"tbl v5.16b, {v16.16b}, v4.16b",
"tbl v6.16b, {v17.16b}, v4.16b",
unittests/InstructionCountCI/FlagM/HotBlocks.json
+2 -2
View File
@@ -895,8 +895,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0xd",
"ldr x1, [x28, #2296]",
"ldr x3, [x28, #2304]",
"ldr x1, [x28, #2320]",
"ldr x3, [x28, #2328]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
unittests/InstructionCountCI/FlagM/Secondary.json
+1 -1
View File
@@ -1608,7 +1608,7 @@
"mov w20, #0xffff",
"strb w20, [x28, #1202]",
"ldr d2, [x28, #1056]",
"ldr d3, [x28, #3216]",
"ldr d3, [x28, #3248]",
"cmlt v2.16b, v2.16b, #0",
"and v2.8b, v2.8b, v3.8b",
"addp v2.16b, v2.16b, v2.16b",
unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
+1 -1
View File
@@ -37,7 +37,7 @@
"ExpectedInstructionCount": 7,
"Comment": "0x66 0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr q2, [x28, #3216]",
"ldr q2, [x28, #3248]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
unittests/InstructionCountCI/FlagM/VEX_map1.json
+2 -2
View File
@@ -68,7 +68,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3216]",
"ldr q2, [x28, #3248]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@@ -83,7 +83,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2456]",
"ldr x0, [x28, #2480]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",
unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
+1918 -1918
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+388 -388
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+4613 -4613
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+5855 -5855
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87.json
+630 -630
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/FlagM/x87_f64.json
+66 -66
View File
@@ -2152,8 +2152,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2200]",
"ldr x3, [x28, #2208]",
"ldr x0, [x28, #2224]",
"ldr x3, [x28, #2232]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2176,8 +2176,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2216]",
"ldr x3, [x28, #2224]",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2196,8 +2196,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2168]",
"ldr x3, [x28, #2176]",
"ldr x0, [x28, #2192]",
"ldr x3, [x28, #2200]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2233,8 +2233,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2184]",
"ldr x3, [x28, #2192]",
"ldr x0, [x28, #2208]",
"ldr x3, [x28, #2216]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2296,8 +2296,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2248]",
"ldr x3, [x28, #2256]",
"ldr x0, [x28, #2272]",
"ldr x3, [x28, #2280]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2345,8 +2345,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2232]",
"ldr x3, [x28, #2240]",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2373,8 +2373,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d2",
"fmov d1, d3",
"ldr x0, [x28, #2216]",
"ldr x3, [x28, #2224]",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2407,8 +2407,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2152]",
"ldr x3, [x28, #2160]",
"ldr x0, [x28, #2176]",
"ldr x3, [x28, #2184]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2456,8 +2456,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2296]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2475,8 +2475,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2120]",
"ldr x3, [x28, #2128]",
"ldr x0, [x28, #2144]",
"ldr x3, [x28, #2152]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2495,8 +2495,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2136]",
"ldr x3, [x28, #2144]",
"ldr x0, [x28, #2160]",
"ldr x3, [x28, #2168]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3391,8 +3391,8 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3420,8 +3420,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5431,8 +5431,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5444,8 +5444,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5457,8 +5457,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5470,8 +5470,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5483,8 +5483,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5496,8 +5496,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5509,8 +5509,8 @@
"and v2.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5523,8 +5523,8 @@
"mov v2.h[4], v3.h[0]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5573,8 +5573,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5585,8 +5585,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5597,8 +5597,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5609,8 +5609,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5621,8 +5621,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5633,8 +5633,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5645,8 +5645,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5657,8 +5657,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -8091,15 +8091,15 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1960]",
"ldr x3, [x28, #1968]",
"ldr x0, [x28, #1984]",
"ldr x3, [x28, #1992]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -8127,15 +8127,15 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1944]",
"ldr x3, [x28, #1952]",
"ldr x0, [x28, #1968]",
"ldr x3, [x28, #1976]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
unittests/InstructionCountCI/H0F38.json
+1 -1
View File
@@ -685,7 +685,7 @@
"0x66 0x0f 0x38 0x41"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2928]",
"ldr q2, [x28, #2960]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
unittests/InstructionCountCI/H0F3A.json
+7 -7
View File
@@ -327,7 +327,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3120]",
"ldr q2, [x28, #3152]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -337,7 +337,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3136]",
"ldr q2, [x28, #3168]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -356,7 +356,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3152]",
"ldr q2, [x28, #3184]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -376,7 +376,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3168]",
"ldr q2, [x28, #3200]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -395,7 +395,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3184]",
"ldr q2, [x28, #3216]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -405,7 +405,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3200]",
"ldr q2, [x28, #3232]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@@ -474,7 +474,7 @@
"0x66 0x0f 0x3a 0x0e"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2672]",
"ldr x0, [x28, #2696]",
"ldr q2, [x0, #3440]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
unittests/InstructionCountCI/PrimaryGroup.json
+2 -2
View File
@@ -2786,7 +2786,7 @@
"mov x0, x5",
"mov x1, x4",
"mov x2, x6",
"ldr x3, [x28, #3576]",
"ldr x3, [x28, #2944]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
@@ -2837,7 +2837,7 @@
"mov x0, x5",
"mov x1, x4",
"mov x2, x6",
"ldr x3, [x28, #3584]",
"ldr x3, [x28, #2952]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
unittests/InstructionCountCI/SSE42_Strings.json
+8 -8
View File
@@ -41,8 +41,8 @@
"0x66 0x0f 0x3A 0x60"
],
"ExpectedArm64ASM": [
"ldr x3, [x28, #2280]",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2304]",
"ldr x0, [x28, #2312]",
"stp x0, x30, [sp, #-16]!",
"mov x0, x4",
"mov x1, x5",
@@ -66,8 +66,8 @@
"0x66 0x0f 0x3A 0x61"
],
"ExpectedArm64ASM": [
"ldr x3, [x28, #2280]",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2304]",
"ldr x0, [x28, #2312]",
"stp x0, x30, [sp, #-16]!",
"mov x0, x4",
"mov x1, x5",
@@ -99,8 +99,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0x0",
"ldr x1, [x28, #2296]",
"ldr x3, [x28, #2304]",
"ldr x1, [x28, #2320]",
"ldr x3, [x28, #2328]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
@@ -122,8 +122,8 @@
"mov v0.16b, v16.16b",
"mov v1.16b, v17.16b",
"mov w0, #0x0",
"ldr x1, [x28, #2296]",
"ldr x3, [x28, #2304]",
"ldr x1, [x28, #2320]",
"ldr x3, [x28, #2328]",
"blr x1",
"ldr x30, [sp], #16",
"mov w20, w0",
unittests/InstructionCountCI/Secondary.json
+8 -8
View File
@@ -651,7 +651,7 @@
"Comment": "0x0f 0x50",
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #3088]",
"ldr q3, [x28, #3120]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@@ -662,7 +662,7 @@
"Comment": "0x0f 0x50",
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #3088]",
"ldr q3, [x28, #3120]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@@ -1160,7 +1160,7 @@
"mov w20, #0xffff",
"strb w20, [x28, #1202]",
"ldr d2, [x28, #1072]",
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #1056]",
@@ -1172,7 +1172,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x4]",
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"strb wzr, [x28, #1051]",
@@ -3548,7 +3548,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v16.16b, v17.16b}, v2.16b"
]
@@ -3557,7 +3557,7 @@
"ExpectedInstructionCount": 5,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"mov v0.16b, v17.16b",
"mov v1.16b, v16.16b",
@@ -3569,7 +3569,7 @@
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q3, [x0, #16]",
"mov v0.16b, v16.16b",
"mov v1.16b, v2.16b",
@@ -3690,7 +3690,7 @@
"mov w20, #0xffff",
"strb w20, [x28, #1202]",
"ldr d2, [x28, #1056]",
"ldr d3, [x28, #3216]",
"ldr d3, [x28, #3248]",
"cmlt v2.16b, v2.16b, #0",
"and v2.8b, v2.8b, v3.8b",
"addp v2.16b, v2.16b, v2.16b",
unittests/InstructionCountCI/Secondary_OpSize.json
+5 -5
View File
@@ -525,7 +525,7 @@
"0x66 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -539,7 +539,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v2.16b}, v3.16b"
]
@@ -677,7 +677,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2640]",
"ldr x0, [x28, #2664]",
"ldr q3, [x0, #2480]",
"tbl v16.16b, {v2.16b}, v3.16b"
]
@@ -1259,7 +1259,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x66 0x0f 0xd0",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v17.16b, v2.16b",
"fadd v16.2d, v16.2d, v2.2d"
]
@@ -1315,7 +1315,7 @@
"ExpectedInstructionCount": 7,
"Comment": "0x66 0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr q2, [x28, #3216]",
"ldr q2, [x28, #3248]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
unittests/InstructionCountCI/Secondary_REP.json
+12 -12
View File
@@ -118,7 +118,7 @@
"ExpectedArm64ASM": [
"fcvtzs w20, s16",
"mov w21, #0x80000000",
"ldr s2, [x28, #3344]",
"ldr s2, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s2, s16",
"csel w4, w20, w21, gt",
@@ -132,7 +132,7 @@
"ldr s2, [x6]",
"fcvtzs w20, s2",
"mov w21, #0x80000000",
"ldr s3, [x28, #3344]",
"ldr s3, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel w4, w20, w21, gt",
@@ -145,7 +145,7 @@
"ExpectedArm64ASM": [
"fcvtzs x20, s16",
"mov x21, #0x8000000000000000",
"ldr s2, [x28, #3376]",
"ldr s2, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s2, s16",
"csel x4, x20, x21, gt",
@@ -159,7 +159,7 @@
"ldr s2, [x6]",
"fcvtzs x20, s2",
"mov x21, #0x8000000000000000",
"ldr s3, [x28, #3376]",
"ldr s3, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel x4, x20, x21, gt",
@@ -173,7 +173,7 @@
"frinti s2, s16",
"fcvtzs w20, s2",
"mov w21, #0x80000000",
"ldr s3, [x28, #3344]",
"ldr s3, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel w4, w20, w21, gt",
@@ -188,7 +188,7 @@
"frinti s2, s2",
"fcvtzs w20, s2",
"mov w21, #0x80000000",
"ldr s3, [x28, #3344]",
"ldr s3, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel w4, w20, w21, gt",
@@ -202,7 +202,7 @@
"frinti s2, s16",
"fcvtzs x20, s2",
"mov x21, #0x8000000000000000",
"ldr s3, [x28, #3376]",
"ldr s3, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel x4, x20, x21, gt",
@@ -217,7 +217,7 @@
"frinti s2, s2",
"fcvtzs x20, s2",
"mov x21, #0x8000000000000000",
"ldr s3, [x28, #3376]",
"ldr s3, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel x4, x20, x21, gt",
@@ -296,8 +296,8 @@
"ExpectedInstructionCount": 6,
"Comment": "0xf3 0x0f 0x5b",
"ExpectedArm64ASM": [
"ldr q2, [x28, #3440]",
"ldr q3, [x28, #3344]",
"ldr q2, [x28, #3472]",
"ldr q3, [x28, #3376]",
"fcvtzs v4.4s, v17.4s",
"fcmgt v3.4s, v3.4s, v17.4s",
"mov v16.16b, v3.16b",
@@ -397,7 +397,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -410,7 +410,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2632]",
"ldr x0, [x28, #2656]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
unittests/InstructionCountCI/Secondary_REPNE.json
+3 -3
View File
@@ -290,7 +290,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -303,7 +303,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2624]",
"ldr x0, [x28, #2648]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@@ -503,7 +503,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0xf2 0x0f 0xd0",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v17.16b, v2.16b",
"fadd v16.4s, v16.4s, v2.4s"
]
unittests/InstructionCountCI/VEX_map1.json
+33 -33
View File
@@ -2788,7 +2788,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -2857,7 +2857,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -2926,7 +2926,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2648]",
"ldr x0, [x28, #2672]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@@ -3271,7 +3271,7 @@
"ExpectedArm64ASM": [
"fcvtzs w20, s16",
"mov w21, #0x80000000",
"ldr s2, [x28, #3344]",
"ldr s2, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s2, s16",
"csel w4, w20, w21, gt",
@@ -3286,7 +3286,7 @@
"ExpectedArm64ASM": [
"fcvtzs x20, s16",
"mov x21, #0x8000000000000000",
"ldr s2, [x28, #3376]",
"ldr s2, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s2, s16",
"csel x4, x20, x21, gt",
@@ -3301,7 +3301,7 @@
"ExpectedArm64ASM": [
"fcvtzs w20, d16",
"mov w21, #0x80000000",
"ldr d2, [x28, #3392]",
"ldr d2, [x28, #3424]",
"mrs x22, nzcv",
"fcmp d2, d16",
"csel w4, w20, w21, gt",
@@ -3316,7 +3316,7 @@
"ExpectedArm64ASM": [
"fcvtzs x20, d16",
"mov x21, #0x8000000000000000",
"ldr d2, [x28, #3424]",
"ldr d2, [x28, #3456]",
"mrs x22, nzcv",
"fcmp d2, d16",
"csel x4, x20, x21, gt",
@@ -3332,7 +3332,7 @@
"frinti s2, s16",
"fcvtzs w20, s2",
"mov w21, #0x80000000",
"ldr s3, [x28, #3344]",
"ldr s3, [x28, #3376]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel w4, w20, w21, gt",
@@ -3348,7 +3348,7 @@
"frinti s2, s16",
"fcvtzs x20, s2",
"mov x21, #0x8000000000000000",
"ldr s3, [x28, #3376]",
"ldr s3, [x28, #3408]",
"mrs x22, nzcv",
"fcmp s3, s2",
"csel x4, x20, x21, gt",
@@ -3364,7 +3364,7 @@
"frinti d2, d16",
"fcvtzs w20, d2",
"mov w21, #0x80000000",
"ldr d3, [x28, #3392]",
"ldr d3, [x28, #3424]",
"mrs x22, nzcv",
"fcmp d3, d2",
"csel w4, w20, w21, gt",
@@ -3380,7 +3380,7 @@
"frinti d2, d16",
"fcvtzs x20, d2",
"mov x21, #0x8000000000000000",
"ldr d3, [x28, #3424]",
"ldr d3, [x28, #3456]",
"mrs x22, nzcv",
"fcmp d3, d2",
"csel x4, x20, x21, gt",
@@ -3643,8 +3643,8 @@
],
"ExpectedArm64ASM": [
"frinti v2.4s, v17.4s",
"ldr q3, [x28, #3440]",
"ldr q4, [x28, #3344]",
"ldr q3, [x28, #3472]",
"ldr q4, [x28, #3376]",
"fcvtzs v5.4s, v2.4s",
"fcmgt v2.4s, v4.4s, v2.4s",
"mov v16.16b, v2.16b",
@@ -3658,9 +3658,9 @@
],
"ExpectedArm64ASM": [
"frinti z2.s, p7/m, z17.s",
"ldr x0, [x28, #2568]",
"ldr x0, [x28, #2592]",
"ld1b {z3.b}, p7/z, [x0]",
"ldr x0, [x28, #2520]",
"ldr x0, [x28, #2544]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.s",
"fcmgt p0.s, p7/z, z4.s, z2.s",
@@ -3678,8 +3678,8 @@
"Map 1 0b10 0x5b 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3440]",
"ldr q3, [x28, #3344]",
"ldr q2, [x28, #3472]",
"ldr q3, [x28, #3376]",
"fcvtzs v4.4s, v17.4s",
"fcmgt v3.4s, v3.4s, v17.4s",
"mov v16.16b, v3.16b",
@@ -3692,9 +3692,9 @@
"Map 1 0b10 0x5b 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2568]",
"ldr x0, [x28, #2592]",
"ld1b {z2.b}, p7/z, [x0]",
"ldr x0, [x28, #2520]",
"ldr x0, [x28, #2544]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.s",
"fcmgt p0.s, p7/z, z3.s, z17.s",
@@ -4427,7 +4427,7 @@
"Map 1 0b01 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.2d, v17.2d, v2.2d"
]
@@ -4438,7 +4438,7 @@
"Map 1 0b01 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2344]",
"ldr x0, [x28, #2368]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.d, z17.d, z2.d"
@@ -4450,7 +4450,7 @@
"Map 1 0b11 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.4s, v17.4s, v2.4s"
]
@@ -4461,7 +4461,7 @@
"Map 1 0b11 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2328]",
"ldr x0, [x28, #2352]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.s, z17.s, z2.s"
@@ -4587,7 +4587,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3216]",
"ldr q2, [x28, #3248]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@@ -4602,7 +4602,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2456]",
"ldr x0, [x28, #2480]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",
@@ -4979,8 +4979,8 @@
"Map 1 0b01 0xe6 128-bit"
],
"ExpectedArm64ASM": [
"ldr d2, [x28, #3440]",
"ldr q3, [x28, #3392]",
"ldr d2, [x28, #3472]",
"ldr q3, [x28, #3424]",
"fcvtzs z4.s, p6/m, z17.d",
"uzp1 z4.s, z4.s, z4.s",
"mov v4.8b, v4.8b",
@@ -4996,8 +4996,8 @@
"Map 1 0b01 0xe6 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3440]",
"ldr x0, [x28, #2544]",
"ldr q2, [x28, #3472]",
"ldr x0, [x28, #2568]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.d",
"uzp1 z4.s, z4.s, z4.s",
@@ -5040,8 +5040,8 @@
],
"ExpectedArm64ASM": [
"frinti v2.2d, v17.2d",
"ldr d3, [x28, #3440]",
"ldr q4, [x28, #3392]",
"ldr d3, [x28, #3472]",
"ldr q4, [x28, #3424]",
"fcvtzs z5.s, p6/m, z2.d",
"uzp1 z5.s, z5.s, z5.s",
"mov v5.8b, v5.8b",
@@ -5058,8 +5058,8 @@
],
"ExpectedArm64ASM": [
"frinti z2.d, p7/m, z17.d",
"ldr q3, [x28, #3440]",
"ldr x0, [x28, #2544]",
"ldr q3, [x28, #3472]",
"ldr x0, [x28, #2568]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.d",
"uzp1 z5.s, z5.s, z5.s",
unittests/InstructionCountCI/VEX_map1_FRINTTS.json
+8 -8
View File
@@ -112,9 +112,9 @@
],
"ExpectedArm64ASM": [
"frinti z2.s, p7/m, z17.s",
"ldr x0, [x28, #2568]",
"ldr x0, [x28, #2592]",
"ld1b {z3.b}, p7/z, [x0]",
"ldr x0, [x28, #2520]",
"ldr x0, [x28, #2544]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.s",
"fcmgt p0.s, p7/z, z4.s, z2.s",
@@ -142,9 +142,9 @@
"Map 1 0b10 0x5b 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2568]",
"ldr x0, [x28, #2592]",
"ld1b {z2.b}, p7/z, [x0]",
"ldr x0, [x28, #2520]",
"ldr x0, [x28, #2544]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.s",
"fcmgt p0.s, p7/z, z3.s, z17.s",
@@ -173,8 +173,8 @@
"Map 1 0b01 0xe6 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3440]",
"ldr x0, [x28, #2544]",
"ldr q2, [x28, #3472]",
"ldr x0, [x28, #2568]",
"ld1b {z3.b}, p7/z, [x0]",
"fcvtzs z4.s, p7/m, z17.d",
"uzp1 z4.s, z4.s, z4.s",
@@ -208,8 +208,8 @@
],
"ExpectedArm64ASM": [
"frinti z2.d, p7/m, z17.d",
"ldr q3, [x28, #3440]",
"ldr x0, [x28, #2544]",
"ldr q3, [x28, #3472]",
"ldr x0, [x28, #2568]",
"ld1b {z4.b}, p7/z, [x0]",
"fcvtzs z5.s, p7/m, z2.d",
"uzp1 z5.s, z5.s, z5.s",
unittests/InstructionCountCI/VEX_map2.json
+25 -25
View File
@@ -1603,7 +1603,7 @@
"Map 2 0b01 0x41 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2928]",
"ldr q2, [x28, #2960]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
@@ -3657,7 +3657,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.4s, v16.4s, v18.4s",
"mov v16.16b, v2.16b"
@@ -3669,7 +3669,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2328]",
"ldr x0, [x28, #2352]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3683,7 +3683,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.2d, v16.2d, v18.2d",
"mov v16.16b, v2.16b"
@@ -3695,7 +3695,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2344]",
"ldr x0, [x28, #2368]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3709,7 +3709,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.4s, v16.4s, v18.4s",
"mov v16.16b, v2.16b"
@@ -3721,7 +3721,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2360]",
"ldr x0, [x28, #2384]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -3735,7 +3735,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.2d, v16.2d, v18.2d",
"mov v16.16b, v2.16b"
@@ -3747,7 +3747,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2376]",
"ldr x0, [x28, #2400]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@@ -4609,7 +4609,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.4s, v17.4s, v16.4s",
"mov v16.16b, v2.16b"
@@ -4621,7 +4621,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2328]",
"ldr x0, [x28, #2352]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4635,7 +4635,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.2d, v17.2d, v16.2d",
"mov v16.16b, v2.16b"
@@ -4647,7 +4647,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2344]",
"ldr x0, [x28, #2368]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4661,7 +4661,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.4s, v17.4s, v16.4s",
"mov v16.16b, v2.16b"
@@ -4673,7 +4673,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2360]",
"ldr x0, [x28, #2384]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4687,7 +4687,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.2d, v17.2d, v16.2d",
"mov v16.16b, v2.16b"
@@ -4699,7 +4699,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2376]",
"ldr x0, [x28, #2400]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@@ -4713,7 +4713,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2960]",
"ldr q2, [x28, #2992]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.4s, v17.4s, v18.4s",
"mov v16.16b, v2.16b"
@@ -4725,7 +4725,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2328]",
"ldr x0, [x28, #2352]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4738,7 +4738,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2992]",
"ldr q2, [x28, #3024]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.2d, v17.2d, v18.2d",
"mov v16.16b, v2.16b"
@@ -4750,7 +4750,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2344]",
"ldr x0, [x28, #2368]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4763,7 +4763,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3024]",
"ldr q2, [x28, #3056]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.4s, v17.4s, v18.4s",
"mov v16.16b, v2.16b"
@@ -4775,7 +4775,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2360]",
"ldr x0, [x28, #2384]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@@ -4788,7 +4788,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3056]",
"ldr q2, [x28, #3088]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.2d, v17.2d, v18.2d",
"mov v16.16b, v2.16b"
@@ -4800,7 +4800,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2376]",
"ldr x0, [x28, #2400]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
unittests/InstructionCountCI/VEX_map3.json
+2 -2
View File
@@ -5372,7 +5372,7 @@
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3104]",
"ldr q2, [x28, #3136]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"aese v16.16b, v3.16b",
@@ -5385,7 +5385,7 @@
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #3104]",
"ldr q2, [x28, #3136]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"aese v16.16b, v3.16b",
unittests/InstructionCountCI/x87.json
+622 -622
View File
File diff suppressed because it is too large. Load diff
unittests/InstructionCountCI/x87_f64.json
+66 -66
View File
@@ -2170,8 +2170,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2200]",
"ldr x3, [x28, #2208]",
"ldr x0, [x28, #2224]",
"ldr x3, [x28, #2232]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2194,8 +2194,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2216]",
"ldr x3, [x28, #2224]",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2214,8 +2214,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2168]",
"ldr x3, [x28, #2176]",
"ldr x0, [x28, #2192]",
"ldr x3, [x28, #2200]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2251,8 +2251,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2184]",
"ldr x3, [x28, #2192]",
"ldr x0, [x28, #2208]",
"ldr x3, [x28, #2216]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2314,8 +2314,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2248]",
"ldr x3, [x28, #2256]",
"ldr x0, [x28, #2272]",
"ldr x3, [x28, #2280]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2363,8 +2363,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2232]",
"ldr x3, [x28, #2240]",
"ldr x0, [x28, #2256]",
"ldr x3, [x28, #2264]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2391,8 +2391,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d2",
"fmov d1, d3",
"ldr x0, [x28, #2216]",
"ldr x3, [x28, #2224]",
"ldr x0, [x28, #2240]",
"ldr x3, [x28, #2248]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2425,8 +2425,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2152]",
"ldr x3, [x28, #2160]",
"ldr x0, [x28, #2176]",
"ldr x3, [x28, #2184]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -2474,8 +2474,8 @@
"str x30, [sp, #-16]!",
"fmov d0, d3",
"fmov d1, d2",
"ldr x0, [x28, #2264]",
"ldr x3, [x28, #2272]",
"ldr x0, [x28, #2288]",
"ldr x3, [x28, #2296]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2493,8 +2493,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2120]",
"ldr x3, [x28, #2128]",
"ldr x0, [x28, #2144]",
"ldr x3, [x28, #2152]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -2513,8 +2513,8 @@
"ldr d2, [x20, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #2136]",
"ldr x3, [x28, #2144]",
"ldr x0, [x28, #2160]",
"ldr x3, [x28, #2168]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3412,8 +3412,8 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -3441,8 +3441,8 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5470,8 +5470,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5483,8 +5483,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5496,8 +5496,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5509,8 +5509,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5522,8 +5522,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5535,8 +5535,8 @@
"and v3.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v3.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d3, d0",
@@ -5548,8 +5548,8 @@
"and v2.16b, v3.16b, v2.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5562,8 +5562,8 @@
"mov v2.h[4], v3.h[0]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -5612,8 +5612,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5624,8 +5624,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5636,8 +5636,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5648,8 +5648,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5660,8 +5660,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5672,8 +5672,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5684,8 +5684,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -5696,8 +5696,8 @@
"ldr d2, [x0, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
@@ -8149,15 +8149,15 @@
"ld1 {v2.h}[4], [x20]",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1960]",
"ldr x3, [x28, #1968]",
"ldr x0, [x28, #1984]",
"ldr x3, [x28, #1992]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1640]",
"ldr x3, [x28, #1648]",
"ldr x0, [x28, #1664]",
"ldr x3, [x28, #1672]",
"blr x0",
"ldr x30, [sp], #16",
"fmov d2, d0",
@@ -8185,15 +8185,15 @@
"ldr d2, [x21, #1056]",
"str x30, [sp, #-16]!",
"fmov d0, d2",
"ldr x0, [x28, #1608]",
"ldr x3, [x28, #1616]",
"ldr x0, [x28, #1632]",
"ldr x3, [x28, #1640]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",
"str x30, [sp, #-16]!",
"mov v0.16b, v2.16b",
"ldr x0, [x28, #1944]",
"ldr x3, [x28, #1952]",
"ldr x0, [x28, #1968]",
"ldr x3, [x28, #1976]",
"blr x0",
"ldr x30, [sp], #16",
"mov v2.16b, v0.16b",