Commit Graph
15203 Commits
Author SHA1 Message Date
Ryan Houdek 72b2ff88ae Merge pull request #5987 from Plagman/plagman/re-key_mr
DiskCache: adjust key strategy
2026-09-24 11:55:40 -07:00
Pierre-Loup A. Griffais b37aae728f DiskCache: adjust key strategy
The base directory is now the machine bucket, which is everything that affects
codegen that you can ask FEX about offline: FEX compiler version, host features.

The DB files now carry a process bucket, which is everything else that can
affect codegen, on the user/process side: 32-bitness and config.

Both together are still the bucket hash that gets laced into every lookup key,
so we still won't load mismatching code because a file is in the wrong spot.
2026-09-24 00:08:11 -07:00
LC 4e5c18113a Merge pull request #5986 from Sonicadvance1/259
FEXCore: Adds a utility function for deleting a directory
2026-09-23 23:36:12 -04:00
Ryan Houdek ae3a4ae197 FEXCore: Adds a utility function for deleting a directory
We can't use std::filesystem::remove_all on FEX Linux, so reimplement
it. No unittest for this because....That's spicy on the CI NAND.
2026-09-23 18:34:46 -07:00
Ryan Houdek e2f973fe93 Merge pull request #5981 from javelina-pkwy/opt/faster-pcmp
Vector: Inline PCMPXSTRX SSE4.2 Instructions
2026-09-22 14:17:18 -07:00
Justin Becker af8770005b Clang format 2026-09-22 12:53:05 -07:00
Justin Becker 0206479a08 Clarify new tests 2026-09-22 12:53:05 -07:00
Justin Becker 0ddd46ba44 Bump DiskCacheVersion 2026-09-22 12:53:05 -07:00
Justin Becker e2f0cf41d8 More cleanup 2026-09-22 12:53:05 -07:00
Justin Becker ff887adb19 Include all immediates 2026-09-22 12:53:05 -07:00
Justin Becker 638329278c Inlined PCMPXSTRX
Improves performance for SSE4.2 String operations by ~10x by emitting inline ASM instead of jumping to a C++ helper.

Performance numbers from a simple microbenchmark vs the existing C++ implementation:
|               | Equal Any | Ranges | Equal Each | Equal Ordered |
|---------------|-----------|--------|------------|---------------|
| **pcmpestri** | 13.40×    | 9.71×  | 19.38×     | 14.07×        |
| **pcmpestrm** | 13.12×    | 9.54×  | 18.73×     | 13.80×        |
| **pcmpistri** | 11.75×    | 9.19×  | 17.63×     | 12.80×        |
| **pcmpistrm** | 11.39×    | 8.83×  | 16.31×     | 12.26×        |
2026-09-22 12:50:02 -07:00
LC 08f451d3bc Merge pull request #5980 from Plagman/plagman/maxrwsize_mr
DiskCache: configurable max file size
2026-09-22 11:10:40 -04:00
Pierre-Loup A. Griffais 83d8317dae DiskCache: configurable max file size 2026-09-22 00:05:10 -07:00
LC 37d83d9375 Merge pull request #5979 from Sonicadvance1/258
FEXCore: Have ThreadRemoveCodeEntry IR op jump to dispatcher
2026-09-22 01:46:23 -04:00
Ryan Houdek 2ea5cc3f41 InstcountCI: Update 2026-09-21 20:53:28 -07:00
Ryan Houdek 4b418a81aa FEXCore: Have ThreadRemoveCodeEntry IR op jump to dispatcher
In order to reuse code buffers, when invalidating we will no longer be
able to invalidate code while inside the code we are invalidating.

Changes the IR operation to be a block ender itself and control jumping
to the new RIP. This way it can invalidate from the dispatcher and just
restart JIT execution.
2026-09-21 20:53:27 -07:00
LC 64a6da9aee Merge pull request #5978 from Sonicadvance1/257
FEXCore: Have the Syscall IR op jump to the dispatcher
2026-09-21 23:07:24 -04:00
Ryan Houdek 0a41f470f8 InstcountCI: Update 2026-09-21 14:56:47 -07:00
Ryan Houdek 229151f878 FEXCore: Have the Syscall IR op jump to the dispatcher
Have it treated as a block terminator IR and instead of doing
syscall+exitfunction, just do syscall and jump in to the dispatcher.

This is necessary for code invalidation and reuse for code that is stuck
in long running syscalls. We'll need to do something similar for thunks
later, although the recursive nature of thunk+callback can make that a
little squirrely.
2026-09-21 14:46:34 -07:00
Ryan Houdek 5006e02498 Dispatcher: Fixes range check of InterruptFaultPage
This one wasn't updated and it's right at the limit of what it can
handle.
2026-09-21 14:45:56 -07:00
LC c747be4d8b Merge pull request #5977 from Sonicadvance1/256
gitlab-ci: Wow, failed to notice the single quotes
2026-09-21 16:17:54 -04:00
Ryan Houdek e0c7419858 gitlab-ci: Wow, failed to notice the single quotes
Apparently this broke the pipeline when combined with &&
2026-09-21 13:01:47 -07:00
LC 3aa38d12bc Merge pull request #5976 from Sonicadvance1/255
gitlab-ci: Only auto-promote on pushes to the main branch
2026-09-21 15:52:17 -04:00
Ryan Houdek 56a6e143ce gitlab-ci: Only auto-promote on pushes to the main branch
Otherwise point releases will promote in a weird way.
2026-09-21 12:22:17 -07:00
Ryan Houdek cfafd8929a Merge pull request #5975 from Sonicadvance1/254
Readme: Update with minspec update
2026-09-21 12:21:40 -07:00
Ryan Houdek 2005933518 Readme: Update with minspec update 2026-09-21 12:05:45 -07:00
LC 177542e673 Merge pull request #5974 from Sonicadvance1/253
Config: Add check to see if a config option is default
2026-09-21 02:18:22 -04:00
Ryan Houdek 9c871c51c9 Config: Add check to see if a config option is default
Either the option missing entirely or it's set to the default.
2026-09-20 14:58:48 -07:00
LC 48d71752e2 Merge pull request #5973 from Sonicadvance1/95
CPUInfo: Adds new AVX extensions
2026-09-19 20:24:34 -04:00
Ryan Houdek 82040bae3e CPUInfo: Adds new AVX extensions 2026-09-19 13:51:30 -07:00
LC 555e8bd2d1 Merge pull request #5971 from Sonicadvance1/252
A couple JITSymbol fixes
2026-09-18 22:44:37 -04:00
Ryan Houdek a0ba36eb1b SharedCodeBuffer: Skip VMA naming when JITSymbols are enabled
For some reason `perf top` prefers VMA names over perf symbols. So
disable them when any JIT symbol option is enabled. Breaks WTF tracking
for those buffers but because it's debug, we kind of have to.
2026-09-18 17:01:26 -07:00
Ryan Houdek 69a3da4f31 JITSymbols: Grab PID from the frontend
This is necessary to get JIT Symbols working under arm64ec/wow64
2026-09-18 17:00:17 -07:00
Ryan Houdek ec502b99d8 FEXCore: Support passing process pid to the backend 2026-09-18 16:59:35 -07:00
Ryan Houdek c55fb3b5b8 UnixLib: Add a way to get Linux process PID 2026-09-18 16:58:11 -07:00
Ryan Houdek 1405755a31 Merge pull request #5968 from javelina-pkwy/feat/rdrand-fallback
Add software fallback for RDRAND/RDSEED
2026-09-18 13:33:09 -07:00
Ryan Houdek 06b7f3b232 Merge pull request #5970 from Plagman/plagman/lru_mr
DiskCache: optional memory buffer for faster lookups
2026-09-18 13:27:25 -07:00
Pierre-Loup A. Griffais 7a82b07bfd DiskCache: optional memory buffer for faster lookups
May reserve a tiny area for small blocks in general, but will also be useful
for LuaJIT in anon-diskless mode.
2026-09-17 21:21:28 -07:00
Justin Becker 54b178d151 InstrCountCI: Bump disk cache version and regen 2026-09-17 11:25:52 -07:00
Justin Becker 26f0e5017f Fix Linux test failure, and formatting 2026-09-17 11:25:38 -07:00
Justin Becker 9243efc241 Default RDRAND fallback to false 2026-09-17 10:47:09 -07:00
Justin Becker c91c6efc87 Software fallback for RDRAND/RDSEED 2026-09-16 16:08:40 -07:00
Ryan Houdek 9bbdb35711 Merge pull request #5967 from lioncash/vixup
Externals: Update vixl
2026-09-16 10:01:12 -07:00
LC 7723c47be4 Merge pull request #5964 from Sonicadvance1/250
FEXCore: Migrate internal DiskCache header to internal
2026-09-16 04:01:12 -04:00
LC eb41dac33f Merge pull request #5965 from Sonicadvance1/251
unittests: Make sure to test another system instruction
2026-09-15 23:41:01 -04:00
Ryan Houdek d119a5e7dc unittests: Make sure to test another system instruction
Saw this in hololive Dreams.
2026-09-15 20:06:48 -07:00
Ryan Houdek 37eaff93cb FEXCore: Migrate internal DiskCache header to internal
Leave the smaller public header that is required to get the current
DiskCache version variable still.

NFC
2026-09-15 19:43:27 -07:00
LC ca1fb3f851 Merge pull request #5963 from javelina-pkwy/test/issue-5942-ldconfig-segfault
Add regression test for consecutive syscalls
2026-09-15 22:40:40 -04:00
Justin Becker 393f7d8702 Add regression test for consecutive syscalls 2026-09-15 17:37:28 -07:00
LC 19df181f65 Merge pull request #5962 from Sonicadvance1/249
Rebase and add test to #5887
2026-09-15 19:56:48 -04:00