Commit Graph
1443 Commits
Author SHA1 Message Date
Ryan Houdek fecdc312f3 Adds support for 32bit ELFs to the code loader
Matches most of the 64bit behaviour but with expected 32bit pointers
2020-10-06 20:39:57 -07:00
Stefanos Kornilios Mitsis Poiitidis c7cb79264f Merge pull request #449 from Sonicadvance1/valgrind_fixes
Fixes from Valgrind's test suite
2020-10-05 09:25:03 +03:00
Ryan Houdek b2010ed9a7 Updates xbyak to the latest version
Needed to have correct CPU feature detection
2020-10-04 16:18:41 -07:00
Ryan Houdek 56f46a6abb Extends LZCNT unit tests
Ensures proper behaviour while the other tests were mainly testing flags
2020-10-04 16:13:50 -07:00
Ryan Houdek 31be022348 Fixes bad implementation in fallback x86 LZCNT
This was just wrong and the unit tests hadn't caught it
2020-10-04 16:13:03 -07:00
Ryan Houdek 5466ea4df2 Extends PSHUFB unit tests to ensure correct behaviour
Explicitly testign bits being set in the reserved bits
2020-10-04 16:12:22 -07:00
Ryan Houdek 4ff7046ddb Fixes bugs in PSHUFB
If bits were set in the reserved bits then the shuffle was incorrect
2020-10-04 16:10:03 -07:00
Ryan Houdek 9c7cc2db1f Implements unit test for MOVNTPD 2020-10-04 16:09:41 -07:00
Ryan Houdek d9414ee8ad Implements SSE2 MOVNTPD
We apparently missed this one
2020-10-04 16:09:15 -07:00
Ryan Houdek 7569120495 Fix a unit test's alignment 2020-10-04 16:05:16 -07:00
Ryan Houdek 4da4e9c7c8 Fixes misalignment of code laoding section
This was legacy that code was loaded at offset 1.
Load it at our base offset so nasm alignment works correctly
2020-10-04 16:04:30 -07:00
Stefanos Kornilios Mitsis Poiitidis 6c1ab25cd0 Merge pull request #448 from Sonicadvance1/improve_x86_compiles
Splits x86 JIT's IR handling over to a jump table
2020-10-01 10:45:16 +03:00
Ryan Houdek 6287e769be Splits x86 JIT's IR handling over to a jump table
This is changes the behaviour to be exactly like the ARM64 side.
No behaviour change beyond that.
2020-09-30 13:35:00 -07:00
Stefanos Kornilios Mitsis Poiitidis c7615bf560 Merge pull request #447 from Sonicadvance1/aes_ext
Implements support for the AES instructions
2020-09-30 20:02:17 +03:00
Stefanos Kornilios Mitsis Poiitidis 56f47395db Merge pull request #446 from Sonicadvance1/umul_fix
Fixes unsigned multiply zext mechanics
2020-09-30 19:49:49 +03:00
Stefanos Kornilios Mitsis Poiitidis 81a03d67d9 Merge pull request #445 from Sonicadvance1/imul_flags
Signed multiply fixes
2020-09-30 19:45:36 +03:00
Ryan Houdek 63d0f60047 Updates vixl to support AES instruction generation 2020-09-30 00:12:28 -07:00
Ryan Houdek 9c80363d6b Unit tests to ensure correct AES behaviour 2020-09-30 00:05:55 -07:00
Ryan Houdek 99a344ac62 Allows CPUID to only report AES support if the host supports it 2020-09-30 00:05:55 -07:00
Ryan Houdek 7e264533cf Implements the AES instructions in the Opcode dispatcher 2020-09-30 00:05:55 -07:00
Ryan Houdek aa8da5d70d Adds AES IR ops to the x86_64 JIT 2020-09-30 00:05:55 -07:00
Ryan Houdek 3e7407fa09 Adds AES IR ops to the Arm64 JIT 2020-09-30 00:05:55 -07:00
Ryan Houdek a26f5c0cc5 Adds AES IR ops to the interpreter 2020-09-30 00:05:55 -07:00
Ryan Houdek 2c2d73839b Adds new AES IR ops 2020-09-30 00:05:55 -07:00
Ryan Houdek 30b4a645af Adds the AES extensions to the tables 2020-09-29 23:47:53 -07:00
Ryan Houdek 10df2db7c9 Fixes a bug in the frontend decoder
This table doesn't listen to REX itself but just REX widening
Necessary to decode AESKeyGenAssist correctly
2020-09-29 23:46:09 -07:00
Ryan Houdek cf72f998f8 Add common location to see host features
Only necessary to pick up AES at the moment
2020-09-29 23:45:13 -07:00
Ryan Houdek 6af0bace1a Unit tests to ensure MUL zexting behaviour 2020-09-29 16:38:28 -07:00
Ryan Houdek 77511c5f92 Fixes unsigned multiply zext mechanics
32bit wasn't zexting correctly
2020-09-29 16:37:46 -07:00
Ryan Houdek 9e20979eff Adds imul unit tests that check flag results 2020-09-29 12:33:34 -07:00
Ryan Houdek 05d43945a6 Fixes a bug in 32bit signed multiply on x86_64 jit
We were storing the zexted result instead of the sexted result
2020-09-29 12:33:33 -07:00
Ryan Houdek 5c518dd96e Fixes flags calculation for signed multiply
Resulting high bits needed to be sexted to do the proper flags check
2020-09-29 12:33:33 -07:00
Stefanos Kornilios Mitsis Poiitidis 5248991a14 Merge pull request #440 from Sonicadvance1/fix_insextr_index
Ensures PEXTR and PINSR mask the element selection correctly
2020-09-29 11:22:09 +03:00
Stefanos Kornilios Mitsis Poiitidis b9d004b639 Merge pull request #439 from Sonicadvance1/cmpxchg_edgecase
Fixes edge case that wasn't covered in FEX's cmpxchg
2020-09-29 11:20:45 +03:00
Stefanos Kornilios Mitsis Poiitidis ea99f661bf Merge pull request #444 from Sonicadvance1/shlrd_fixes
Fixes 32bit SHLD and SHRD by zero
2020-09-29 11:09:30 +03:00
Stefanos Kornilios Mitsis Poiitidis 227c2dc308 Merge pull request #441 from Sonicadvance1/vfcmp
Fixes float compare with negated results
2020-09-29 11:06:33 +03:00
Ryan Houdek 10f1641068 Extends SHLD/SHRD unit tests to ensure Zext behaviour 2020-09-28 16:58:27 -07:00
Ryan Houdek fc093531c3 Fixes SHRD and SHRD by zero with 32bit source register
This will still zext the GPR with zero shift, just won't update the
flags
2020-09-28 16:58:26 -07:00
Ryan Houdek 912b6fb0f3 Merge pull request #442 from Sonicadvance1/ashr_fix
Fixes smaller than 32bit ASHR
2020-09-28 13:44:07 -07:00
Ryan Houdek eedc4b0af2 Merge pull request #438 from Sonicadvance1/psadw
Fixes PSADBW
2020-09-28 13:43:59 -07:00
Ryan Houdek e4ab241fa2 Adds a new ASHR unit test
Finds some edge case behaviour in it
2020-09-27 23:13:10 -07:00
Ryan Houdek f6c207b5c5 Fixes smaller than 32bit ASHR
Need to operate on it as a 32bit value
2020-09-27 23:11:58 -07:00
Ryan Houdek 5b8046e612 Fixes float compare with negated results
We can't just flip the comparison because NaN changes behaviour here
2020-09-27 19:11:34 -07:00
Ryan Houdek ae7aa51b0c Extends PEXTRW and PINSRW unit tests
Ensures that an index past the max element is correctly masked
2020-09-27 18:50:25 -07:00
Ryan Houdek cef2f693a5 Ensures PEXTR and PINSR mask the element selection correctly
Only uses the bitfield necessary for the size ofd the instruction
2020-09-27 18:48:58 -07:00
Ryan Houdek 3a4d5220fe Adds 32bit GPR cmpxchg unit test
Ensures only RAX is zexted from 32bits rather than both RAX and RBX when
compare fails.
2020-09-27 17:49:54 -07:00
Ryan Houdek 88f880650b Fixes edge case that wasn't covered in FEX's cmpxchg
When the destination is a 32bit GPR, when the resulting compare failed
we were zexting the destination registeron accident.
Thus clearing the upper 32bits when it shouldn't have changed.
2020-09-27 17:47:54 -07:00
Ryan Houdek b878006f18 Extends the PSADBW unit tests
Weren't quite extensive enough
2020-09-27 16:54:57 -07:00
Ryan Houdek d404da1bf1 Fixes PSADBW in the opdispatcher
Documentation in the x86 manuals implied operating at 8bit
2020-09-27 16:53:50 -07:00
Ryan Houdek b0b3335178 Fixes VADDV in the x86_64 JIT 2020-09-27 16:53:25 -07:00