Unit tests to ensure MUL zexting behaviour

unittests/ASM/PrimaryGroup/3_F6_04.asm

@@ -1,7 +1,8 @@
 %ifdef CONFIG
 {
   "RegData": {
-    "RAX": "0x414243444546008E"
+    "RAX": "0x414243444546008E",
+    "RBX": "0xFFFFFFFFFFFF0004"
   },
   "MemoryRegions": {
     "0x100000000": "4096"
@@ -20,6 +21,12 @@ mov al, 2
 mul byte [rdx + 8 * 0 + 1]
 mov word [rdx + 8 * 0], ax
 
+; Ensure this inserts in to AX
+mov rax, 0xFFFFFFFFFFFFFF02
+mov rbx, 0xFFFFFFFFFFFFFF02
+mul bl
+mov rbx, rax
+
 mov rax, [rdx + 8 * 0]
 
 hlt

unittests/ASM/PrimaryGroup/3_F7_04.asm

@@ -3,6 +3,8 @@
   "RegData": {
     "RAX": "0x414243441F968610",
     "RBX": "0x25D1437D318C1BE0",
+    "RCX": "0xFFFFFFFFFFFF0004",
+    "RDX": "0x0000000000000004",
     "RSI": "0xFC1B5FC85401D0C0",
     "RSP": "0x2B27F79B13618682"
   },
@@ -36,6 +38,19 @@ mul qword [r15 + 8 * 2 + 0]
 mov rsi, rax
 mov rsp, rdx
 
+; Ensure zext handling is correct
+; 16bit
+mov rax, 0xFFFFFFFFFFFF0002
+mov rbx, 0xFFFFFFFFFFFF0002
+mul bx
+mov rcx, rax
+
+; 32bit
+mov rax, 0xFFFFFFFF00000002
+mov rbx, 0xFFFFFFFF00000002
+mul ebx
+mov rdx, rax
+
 mov rax, [r15 + 8 * 0]
 mov rbx, [r15 + 8 * 1]