Billy Laws
9b65d819f4
Dispatcher: Add an argument to request a single-step on SRA fill
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This already exists for ARM64EC, but this path is required for linux
and WOW64
2025-07-23 18:29:12 +01:00
Billy Laws
287344986c
FEXCore: Switch ENTRY_FILL_SRA_SINGLE_INST_REG to TMP2
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Will allow this to be taken as the second dispatcher argument
2025-07-23 18:29:12 +01:00
Billy Laws
27fd5505be
OpcodeDispatcher: Set correct trap number for noexec faults
2025-07-22 19:30:23 +01:00
Lioncache
cafc906b9e
OpcodeDispatcher: Mark functions as const/static where applicable
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Not a functional change, but makes it more obvious how these rely on object state.
2025-07-21 10:48:55 -04:00
Ryan Houdek
7e1ee5bb07
FEXCore: Reintroduce support for CSSC
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Now that the PF flag isn't using popcount, this is a win across the
board if the hardware supports it.
Been a while since I last looked at this, added a new instcountci file
to show the improvement.
2025-07-17 15:09:27 -07:00
Paulo Matos
5267cde60e
Whole-tree reformat with clang-format-19
2025-07-17 08:10:00 +02:00
LC
1d4b6c6a74
Merge pull request #4689 from Sonicadvance1/disable_gcs_protection
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Disable GCS in simulator and userspace
2025-07-16 20:25:16 -04:00
Billy Laws
f5efe1d251
Merge pull request #4690 from Sonicadvance1/moar_padding
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JIT: Add more padding
2025-07-17 00:58:37 +01:00
Ryan Houdek
7edc8417b6
JIT: Add more padding
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Go to a whole page of additional padding, #4670 adds some more size to a
block and overran the padding causing a unittest to fail.
2025-07-16 15:28:05 -07:00
Ryan Houdek
5b01682641
Arm64Emitter: Disable GCS in the simulator
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FEX isn't going to be compatible with this.
PR #4670 requires this
2025-07-16 15:23:43 -07:00
Ryan Houdek
e36a64ecc0
Merge pull request #4681 from Sonicadvance1/i_dislike_tuple_2
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FEXCore/OpcodeDispatcher: Removes tuple usage for Dispatch tables
2025-07-16 14:23:18 -07:00
Ryan Houdek
82be09b6a3
FEXCore/OpcodeDispatcher: Removes tuple usage for Dispatch tables
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NFC
2025-07-16 13:57:16 -07:00
LC
e0ca04bfec
Merge pull request #4684 from Sonicadvance1/spurious_syscall_crash
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FEXCore/OpcodeDispatcher: Fix a spurious crash that can occur with multiblock
2025-07-15 21:44:51 -04:00
Ryan Houdek
dfe3b4502a
FEXCore/OpcodeDispatcher: Fix a spurious crash that can occur with multiblock
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If multiblock discovers a codepath with an `int 0x80` then it would
crash the emulator even if it never gets executed. Ensure that this
ERROR_AND_DIE_FMT instead just gets handled as an UnhandledOp to ensure
the Core early terminates the block.
Found by having steamwebhelper spuriously crash when it hit this.
Adds a simple unittest to ensure discovery doesn't break again.
2025-07-15 17:43:16 -07:00
Ryan Houdek
4884aeef20
Config: Adds option to disable wfxt
2025-07-15 16:38:15 -07:00
Ryan Houdek
219ab44a82
FEXCore: Implement a mostly NOP implementation of waitpkg
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Part of waitpkg is the TPAUSE instruction. This instruction gives an
RDTSC deadline to go in to a low power sleep mode with the CPU.
Semantically we can't implement umonitor and umwait with ARM's exclusive
monitor implementation, but a nop implementation is sane. Just need to
make sure to clear the pre-req flags.
This lowers power consumption of UE5 games since their job handler now
goes to a tpause based implementation instead of a `pause` spinloop
implementation.
2025-07-15 16:13:29 -07:00
Ryan Houdek
43bba77840
FEXCore: Implement support for NX bit.
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Long time coming but thanks to bylaw's changes in #4474 , this is now
trivial to implement.
Fixes #2175
2025-07-15 10:41:24 -07:00
Ryan Houdek
5b0e703811
Merge pull request #4678 from neobrain/refactor_unuse_unused
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Drop unnecessary uses of maybe_unused
2025-07-15 09:03:55 -07:00
Ryan Houdek
05742a8e28
Merge pull request #4677 from neobrain/refactor_misc_logs
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Miscellaneous log changes
2025-07-15 09:03:12 -07:00
Ryan Houdek
170fbb596c
Merge pull request #4679 from neobrain/fix_signed_overflow
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Arm64Emitter: Fix signed overflow
2025-07-15 09:02:29 -07:00
Lioncache
678e03b470
VectorOps: Correct benign VFAddV op cast
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This was using the non-float VAddV variant, but had the same behavior,
since the fields were named the same. So this is just a correctness fix.
2025-07-15 11:41:28 -04:00
Tony Wasserka
0f45f3a24d
Arm64Emitter: Fix signed integer overflows
2025-07-15 17:17:48 +02:00
Tony Wasserka
9b503f3702
IRDumper: Remove unnecessary use of maybe_unused
2025-07-15 17:10:37 +02:00
Tony Wasserka
7f3f619518
GDBJIT: Remove unnecessary use of maybe_unused
2025-07-15 17:10:27 +02:00
Tony Wasserka
d5b166bdd9
OpcodeDispatcher: Strengthen error message to fatal
2025-07-15 16:55:18 +02:00
LC
e6f319d6b3
Merge pull request #4674 from neobrain/refactor_todrop
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Drop TODO defines
2025-07-15 07:12:35 -04:00
Tony Wasserka
a3a55d19b8
Revert "FEX_TODO: Convert some XXX to FEX_TODO"
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This reverts commit 256df76674
2025-07-15 10:03:56 +02:00
Ryan Houdek
0dff992fab
FEXCore: Implement xsaveopt
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It's the same as xsave because we don't track a hidden "xinuse" hardware
mask. So this is a trivial implementation.
2025-07-14 17:31:47 -07:00
Billy Laws
076c156cbb
Frontend: Warn on invalid instructions in entry blocks
2025-07-10 16:51:34 +01:00
Billy Laws
46bc8e499a
Frontend: Always treat FEXCore X86 callbacks as executable
2025-07-10 16:51:34 +01:00
Billy Laws
31903d0c0b
Frontend: Treat instructions in non-executable memory as invalid
2025-07-10 16:51:33 +01:00
Billy Laws
3feb354186
Frontend: Keep the associated thread object as a member
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Avoids an additional layer of indirection for callbacks. Passing them
around deep into instruction decoding logic doesn't provide much benefit
seeing as there will always be one frontend object per thread.
2025-07-10 16:00:24 +01:00
Billy Laws
d41cb3b69d
FEXCore: Support multiple entrypoints into a multiblock
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If a multiblock contains a call instruction, we know at the point
of compilation that the instruction after that call will likely be
jumped to at some point. Avoid redundant recompilation by tracking
such cases and including an entrypoint for that instruction in the
multiblock aswell.
2025-07-10 16:00:24 +01:00
Billy Laws
cdef1ed0c5
Frontend: Explore after call instructions with multiblock
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Each instruction after a call instruction can be treated as an
additional entrypoint to the multiblock
2025-07-10 16:00:24 +01:00
Billy Laws
4f79acc32a
X86Tables: Mark call instructions with a flag
2025-07-10 16:00:24 +01:00
Alyssa Rosenzweig
d23bb01e96
JIT: fix divisor masking
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oversight. should fix Steam.
Fixes: de4becc26Closes : #4652
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2025-07-09 15:00:42 -04:00
Ryan Houdek
60f63ca467
Merge pull request #4649 from bylaws/rexvex
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Frontend: Raise #UD on invalid VEX/REX encodings
2025-07-09 10:37:50 -07:00
Ryan Houdek
f44af48751
Merge pull request #4648 from bylaws/sfmodreg
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SecondaryGroupTables: Specify FLAGS_SF_MOD_REG_ONLY for more ops
2025-07-09 09:02:12 -07:00
Ryan Houdek
bd136eae71
Merge pull request #4647 from bylaws/sizrfix
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OpcodeDispatcher: Fix several cases where incorrectly sized loads/stores could be used
2025-07-09 08:49:38 -07:00
Billy Laws
26215d5425
VEXTables: Complete decode flag information
2025-07-09 00:53:23 +01:00
Billy Laws
baa5c6f79b
Frontend: Require VEX.vvvv is 0 when unused
2025-07-09 00:53:23 +01:00
Billy Laws
c0fcb27aa5
Frontend: Add instruction flags to specify valid REX.W encodings
2025-07-09 00:53:23 +01:00
Billy Laws
02b7938b93
Frontend: Add instruction flags to specify valid VEX.L encodings
2025-07-09 00:53:23 +01:00
Billy Laws
0f6ceaac05
OpcodeDispatcher: Load only the element size from memory for VFMAScalarImpl
2025-07-09 00:52:59 +01:00
Billy Laws
635816c07f
OpcodeDispatcher: Force ElementSize loads for UCOMISxOp
2025-07-09 00:52:59 +01:00
Billy Laws
2fac5c23ff
OpcodeDispatcher: Always use 32-bit load/store for {LD,ST}MXCSR
2025-07-09 00:52:59 +01:00
Billy Laws
ff4c1cf0d5
X86Tables: Fix (V)CV(T)TSD2SI size flags
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This led to incorrect OOB handling for 32-bit dests.
2025-07-09 00:52:45 +01:00
Billy Laws
c2e2d1e92f
OpcodeDispatcher: Only read at most ElementSize in CVTFPR_To_GPR
2025-07-09 00:50:47 +01:00
Billy Laws
0ab56bad95
SecondaryGroupTables: Specify FLAGS_SF_MOD_REG_ONLY for more ops
2025-07-08 23:45:32 +01:00
Billy Laws
407c5a0f78
PoolBufferWithTimedRetirement: Unclaim in dtor
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Buffers are tied to the lifetime of their owned flag, and as that
is a member of PoolBufferWithTimedRetirement we must always unclaim here.
Avoids the need to manually remember this quirk (which was forgot for the
temporary compilation buffer in JIT.cpp) at every use-site.
2025-07-08 23:38:43 +01:00
Billy Laws