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Author SHA1 Message Date
Ryan Houdek 0dc7fd75e1 Adds a couple new 32bit syscalls found while running Steam 
These are straightforward to implement. Only a few dozen more syscalls missing on 32bit
 2021-03-10 17:43:21 -08:00
Stefanos Kornilios Mitsis Poiitidis e708b83dbb Merge pull request #826 from Sonicadvance1/disable_rcpc 
Disables RCPC on ARM64 JIT
 2021-03-10 12:31:17 +02:00
Ryan Houdek a9d3851684 Disables RCPC on ARM64 JIT 
This is currently bugged on Snapdragon 865.
Seems to only affect its prime core. Smells like errata.
 2021-03-10 02:13:16 -08:00
Ryan Houdek 7e4ba77d72 Merge pull request #825 from FEX-Emu/skmp/fix-sigchld 
Signals: SA_NOCLDSTOP only blocks CLD_CONTINUED/STOPPED/TRAPPED
 2021-03-10 01:50:04 -08:00
Stefanos Kornilios Mitsis Poiitidis 449ea3e80b Signals: SA_NOCLDSTOP only blocks CLD_CONTINUED/STOPPED/TRAPPED 2021-03-10 11:25:40 +02:00
Stefanos Kornilios Mitsis Poiitidis 8fd91a5b7a Merge pull request #821 from Sonicadvance1/update_vixl 
Updates vixl submodule
 2021-03-10 09:12:40 +02:00
Ryan Houdek e3d6db2eb5 Merge pull request #823 from FEX-Emu/skmp/fix-secondaryalu-atomics 
OpDisp: Add atomic logic for SecondaryALUOp
 2021-03-09 18:15:18 -08:00
Stefanos Kornilios Mitsis Poiitidis d930de30ef OpDisp: Add atomic logic for SecondaryALUOp 2021-03-09 18:32:13 +02:00
Scott Mansell b36378369a Merge pull request #822 from FEX-Emu/skmp/fix-scm-bug 
ConstProp: Restrict imm code motion around selects to matching sizes, fixes dav1d
 2021-03-09 22:12:50 +13:00
Stefanos Kornilios Mitsis Poiitidis cbf4c9a687 ConstProp: Restrict imm code motion around selects to matching sizes, fixes dav1d 2021-03-09 11:06:16 +02:00
Ryan Houdek bcebe7d47a Updates vixl submodule 
Works around the no enum enum conversion warnings
 2021-03-08 23:57:58 -08:00
Ryan Houdek e9b057bc8b Merge pull request #817 from phire/SeparateThreadAndState 
Separate thread and state
 2021-03-08 23:41:56 -08:00
Scott Mansell afda855caf disptacher fixes/cleanups 2021-03-09 20:28:53 +13:00
Scott Mansell 6ed36e3304 Refactor syscalls to take Frame 
The vast majoirty of syscalls don't need anything in thread or frame.
So lets save an indirection for all those syscalls.

Most of the syscalls which do need Thread (or CTX via
Thread are in Thread.cpp or Memory.cpp
These have all been modifiy to fetch Thread from Frame
 2021-03-09 20:28:50 +13:00
Scott Mansell 35c01038ba Seperate per-thread and per-frame state 2021-03-09 20:27:44 +13:00
Scott Mansell 43a087d554 Allow both interpeter dispatchers to be built 
This commit doesn't include cmakefile changes to actually do this.
 2021-03-09 20:25:14 +13:00
Ryan Houdek a1fed323df Merge pull request #820 from Sonicadvance1/remove_config_duplication 
Deduplicates some configuration data
 2021-03-08 23:20:04 -08:00
Ryan Houdek 0bcd1c7df5 Merge pull request #816 from Sonicadvance1/cpuid_80000005 
Implements CPUID 0x8000'0005 for L1 cacheline information
 2021-03-08 23:15:03 -08:00
Ryan Houdek a3ba1ae199 Deduplicates some configuration data 
Configuration mapping was duplicated between three different tables.
Additionally default configuration values were strewn about. Making it confusing as to what the default value would end up being

Adds a new ConfigValues.inl header that defines a few things right next to each other.
Defines the enum name as usual.
Defines the JSON config option name.
Defines the Environment config option name
Defines the default value that the configuration should be
 2021-03-08 22:53:41 -08:00
Ryan Houdek a2278cfb1e Adds StrConv type for enum conversion 2021-03-08 22:50:42 -08:00
Scott Mansell 98cb54e3e4 Merge pull request #812 from phire/both_sides 
Allow both ARM64 and X86_64 jits to be compiled at the same time
 2021-03-09 14:59:11 +13:00
Scott Mansell cb17127ccb Remove last traces of vixl simulator mode 2021-03-08 16:30:25 +13:00
Scott Mansell 93b6dbdc2b Fix Arm64JitCore instantiation on x86 2021-03-08 16:30:25 +13:00
Scott Mansell bea0adc3d1 Allow both jitcores to be enabled simultaneously 2021-03-08 16:30:25 +13:00
Scott Mansell 9c339c85c6 Cmake: allow independant control of both jits 2021-03-08 16:30:25 +13:00
Scott Mansell 9cf7545f8d Abstract mcontext out of JITs 
This will help with unification of common code later
 2021-03-08 16:30:25 +13:00
Ryan Houdek c657165e56 Implements CPUID 0x8000'0005 for L1 cacheline information 
@skmp commented about this in the L2 cacheline information PR.
Quickly implement it since it also has cacheline information.

Fairly trivial since every piece of information is just some 8bit variables.
 2021-03-06 08:32:47 -08:00
Ryan Houdek 05ae7d3c5e Merge pull request #814 from Sonicadvance1/cacheline_cpuid 
Implements CPUID 0x8000'0006 for cacheline information
 2021-03-06 08:23:03 -08:00
Ryan Houdek f94529ebb2 Implements CPUID 0x8000'0006 for cacheline information 
This exposes some cache information including cacheline information.

Fills out this data structure as well just incase we hit another cacheline size bug
 2021-03-06 07:30:25 -08:00
Ryan Houdek 852ab4e245 Merge pull request #815 from Sonicadvance1/sse4_1_movnt 
Implements MOVNTDQA
 2021-03-06 07:25:56 -08:00
Ryan Houdek bb6e7360a2 Merge pull request #813 from Sonicadvance1/disable_python_dev_check 
Disabled cmake check for python development
 2021-03-06 07:25:16 -08:00
Ryan Houdek 50ae18cbaf Adds MOVNTDQA unit test 2021-03-06 06:23:27 -08:00
Ryan Houdek 1adbf66fee Implements MOVNTDQA 
Found this when running Steamlink under FEX on my laptop.
Turns out the Iris video driver now uses this unconditionally in a couple of locations.
Makes sense there since all the Iris targets are expected to support SSE4.1 atm.
 2021-03-06 06:23:18 -08:00
Ryan Houdek 8222acdf20 Disabled cmake check for python development 
We only need the interpreter
 2021-03-06 06:06:59 -08:00
Stefanos Kornilios Mitsis Poiitidis 3978097f15 Merge pull request #705 from FEX-Emu/skmp/mmap-cache-flushing 
Flush IR/Code cache on mmap, mmunmap & mprot
FEX-2103 		2021-03-03 12:59:29 +02:00
Stefanos Kornilios Mitsis Poiitidis 613e5b66ba SMC: Expand --smc-checks options to 'none', 'mman', 'full' 2021-03-03 12:49:23 +02:00
Ryan Houdek e95d1bd761 Merge pull request #811 from phire/remove-operator-names 
X64_64 JIt: Remove -fno-operator-names
 2021-03-02 18:55:53 -08:00
Scott Mansell ec95610587 X64_64 JIt: Remove -fno-operator-names 
Some IDEs didn't recognize this flag and threw
phantom errors when these files were open.

Lets lean towards a smoother developer experience
 2021-03-03 15:47:58 +13:00
Ryan Houdek b57cf78cc7 Merge pull request #810 from phire/fix_include 
Add missing unordered_map include
 2021-03-02 18:00:39 -08:00
Scott Mansell f5ac5d1667 Add missing unordered_map include 
It's really unhelpful that libstdc++ includes this by default
 2021-03-03 14:06:16 +13:00
Stefanos Kornilios Mitsis Poiitidis e92578817d SMC: Flush IR/Code cache on mmap, mmunmap & mprot 2021-02-26 13:22:05 +02:00
Stefanos Kornilios Mitsis Poiitidis 5b4696976d Merge pull request #805 from FEX-Emu/skmp/asm-thunks 
Thunks: Convert guest thunk to asm, to avoid issues with older gcc versions
 2021-02-26 12:57:14 +02:00
Stefanos Kornilios Mitsis Poiitidis aecea294d5 Merge pull request #792 from Sonicadvance1/implemented_unaligned_memory_ops 
Implements unaligned atomic memory ops for ARMv8.1+
 2021-02-26 12:50:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 70a98cd465 Thunks: Convert guest thunk to asm, to avoid issues with older gcc verions 2021-02-26 12:43:37 +02:00
Stefanos Kornilios Mitsis Poiitidis 2071bab238 Merge pull request #803 from Sonicadvance1/faccessat2 
Implements support for faccessat2 in syscallhandler
 2021-02-25 23:58:11 +02:00
Ryan Houdek 9746e0175e Change unsupported faccessat2 to use safe syscall unsupported 2021-02-25 13:45:24 -08:00
Ryan Houdek d78a3784fb Guards SYS_faccessat2 define for new enough glibc defines 2021-02-25 13:44:40 -08:00
Ryan Houdek 7dd5252d68 Implements support for faccessat2 in syscallhandler 
Only exists if the host kernel is >= 5.8.0.
 2021-02-24 09:52:30 -08:00
Ryan Houdek ac92a103df Adds support for faccessat2 to FileManager 2021-02-24 09:51:29 -08:00
Ryan Houdek 74a00fee0f Updates syscall definitions enums 2021-02-24 09:51:03 -08:00