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Arm64Emitter: Move NOP pads to before the move instructions
Recent CPUs do nop fusion with the following instruction, this gives the CPU the best chance to do fusion with something that actually does work. Very trivial, doesn't do this for the more complex handling below these as counting the number of moves before nop emitting is messy.
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@@ -438,13 +438,13 @@ void Arm64Emitter::LoadConstant(ARMEmitter::Size s, ARMEmitter::Register Reg, ui
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LOGMAN_THROW_A_FMT(MaxBytes == 0 || (Constant >> (MaxBytes * 8)) == 0, "MaxBytes provided but data can't fit within provided range.");
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if (Is64Bit && ((~Constant) >> 16) == 0) {
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movn(s, Reg, (~Constant) & 0xFFFF);
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if (NOPPad) {
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nop();
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nop();
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nop();
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}
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movn(s, Reg, (~Constant) & 0xFFFF);
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return;
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}
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@@ -456,13 +456,13 @@ void Arm64Emitter::LoadConstant(ARMEmitter::Size s, ARMEmitter::Register Reg, ui
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}
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if (!Is64Bit && ((~Constant) & 0xFFFF0000) == 0) {
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movn(s, Reg.W(), (~Constant) & 0xFFFF);
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if (NOPPad) {
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nop();
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nop();
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nop();
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}
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movn(s, Reg.W(), (~Constant) & 0xFFFF);
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return;
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}
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@@ -483,24 +483,24 @@ void Arm64Emitter::LoadConstant(ARMEmitter::Size s, ARMEmitter::Register Reg, ui
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// `movz` is better than `orr` since hardware will rename or merge if possible when `movz` is used.
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const auto IsImm = ARMEmitter::Emitter::IsImmLogical(Constant, RegSizeInBits(s));
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if (IsImm) {
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orr(s, Reg, ARMEmitter::Reg::zr, Constant);
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if (NOPPad) {
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nop();
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nop();
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nop();
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}
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orr(s, Reg, ARMEmitter::Reg::zr, Constant);
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return;
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}
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}
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// If we can't handle negatives with the orr, try with movn+movk
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if (Is64Bit && ((~Constant) >> 32) == 0) {
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movn(s, Reg, (~Constant) & 0xFFFF);
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movk(s, Reg, (Constant >> 16) & 0xFFFF, 16);
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if (NOPPad) {
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nop();
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nop();
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}
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movn(s, Reg, (~Constant) & 0xFFFF);
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movk(s, Reg, (Constant >> 16) & 0xFFFF, 16);
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return;
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}
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