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InstCountCI: Update

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed 2024-02-02 13:03:55 -04:00
1 parent 8d3f0b6f02
commit afae24d870
3 files changed
+1888 -3914
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unittests/InstructionCountCI/FEXOpt/libnss.json
+1705 -3629
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unittests/InstructionCountCI/H0F38.json
+51 -115
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@@ -679,131 +679,67 @@
]
},
"sha256rnds2 xmm0, xmm1": {
"ExpectedInstructionCount": 120,
"ExpectedInstructionCount": 56,
"Comment": [
"0x66 0x0f 0x38 0xcb"
],
"ExpectedArm64ASM": [
"sub sp, sp, #0x200 (512)",
"mov w20, v17.s[3]",
"str w20, [sp, #96]",
"mov w20, v17.s[2]",
"str w20, [sp, #64]",
"mov w20, v16.s[3]",
"mov w21, v16.s[2]",
"str w21, [sp]",
"mov w21, v17.s[1]",
"str w21, [sp, #32]",
"mov w20, v17.s[1]",
"mov w21, v17.s[0]",
"mov w22, v16.s[1]",
"and w23, w20, w21",
"bic w22, w22, w20",
"eor w22, w23, w22",
"ror w23, w20, #6",
"eor w23, w23, w20, ror #11",
"eor w23, w23, w20, ror #25",
"add w22, w22, w23",
"mov w23, v16.s[0]",
"mov w24, v16.s[0]",
"mov w25, v16.s[1]",
"str w25, [sp, #128]",
"ldr w25, [sp, #32]",
"and w30, w25, w21",
"str w21, [sp, #160]",
"bic w21, w22, w25",
"str w22, [sp, #192]",
"eor w21, w30, w21",
"ror w22, w25, #6",
"ror w30, w25, #11",
"eor w22, w22, w30",
"ror w30, w25, #25",
"eor w22, w22, w30",
"add w21, w21, w22",
"add w21, w21, w24",
"str w24, [sp, #256]",
"add w22, w22, w23",
"mov w23, v16.s[0]",
"add w22, w22, w23",
"mov w23, v17.s[3]",
"mov w24, v17.s[2]",
"mov w25, v16.s[3]",
"and w30, w24, w25",
"orr w25, w24, w25",
"and w25, w23, w25",
"orr w25, w25, w30",
"add w25, w22, w25",
"ror w30, w23, #2",
"eor w30, w30, w23, ror #13",
"eor w30, w30, w23, ror #22",
"add w25, w25, w30",
"mov w30, v16.s[2]",
"add w22, w22, w30",
"and w20, w22, w20",
"bic w21, w21, w22",
"eor w20, w20, w21",
"ror w21, w22, #6",
"eor w21, w21, w22, ror #11",
"eor w21, w21, w22, ror #25",
"add w20, w20, w21",
"mov w21, v16.s[1]",
"add w20, w20, w21",
"mov w21, v16.s[1]",
"add w20, w20, w21",
"and w21, w23, w24",
"orr w23, w23, w24",
"and w23, w25, w23",
"orr w21, w23, w21",
"add w21, w20, w21",
"ror w23, w25, #2",
"eor w23, w23, w25, ror #13",
"eor w23, w23, w25, ror #22",
"add w21, w21, w23",
"str w23, [sp, #224]",
"ldr w22, [sp, #64]",
"ldr w23, [sp, #96]",
"and w24, w23, w22",
"and w30, w23, w20",
"eor w24, w24, w30",
"and w30, w22, w20",
"str w22, [sp, #320]",
"str w20, [sp, #288]",
"eor w20, w24, w30",
"add w20, w21, w20",
"ror w21, w23, #2",
"ror w22, w23, #13",
"eor w21, w21, w22",
"ror w22, w23, #22",
"eor w21, w21, w22",
"add w20, w20, w21",
"str w20, [sp, #352]",
"ldr w20, [sp, #160]",
"and w21, w25, w20",
"ldr w22, [sp, #192]",
"bic w24, w22, w25",
"eor w21, w21, w24",
"ror w24, w25, #6",
"ror w30, w25, #11",
"eor w24, w24, w30",
"ror w30, w25, #25",
"eor w24, w24, w30",
"add w21, w21, w24",
"ldr w24, [sp, #256]",
"add w21, w21, w24",
"ldr w24, [sp, #224]",
"add w21, w21, w24",
"ldr w24, [sp]",
"add w21, w21, w24",
"and w24, w21, w25",
"bic w30, w20, w21",
"str w20, [sp, #384]",
"eor w20, w24, w30",
"ror w24, w21, #6",
"ror w30, w21, #11",
"eor w24, w24, w30",
"ror w30, w21, #25",
"str w21, [sp, #480]",
"eor w21, w24, w30",
"add w20, w20, w21",
"ldr w21, [sp, #128]",
"add w20, w20, w21",
"str w21, [sp, #448]",
"add w20, w20, w22",
"str w22, [sp, #416]",
"ldr w21, [sp, #352]",
"and w22, w21, w23",
"ldr w24, [sp, #320]",
"and w30, w21, w24",
"eor w22, w22, w30",
"and w23, w23, w24",
"eor w22, w22, w23",
"add w20, w20, w22",
"ror w22, w21, #2",
"ror w23, w21, #13",
"eor w22, w22, w23",
"ror w23, w21, #22",
"eor w22, w22, w23",
"add w20, w20, w22",
"ldr w22, [sp, #480]",
"and w23, w22, w25",
"ldr w24, [sp, #384]",
"bic w24, w24, w22",
"eor w23, w23, w24",
"ror w24, w22, #6",
"ror w25, w22, #11",
"eor w24, w24, w25",
"ror w25, w22, #25",
"eor w24, w24, w25",
"add w23, w23, w24",
"ldr w24, [sp, #448]",
"add w23, w23, w24",
"ldr w24, [sp, #416]",
"add w23, w23, w24",
"ldr w24, [sp, #288]",
"add w23, w23, w24",
"mov w23, v16.s[3]",
"add w20, w20, w23",
"mov v2.16b, v16.16b",
"mov v2.s[3], w20",
"mov v2.s[2], w21",
"mov v2.s[1], w23",
"mov v2.s[3], w21",
"mov v2.s[2], w25",
"mov v2.s[1], w20",
"mov v16.16b, v2.16b",
"mov v16.s[0], w22",
"add sp, sp, #0x200 (512)"
"mov v16.s[0], w22"
]
},
"sha256msg1 xmm0, xmm1": {
unittests/InstructionCountCI/H0F3A.json
+132 -170
View File
@@ -1338,21 +1338,14 @@
]
},
"sha1rnds4 xmm0, xmm1, 00b": {
"ExpectedInstructionCount": 65,
"ExpectedInstructionCount": 57,
"Comment": [
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"sub sp, sp, #0x60 (96)",
"mov w20, #0x7999",
"movk w20, #0x5a82, lsl #16",
"mov w20, v17.s[3]",
"mov w21, v17.s[2]",
"str w21, [sp, #64]",
"mov w21, v17.s[1]",
"str w21, [sp, #32]",
"mov w21, v17.s[0]",
"str w21, [sp]",
"mov w21, v16.s[3]",
"mov w22, v16.s[2]",
"mov w23, v16.s[1]",
@@ -1367,37 +1360,37 @@
"movk w25, #0x5a82, lsl #16",
"add w20, w20, w25",
"ror w22, w22, #2",
"mov w25, v17.s[2]",
"add w24, w25, w24",
"and w25, w21, w22",
"bic w30, w23, w21",
"eor w25, w25, w30",
"ror w30, w20, #27",
"add w25, w25, w30",
"ldr w30, [sp, #64]",
"add w25, w25, w30",
"add w24, w25, w24",
"mov w25, #0x7999",
"movk w25, #0x5a82, lsl #16",
"add w24, w24, w25",
"ror w21, w21, #2",
"mov w25, v17.s[1]",
"add w23, w25, w23",
"and w25, w20, w21",
"bic w30, w22, w20",
"eor w25, w25, w30",
"ror w30, w24, #27",
"add w25, w25, w30",
"ldr w30, [sp, #32]",
"add w25, w25, w30",
"add w23, w25, w23",
"mov w25, #0x7999",
"movk w25, #0x5a82, lsl #16",
"add w23, w23, w25",
"ror w20, w20, #2",
"mov w30, v17.s[0]",
"add w22, w30, w22",
"and w30, w24, w20",
"bic w21, w21, w24",
"eor w21, w30, w21",
"ror w30, w23, #27",
"add w21, w21, w30",
"ldr w30, [sp]",
"add w21, w21, w30",
"add w21, w21, w22",
"add w21, w21, w25",
"ror w22, w24, #2",
@@ -1406,104 +1399,87 @@
"mov v2.s[2], w23",
"mov v2.s[1], w22",
"mov v16.16b, v2.16b",
"mov v16.s[0], w20",
"add sp, sp, #0x60 (96)"
"mov v16.s[0], w20"
]
},
"sha1rnds4 xmm0, xmm1, 01b": {
"ExpectedInstructionCount": 53,
"Comment": [
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"mov w20, #0xeba1",
"movk w20, #0x6ed9, lsl #16",
"mov w20, v17.s[3]",
"mov w21, v16.s[3]",
"mov w22, v16.s[2]",
"mov w23, v16.s[1]",
"mov w24, v16.s[0]",
"eor w25, w22, w23",
"eor w25, w25, w24",
"ror w30, w21, #27",
"add w25, w25, w30",
"add w20, w25, w20",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w20, w20, w25",
"ror w22, w22, #2",
"mov w25, v17.s[2]",
"add w24, w25, w24",
"eor w25, w21, w22",
"eor w25, w25, w23",
"ror w30, w20, #27",
"add w25, w25, w30",
"add w24, w25, w24",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w24, w24, w25",
"ror w21, w21, #2",
"mov w25, v17.s[1]",
"add w23, w25, w23",
"eor w25, w20, w21",
"eor w25, w25, w22",
"ror w30, w24, #27",
"add w25, w25, w30",
"add w23, w25, w23",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w23, w23, w25",
"ror w20, w20, #2",
"mov w30, v17.s[0]",
"add w22, w30, w22",
"eor w30, w24, w20",
"eor w21, w30, w21",
"ror w30, w23, #27",
"add w21, w21, w30",
"add w21, w21, w22",
"add w21, w21, w25",
"ror w22, w24, #2",
"mov v2.16b, v16.16b",
"mov v2.s[3], w21",
"mov v2.s[2], w23",
"mov v2.s[1], w22",
"mov v16.16b, v2.16b",
"mov v16.s[0], w20"
]
},
"sha1rnds4 xmm0, xmm1, 10b": {
"ExpectedInstructionCount": 61,
"Comment": [
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"sub sp, sp, #0x60 (96)",
"mov w20, #0xeba1",
"movk w20, #0x6ed9, lsl #16",
"mov w20, v17.s[3]",
"mov w21, v17.s[2]",
"mov w22, v17.s[1]",
"str w22, [sp, #32]",
"mov w22, v17.s[0]",
"str w22, [sp]",
"mov w22, v16.s[3]",
"mov w23, v16.s[2]",
"mov w24, v16.s[1]",
"mov w25, v16.s[0]",
"eor w30, w23, w24",
"eor w30, w30, w25",
"str w25, [sp, #64]",
"ror w25, w22, #27",
"add w25, w30, w25",
"add w20, w25, w20",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w20, w20, w25",
"ror w23, w23, #2",
"eor w25, w22, w23",
"eor w25, w25, w24",
"ror w30, w20, #27",
"add w25, w25, w30",
"add w21, w25, w21",
"ldr w25, [sp, #64]",
"add w21, w21, w25",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w21, w21, w25",
"ror w22, w22, #2",
"eor w25, w20, w22",
"eor w25, w25, w23",
"ror w30, w21, #27",
"add w25, w25, w30",
"ldr w30, [sp, #32]",
"add w25, w25, w30",
"add w24, w25, w24",
"mov w25, #0xeba1",
"movk w25, #0x6ed9, lsl #16",
"add w24, w24, w25",
"ror w20, w20, #2",
"eor w30, w21, w20",
"eor w22, w30, w22",
"ror w30, w24, #27",
"add w22, w22, w30",
"ldr w30, [sp]",
"add w22, w22, w30",
"add w22, w22, w23",
"add w22, w22, w25",
"ror w21, w21, #2",
"mov v2.16b, v16.16b",
"mov v2.s[3], w22",
"mov v2.s[2], w24",
"mov v2.s[1], w21",
"mov v16.16b, v2.16b",
"mov v16.s[0], w20",
"add sp, sp, #0x60 (96)"
]
},
"sha1rnds4 xmm0, xmm1, 10b": {
"ExpectedInstructionCount": 75,
"Comment": [
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"sub sp, sp, #0x60 (96)",
"mov w20, #0xbcdc",
"movk w20, #0x8f1b, lsl #16",
"mov w20, v17.s[3]",
"mov w21, v17.s[2]",
"str w21, [sp, #64]",
"mov w21, v17.s[1]",
"str w21, [sp, #32]",
"mov w21, v17.s[0]",
"str w21, [sp]",
"mov w21, v16.s[3]",
"mov w22, v16.s[2]",
"mov w23, v16.s[1]",
"mov w24, v16.s[0]",
"and w25, w22, w23",
"and w30, w22, w24",
"eor w25, w25, w30",
"and w30, w23, w24",
"eor w25, w25, w30",
"and w25, w23, w24",
"orr w30, w23, w24",
"and w30, w22, w30",
"orr w25, w30, w25",
"ror w30, w21, #27",
"add w25, w25, w30",
"add w20, w25, w20",
@@ -1511,124 +1487,110 @@
"movk w25, #0x8f1b, lsl #16",
"add w20, w20, w25",
"ror w22, w22, #2",
"and w25, w21, w22",
"and w30, w21, w23",
"eor w25, w25, w30",
"and w30, w22, w23",
"eor w25, w25, w30",
"mov w25, v17.s[2]",
"add w24, w25, w24",
"and w25, w22, w23",
"orr w30, w22, w23",
"and w30, w21, w30",
"orr w25, w30, w25",
"ror w30, w20, #27",
"add w25, w25, w30",
"ldr w30, [sp, #64]",
"add w25, w25, w30",
"add w24, w25, w24",
"mov w25, #0xbcdc",
"movk w25, #0x8f1b, lsl #16",
"add w24, w24, w25",
"ror w21, w21, #2",
"and w25, w20, w21",
"and w30, w20, w22",
"eor w25, w25, w30",
"and w30, w21, w22",
"eor w25, w25, w30",
"mov w25, v17.s[1]",
"add w23, w25, w23",
"and w25, w21, w22",
"orr w30, w21, w22",
"and w30, w20, w30",
"orr w25, w30, w25",
"ror w30, w24, #27",
"add w25, w25, w30",
"ldr w30, [sp, #32]",
"add w25, w25, w30",
"add w23, w25, w23",
"mov w25, #0xbcdc",
"movk w25, #0x8f1b, lsl #16",
"add w23, w23, w25",
"ror w20, w20, #2",
"and w25, w24, w20",
"and w30, w24, w21",
"eor w25, w25, w30",
"and w21, w20, w21",
"eor w21, w25, w21",
"ror w25, w23, #27",
"add w21, w21, w25",
"ldr w25, [sp]",
"add w21, w21, w25",
"add w21, w21, w22",
"mov w22, #0xbcdc",
"movk w22, #0x8f1b, lsl #16",
"mov w30, v17.s[0]",
"add w22, w30, w22",
"and w30, w20, w21",
"orr w21, w20, w21",
"and w21, w24, w21",
"orr w21, w21, w30",
"ror w30, w23, #27",
"add w21, w21, w30",
"add w21, w21, w22",
"add w21, w21, w25",
"ror w22, w24, #2",
"mov v2.16b, v16.16b",
"mov v2.s[3], w21",
"mov v2.s[2], w23",
"mov v2.s[1], w22",
"mov v16.16b, v2.16b",
"mov v16.s[0], w20",
"add sp, sp, #0x60 (96)"
"mov v16.s[0], w20"
]
},
"sha1rnds4 xmm0, xmm1, 11b": {
"ExpectedInstructionCount": 61,
"ExpectedInstructionCount": 53,
"Comment": [
"0x66 0x0f 0x3a 0xcc"
],
"ExpectedArm64ASM": [
"sub sp, sp, #0x60 (96)",
"mov w20, #0xc1d6",
"movk w20, #0xca62, lsl #16",
"mov w20, v17.s[3]",
"mov w21, v17.s[2]",
"mov w22, v17.s[1]",
"str w22, [sp, #32]",
"mov w22, v17.s[0]",
"str w22, [sp]",
"mov w22, v16.s[3]",
"mov w23, v16.s[2]",
"mov w24, v16.s[1]",
"mov w25, v16.s[0]",
"eor w30, w23, w24",
"eor w30, w30, w25",
"str w25, [sp, #64]",
"ror w25, w22, #27",
"add w25, w30, w25",
"mov w21, v16.s[3]",
"mov w22, v16.s[2]",
"mov w23, v16.s[1]",
"mov w24, v16.s[0]",
"eor w25, w22, w23",
"eor w25, w25, w24",
"ror w30, w21, #27",
"add w25, w25, w30",
"add w20, w25, w20",
"mov w25, #0xc1d6",
"movk w25, #0xca62, lsl #16",
"add w20, w20, w25",
"ror w23, w23, #2",
"eor w25, w22, w23",
"eor w25, w25, w24",
"ror w30, w20, #27",
"add w25, w25, w30",
"add w21, w25, w21",
"ldr w25, [sp, #64]",
"add w21, w21, w25",
"mov w25, #0xc1d6",
"movk w25, #0xca62, lsl #16",
"add w21, w21, w25",
"ror w22, w22, #2",
"eor w25, w20, w22",
"mov w25, v17.s[2]",
"add w24, w25, w24",
"eor w25, w21, w22",
"eor w25, w25, w23",
"ror w30, w21, #27",
"add w25, w25, w30",
"ldr w30, [sp, #32]",
"ror w30, w20, #27",
"add w25, w25, w30",
"add w24, w25, w24",
"mov w25, #0xc1d6",
"movk w25, #0xca62, lsl #16",
"add w24, w24, w25",
"ror w20, w20, #2",
"eor w30, w21, w20",
"eor w22, w30, w22",
"ror w30, w24, #27",
"add w22, w22, w30",
"ldr w30, [sp]",
"add w22, w22, w30",
"add w22, w22, w23",
"add w22, w22, w25",
"ror w21, w21, #2",
"mov w25, v17.s[1]",
"add w23, w25, w23",
"eor w25, w20, w21",
"eor w25, w25, w22",
"ror w30, w24, #27",
"add w25, w25, w30",
"add w23, w25, w23",
"mov w25, #0xc1d6",
"movk w25, #0xca62, lsl #16",
"add w23, w23, w25",
"ror w20, w20, #2",
"mov w30, v17.s[0]",
"add w22, w30, w22",
"eor w30, w24, w20",
"eor w21, w30, w21",
"ror w30, w23, #27",
"add w21, w21, w30",
"add w21, w21, w22",
"add w21, w21, w25",
"ror w22, w24, #2",
"mov v2.16b, v16.16b",
"mov v2.s[3], w22",
"mov v2.s[2], w24",
"mov v2.s[1], w21",
"mov v2.s[3], w21",
"mov v2.s[2], w23",
"mov v2.s[1], w22",
"mov v16.16b, v2.16b",
"mov v16.s[0], w20",
"add sp, sp, #0x60 (96)"
"mov v16.s[0], w20"
]
}
}