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InstCountCI: Update for optimized cvtsi2s{s,d}

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Ryan Houdek committed 2023-08-25 03:19:11 -07:00
1 parent 1cb2b084b3
commit a901e5f3df
3 files changed
+15 -19
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unittests/InstructionCountCI/Secondary_REP.json
+6 -7
View File
@@ -67,28 +67,27 @@
]
},
"cvtsi2ss xmm0, eax": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"ExpectedInstructionCount": 2,
"Optimal": "Yes",
"Comment": [
"With AFP mode FEX can remove an insert after the operation.",
"0xf3 0x0f 0x2a"
],
"ExpectedArm64ASM": [
"ubfx x20, x4, #0, #32",
"scvtf s4, w20",
"scvtf s4, w4",
"mov v16.s[0], v4.s[0]"
]
},
"cvtsi2ss xmm0, dword [rax]": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Optimal": "Yes",
"Comment": [
"With AFP mode FEX can remove an insert after the operation.",
"0xf3 0x0f 0x2a"
],
"ExpectedArm64ASM": [
"ldr w20, [x4]",
"scvtf s4, w20",
"ldr s4, [x4]",
"scvtf s4, s4",
"mov v16.s[0], v4.s[0]"
]
},
unittests/InstructionCountCI/Secondary_REPNE.json
+5 -6
View File
@@ -52,15 +52,14 @@
]
},
"cvtsi2sd xmm0, eax": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"ExpectedInstructionCount": 2,
"Optimal": "Yes",
"Comment": [
"With AFP mode FEX can remove an insert after the operation.",
"0xf2 0x0f 0x2a"
],
"ExpectedArm64ASM": [
"ubfx x20, x4, #0, #32",
"scvtf d4, w20",
"scvtf d4, w4",
"mov v16.d[0], v4.d[0]"
]
},
@@ -97,8 +96,8 @@
"0xf2 0x0f 0x2a"
],
"ExpectedArm64ASM": [
"ldr x20, [x4]",
"scvtf d4, x20",
"ldr d4, [x4]",
"scvtf d4, d4",
"mov v16.d[0], v4.d[0]"
]
},
unittests/InstructionCountCI/VEX_map1.json
+4 -6
View File
@@ -3604,15 +3604,14 @@
]
},
"vcvtsi2ss xmm0, xmm1, eax": {
"ExpectedInstructionCount": 6,
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 1 0b10 0x2A 128-bit"
],
"ExpectedArm64ASM": [
"mov z4.d, p7/m, z17.d",
"ubfx x20, x4, #0, #32",
"scvtf s5, w20",
"scvtf s5, w4",
"mov v4.s[0], v5.s[0]",
"mov v4.16b, v4.16b",
"mov z16.d, p7/m, z4.d"
@@ -3633,15 +3632,14 @@
]
},
"vcvtsi2sd xmm0, xmm1, eax": {
"ExpectedInstructionCount": 6,
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 1 0b11 0x2A 128-bit"
],
"ExpectedArm64ASM": [
"mov z4.d, p7/m, z17.d",
"ubfx x20, x4, #0, #32",
"scvtf d5, w20",
"scvtf d5, w4",
"mov v4.d[0], v5.d[0]",
"mov v4.16b, v4.16b",
"mov z16.d, p7/m, z4.d"