IR: make FillRegister sizes explicit

instead of hacking around it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp

@@ -163,11 +163,7 @@ private:
     LOGMAN_THROW_A_FMT(SlotPlusOne >= 1, "Old must have been spilled");
 
     RegisterClassType RegClass = GetRegClassFromNode(IR, IROp);
-
-    auto Fill = IREmit->_FillRegister(Old, SlotPlusOne - 1, RegClass);
-    Fill.first->Header.Size = IROp->Size;
-    Fill.first->Header.ElementSize = IROp->ElementSize;
-    return Fill;
+    return IREmit->_FillRegister(IROp->Size, IROp->ElementSize, Old, SlotPlusOne - 1, RegClass);
   };
 
   // IP of next-use of each Old source. IPs are measured from the end of the