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OpcodeDispatcher: use size-appropriate alu in bt*

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saves zero-extending move for 32-bit ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed 2023-11-29 14:22:21 -04:00
1 parent 7216415bfc
commit 068599b1ec
1 file changed
+3 -3
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FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+3 -3
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@@ -2780,21 +2780,21 @@ void OpDispatchBuilder::BTOp(OpcodeArgs) {
case BTAction::BTClear: {
OrderedNode *BitMask = _Lshl(IR::SizeToOpSize(LshrSize), _Constant(1), BitSelect);
Dest = _Andn(OpSize::i64Bit, Dest, BitMask);
Dest = _Andn(IR::SizeToOpSize(LshrSize), Dest, BitMask);
StoreResult(GPRClass, Op, Dest, -1);
break;
}
case BTAction::BTSet: {
OrderedNode *BitMask = _Lshl(IR::SizeToOpSize(LshrSize), _Constant(1), BitSelect);
Dest = _Or(OpSize::i64Bit, Dest, BitMask);
Dest = _Or(IR::SizeToOpSize(LshrSize), Dest, BitMask);
StoreResult(GPRClass, Op, Dest, -1);
break;
}
case BTAction::BTComplement: {
OrderedNode *BitMask = _Lshl(IR::SizeToOpSize(LshrSize), _Constant(1), BitSelect);
Dest = _Xor(OpSize::i64Bit, Dest, BitMask);
Dest = _Xor(IR::SizeToOpSize(LshrSize), Dest, BitMask);
StoreResult(GPRClass, Op, Dest, -1);
break;
}