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https://github.com/FEX-Emu/FEX.git
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InstcountCI: Update
This commit is contained in:
Simon Scherer committed
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@@ -210,7 +210,7 @@ namespace DiskCache {
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// TODO: This header is in global installed header path, but uses internal headers.
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// Migrate this once that is fixed.
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static constexpr uint16_t FormatVersion = 13;
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static constexpr uint16_t FormatVersion = 14;
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FEX_DEFAULT_VISIBILITY uint16_t GetFormatVersion();
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} // namespace DiskCache
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@@ -8,7 +8,7 @@
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"SVE128",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"roundss xmm0, xmm1, 00000000b": {
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@@ -7,7 +7,7 @@
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"AFP"
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],
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"DisabledHostFeatures": [],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtpi2ps xmm0, [rax]": {
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@@ -9,7 +9,7 @@
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"DisabledHostFeatures": [
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"RPRES"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtsi2ss xmm0, eax": {
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@@ -7,7 +7,7 @@
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"AFP"
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],
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"DisabledHostFeatures": [],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtsi2sd xmm0, eax": {
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@@ -8,7 +8,7 @@
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"SVE128",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtpi2ps xmm0, [rax]": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"RPRES"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtsi2ss xmm0, eax": {
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@@ -8,7 +8,7 @@
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"SVE128",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"cvtsi2sd xmm0, eax": {
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@@ -9,7 +9,7 @@
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"DisabledHostFeatures": [
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"RPRES"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vsqrtss xmm0, xmm1, xmm2": {
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@@ -7,7 +7,7 @@
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"AFP"
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],
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"DisabledHostFeatures": [],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vroundss xmm0, xmm1, 00000000b": {
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@@ -7,7 +7,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vfmaddsubps xmm0, xmm1, xmm2, xmm3": {
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@@ -13,7 +13,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vmovups xmm0, xmm0": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vaddsubpd xmm0, xmm1, xmm2": {
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@@ -10,7 +10,7 @@
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"FLAGM2",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vmovntps [rax], xmm0": {
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@@ -10,7 +10,7 @@
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"SVE128",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vucomiss xmm0, xmm1": {
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@@ -9,7 +9,7 @@
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"SVE128",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vpshufb xmm0, xmm1, xmm2": {
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@@ -8,7 +8,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vfmadd132ss xmm0, xmm1, xmm2": {
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@@ -10,7 +10,7 @@
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"FLAGM2",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vmovntdqa xmm0, [rax]": {
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@@ -11,7 +11,7 @@
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"SVE256",
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"SVEBITPERM"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vtestps xmm0, xmm1": {
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@@ -7,7 +7,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vpermq ymm0, ymm1, 1": {
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@@ -8,7 +8,7 @@
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"AFP",
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"SVE256"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vblendvps xmm0, xmm1, xmm2, xmm3": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"vpsrlw xmm0, xmm1, 0": {
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@@ -9,7 +9,7 @@
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"FLAGM",
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"FLAGM2"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"lock add byte [rax], cl": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"sha1nexte xmm0, xmm1": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"sha1nexte xmm0, xmm1": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"pclmulqdq xmm0, xmm1, 00000b": {
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@@ -10,7 +10,7 @@
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"AFP",
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"RPRES"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These 3DNow! instructions are optimal assuming that FEX doesn't SRA MMX registers",
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@@ -8,7 +8,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"Instructions that explicitly push against the limits of ARM's loadstore instructions"
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@@ -8,7 +8,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"Instructions that explicitly push against the limits of ARM's loadstore instructions"
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@@ -13,7 +13,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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@@ -11,7 +11,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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@@ -9,7 +9,7 @@
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"SVE256",
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"RPRES"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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@@ -14,7 +14,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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@@ -14,7 +14,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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@@ -12,7 +12,7 @@
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Comment": [],
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"Instructions": {
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@@ -10,7 +10,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"lock add byte [rax], cl": {
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@@ -9,7 +9,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"Chained add": {
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@@ -10,7 +10,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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"Instructions": {
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"ptest xmm0, xmm1": {
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@@ -10,7 +10,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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"BinaryCacheVersion": 14
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},
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||||
"Instructions": {
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||||
"The Witcher 3": {
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@@ -10,7 +10,7 @@
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"SVE256",
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"AFP"
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],
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"BinaryCacheVersion": 13
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||||
"BinaryCacheVersion": 14
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||||
},
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"Instructions": {
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"Sonic Mania movie player": {
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||||
|
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@@ -10,7 +10,7 @@
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"SVE128",
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"SVE256"
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||||
],
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"BinaryCacheVersion": 13
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||||
"BinaryCacheVersion": 14
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||||
},
|
||||
"Instructions": {
|
||||
"FMOD scalar loop": {
|
||||
|
||||
@@ -13,7 +13,7 @@
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||||
"SVE256",
|
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"AFP"
|
||||
],
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||||
"BinaryCacheVersion": 13
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||||
"BinaryCacheVersion": 14
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||||
},
|
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"Instructions": {
|
||||
"The Sims 1 hot block": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"add bl, cl": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
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"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"add al, 1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"push es": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"RPRES",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"ucomiss xmm0, xmm1": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"sgdt [rax]": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"xgetbv": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"AFP",
|
||||
"FCMA"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"ucomisd xmm0, xmm1": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"AFP",
|
||||
"CSSC"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"popcnt ax, bx": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"RPRES",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"popcnt ax, bx": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"RPRES",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vucomiss xmm0, xmm1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"AFP",
|
||||
"SVEBITPERM"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vtestps xmm0, xmm1": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"DisabledHostFeatures": [
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"blsr eax, ebx": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
@@ -2167,7 +2167,7 @@
|
||||
},
|
||||
"Block8": {
|
||||
"x86InstructionCount": 25,
|
||||
"ExpectedInstructionCount": 72,
|
||||
"ExpectedInstructionCount": 76,
|
||||
"x86Insts": [
|
||||
"fstp st0",
|
||||
"fstp st3",
|
||||
@@ -2197,49 +2197,31 @@
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q3, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr q4, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w20, w20, #0x2 (2)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x23, x28, x20, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v3.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s5, s0",
|
||||
"str s5, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v4.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s5, s0",
|
||||
"str s5, [x8, #44]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x12, x28, x20, lsl #4",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr q3, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr q4, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"ldr q5, [x12, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"add w13, w22, #0x1 (1)",
|
||||
"and w13, w13, #0x7",
|
||||
"add x13, x28, x13, lsl #4",
|
||||
"ldr q6, [x13, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w22, w22, #0x2 (2)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x14, x28, x22, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v5.16b",
|
||||
@@ -2247,32 +2229,54 @@
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s6, s0",
|
||||
"str s6, [x8, #40]",
|
||||
"fmov s7, s0",
|
||||
"str s7, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v2.16b",
|
||||
"mov v0.16b, v6.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s7, s0",
|
||||
"str s7, [x8, #44]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr q7, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v7.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s8, s0",
|
||||
"str s8, [x8, #40]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v3.16b",
|
||||
"ldr x0, [x28, #1688]",
|
||||
"ldr x3, [x28, #1696]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov d6, d0",
|
||||
"str d6, [x8]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"mov w13, #0x24",
|
||||
"movk w13, #0x1, lsl #16",
|
||||
"str w13, [x8, #-4]!",
|
||||
"fmov d8, d0",
|
||||
"str d8, [x8]",
|
||||
"mov w15, #0x24",
|
||||
"movk w15, #0x1, lsl #16",
|
||||
"str w15, [x8, #-4]!",
|
||||
"strb w20, [x28, #1051]",
|
||||
"str q3, [x21, #1056]",
|
||||
"str q4, [x22, #1056]",
|
||||
"str q5, [x23, #1056]",
|
||||
"str q2, [x12, #1056]",
|
||||
"str q2, [x21, #1056]",
|
||||
"str q4, [x23, #1056]",
|
||||
"str q5, [x12, #1056]",
|
||||
"str q6, [x13, #1056]",
|
||||
"str q7, [x14, #1056]",
|
||||
"str q3, [x22, #1056]",
|
||||
"strb wzr, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
"Block9": {
|
||||
"x86InstructionCount": 25,
|
||||
"ExpectedInstructionCount": 72,
|
||||
"ExpectedInstructionCount": 76,
|
||||
"x86Insts": [
|
||||
"fstp st0",
|
||||
"fstp st3",
|
||||
@@ -2302,49 +2306,31 @@
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q3, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr q4, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w20, w20, #0x2 (2)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x23, x28, x20, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v3.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s5, s0",
|
||||
"str s5, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v4.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s5, s0",
|
||||
"str s5, [x8, #44]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x12, x28, x20, lsl #4",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr q3, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr q4, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"ldr q5, [x12, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"add w13, w22, #0x1 (1)",
|
||||
"and w13, w13, #0x7",
|
||||
"add x13, x28, x13, lsl #4",
|
||||
"ldr q6, [x13, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w22, w22, #0x2 (2)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x14, x28, x22, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v5.16b",
|
||||
@@ -2352,26 +2338,48 @@
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s6, s0",
|
||||
"str s6, [x8, #40]",
|
||||
"fmov s7, s0",
|
||||
"str s7, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v2.16b",
|
||||
"mov v0.16b, v6.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s7, s0",
|
||||
"str s7, [x8, #44]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr q7, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v7.16b",
|
||||
"ldr x0, [x28, #1672]",
|
||||
"ldr x3, [x28, #1680]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov s8, s0",
|
||||
"str s8, [x8, #40]",
|
||||
"str x30, [sp, #-16]!",
|
||||
"mov v0.16b, v3.16b",
|
||||
"ldr x0, [x28, #1688]",
|
||||
"ldr x3, [x28, #1696]",
|
||||
"blr x0",
|
||||
"ldr x30, [sp], #16",
|
||||
"fmov d6, d0",
|
||||
"str d6, [x8]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"mov w13, #0x24",
|
||||
"movk w13, #0x1, lsl #16",
|
||||
"str w13, [x8, #-4]!",
|
||||
"fmov d8, d0",
|
||||
"str d8, [x8]",
|
||||
"mov w15, #0x24",
|
||||
"movk w15, #0x1, lsl #16",
|
||||
"str w15, [x8, #-4]!",
|
||||
"strb w20, [x28, #1051]",
|
||||
"str q3, [x21, #1056]",
|
||||
"str q4, [x22, #1056]",
|
||||
"str q5, [x23, #1056]",
|
||||
"str q2, [x12, #1056]",
|
||||
"str q2, [x21, #1056]",
|
||||
"str q4, [x23, #1056]",
|
||||
"str q5, [x12, #1056]",
|
||||
"str q6, [x13, #1056]",
|
||||
"str q7, [x14, #1056]",
|
||||
"str q3, [x22, #1056]",
|
||||
"strb wzr, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"CSSC",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"fadd dword [rax]": {
|
||||
@@ -7381,11 +7381,21 @@
|
||||
]
|
||||
},
|
||||
"fst st0": {
|
||||
"ExpectedInstructionCount": 0,
|
||||
"ExpectedInstructionCount": 9,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd0 /2"
|
||||
],
|
||||
"ExpectedArm64ASM": []
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"str q2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"lsl w20, w22, w20",
|
||||
"orr w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
"fst st1": {
|
||||
"ExpectedInstructionCount": 12,
|
||||
@@ -7528,19 +7538,20 @@
|
||||
]
|
||||
},
|
||||
"fstp st0": {
|
||||
"ExpectedInstructionCount": 11,
|
||||
"ExpectedInstructionCount": 12,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd8 /3"
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"strb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"strb w22, [x28, #1051]",
|
||||
"str q2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"add w20, w20, #0x7 (7)",
|
||||
"and w20, w20, #0x7",
|
||||
"lsl w20, w22, w20",
|
||||
"bic w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
@@ -892,7 +892,7 @@
|
||||
},
|
||||
"Block8": {
|
||||
"x86InstructionCount": 25,
|
||||
"ExpectedInstructionCount": 47,
|
||||
"ExpectedInstructionCount": 51,
|
||||
"x86Insts": [
|
||||
"fstp st0",
|
||||
"fstp st3",
|
||||
@@ -922,57 +922,61 @@
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d2, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d3, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr d4, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w20, w20, #0x2 (2)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x23, x28, x20, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s5, d3",
|
||||
"str s5, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s5, d4",
|
||||
"str s5, [x8, #44]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x12, x28, x20, lsl #4",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr d3, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr d4, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"ldr d5, [x12, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"add w13, w22, #0x1 (1)",
|
||||
"and w13, w13, #0x7",
|
||||
"add x13, x28, x13, lsl #4",
|
||||
"ldr d6, [x13, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s6, d5",
|
||||
"str s6, [x8, #40]",
|
||||
"str d2, [x8]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"mov w13, #0x24",
|
||||
"movk w13, #0x1, lsl #16",
|
||||
"str w13, [x8, #-4]!",
|
||||
"add w22, w22, #0x2 (2)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x14, x28, x22, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s7, d5",
|
||||
"str s7, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s7, d6",
|
||||
"str s7, [x8, #44]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr d7, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s8, d7",
|
||||
"str s8, [x8, #40]",
|
||||
"str d3, [x8]",
|
||||
"mov w15, #0x24",
|
||||
"movk w15, #0x1, lsl #16",
|
||||
"str w15, [x8, #-4]!",
|
||||
"strb w20, [x28, #1051]",
|
||||
"str d3, [x21, #1056]",
|
||||
"str d4, [x22, #1056]",
|
||||
"str d5, [x23, #1056]",
|
||||
"str d2, [x12, #1056]",
|
||||
"str d2, [x21, #1056]",
|
||||
"str d4, [x23, #1056]",
|
||||
"str d5, [x12, #1056]",
|
||||
"str d6, [x13, #1056]",
|
||||
"str d7, [x14, #1056]",
|
||||
"str d3, [x22, #1056]",
|
||||
"strb wzr, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
"Block9": {
|
||||
"x86InstructionCount": 25,
|
||||
"ExpectedInstructionCount": 47,
|
||||
"ExpectedInstructionCount": 51,
|
||||
"x86Insts": [
|
||||
"fstp st0",
|
||||
"fstp st3",
|
||||
@@ -1002,51 +1006,55 @@
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d2, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d3, [x21, #1056]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr d4, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"add w20, w20, #0x2 (2)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x23, x28, x20, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s5, d3",
|
||||
"str s5, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s5, d4",
|
||||
"str s5, [x8, #44]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"add x12, x28, x20, lsl #4",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr d3, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x23, x28, x22, lsl #4",
|
||||
"ldr d4, [x23, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"ldr d5, [x12, #1056]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x12, x28, x22, lsl #4",
|
||||
"add w13, w22, #0x1 (1)",
|
||||
"and w13, w13, #0x7",
|
||||
"add x13, x28, x13, lsl #4",
|
||||
"ldr d6, [x13, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s6, d5",
|
||||
"str s6, [x8, #40]",
|
||||
"str d2, [x8]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"mov w13, #0x24",
|
||||
"movk w13, #0x1, lsl #16",
|
||||
"str w13, [x8, #-4]!",
|
||||
"add w22, w22, #0x2 (2)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x14, x28, x22, lsl #4",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s7, d5",
|
||||
"str s7, [x8, #56]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s7, d6",
|
||||
"str s7, [x8, #44]",
|
||||
"add w22, w22, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"add x22, x28, x22, lsl #4",
|
||||
"ldr d7, [x22, #1056]",
|
||||
"strb wzr, [x28, #1049]",
|
||||
"fcvt s8, d7",
|
||||
"str s8, [x8, #40]",
|
||||
"str d3, [x8]",
|
||||
"mov w15, #0x24",
|
||||
"movk w15, #0x1, lsl #16",
|
||||
"str w15, [x8, #-4]!",
|
||||
"strb w20, [x28, #1051]",
|
||||
"str d3, [x21, #1056]",
|
||||
"str d4, [x22, #1056]",
|
||||
"str d5, [x23, #1056]",
|
||||
"str d2, [x12, #1056]",
|
||||
"str d2, [x21, #1056]",
|
||||
"str d4, [x23, #1056]",
|
||||
"str d5, [x12, #1056]",
|
||||
"str d6, [x13, #1056]",
|
||||
"str d7, [x14, #1056]",
|
||||
"str d3, [x22, #1056]",
|
||||
"strb wzr, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"Block1": {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"fadd dword [rax]": {
|
||||
@@ -5914,11 +5914,21 @@
|
||||
]
|
||||
},
|
||||
"fst st0": {
|
||||
"ExpectedInstructionCount": 0,
|
||||
"ExpectedInstructionCount": 9,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd0 /2"
|
||||
],
|
||||
"ExpectedArm64ASM": []
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d2, [x21, #1056]",
|
||||
"str d2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"lsl w20, w22, w20",
|
||||
"orr w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
"fst st1": {
|
||||
"ExpectedInstructionCount": 12,
|
||||
@@ -6061,19 +6071,20 @@
|
||||
]
|
||||
},
|
||||
"fstp st0": {
|
||||
"ExpectedInstructionCount": 11,
|
||||
"ExpectedInstructionCount": 12,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd8 /3"
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"strb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr d2, [x21, #1056]",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"strb w22, [x28, #1051]",
|
||||
"str d2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"add w20, w20, #0x7 (7)",
|
||||
"and w20, w20, #0x7",
|
||||
"lsl w20, w22, w20",
|
||||
"bic w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"FLAGM2",
|
||||
"CRYPTO"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"pshufb mm0, mm1": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"AFP",
|
||||
"CRYPTO"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Comment": [
|
||||
"SSE4.2 string instructions are skipped here.",
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"dpps xmm0, xmm1, 00000000b": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"rep movsb": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"FLAGM2",
|
||||
"MOPS"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"add bl, cl": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Comment": [
|
||||
"Instructions in this table that are marked optimal don't have their flag calculation part of this assumption",
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"FlagM",
|
||||
"FlagM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"push es": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"SVE128",
|
||||
"SVE256"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"pfrcpv mm0, mm1": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"SVE128",
|
||||
"SVE256"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"rsqrtps xmm0, xmm1": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"SVE128",
|
||||
"SVE256"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"rsqrtss xmm0, xmm1": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"AFP"
|
||||
],
|
||||
"DisabledHostFeatures": [],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vrsqrtps xmm0, xmm1": {
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
"SVE128",
|
||||
"SVE256"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {}
|
||||
}
|
||||
@@ -33,7 +33,7 @@
|
||||
" - 1b: ECX = MSB",
|
||||
"[7] - Reserved"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"pcmpestrm xmm0, xmm1, 0_0_00_00_00b": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Comment": [
|
||||
"MMX instructions are defined as optimal without SRA being used for these instructions.",
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"sgdt [rax]": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"xgetbv": {
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"push fs": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"movupd xmm0, xmm0": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"addsubpd xmm0, xmm1": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"psrlw xmm0, xmm1": {
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
"AFP"
|
||||
],
|
||||
"DisabledHostFeatures": [],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"pmulhuw xmm0, xmm1": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"FRINTTS",
|
||||
"CSSC"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"movss xmm0, xmm1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"FCMA",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"movsd xmm0, xmm1": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"addsubps xmm0, xmm1": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"FCMA",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"cvtpd2dq xmm0, xmm1": {
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"cvttss2si eax, xmm0": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"SVE256",
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"movmskps eax, xmm0": {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"FLAGM2",
|
||||
"FRINTTS"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vmovups xmm0, xmm0": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"FCMA"
|
||||
],
|
||||
"DisabledHostFeatures": [],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vaddsubpd xmm0, xmm1, xmm2": {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vcvttss2si eax, xmm0": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM2",
|
||||
"SVEBITPERM"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vpshufb xmm0, xmm1, xmm2": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"pext eax, ebx, ecx": {
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
"DisabledHostFeatures": [
|
||||
"AFP"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vpermq ymm0, ymm1, 1": {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"vpsrlw xmm0, xmm1, 0": {
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
"FLAGM2",
|
||||
"RPRES"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"fstp tword [rax]": {
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
"FLAGM",
|
||||
"FLAGM2"
|
||||
],
|
||||
"BinaryCacheVersion": 13
|
||||
"BinaryCacheVersion": 14
|
||||
},
|
||||
"Instructions": {
|
||||
"fadd dword [rax]": {
|
||||
@@ -7316,11 +7316,21 @@
|
||||
]
|
||||
},
|
||||
"fst st0": {
|
||||
"ExpectedInstructionCount": 0,
|
||||
"ExpectedInstructionCount": 9,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd0 /2"
|
||||
],
|
||||
"ExpectedArm64ASM": []
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"str q2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"lsl w20, w22, w20",
|
||||
"orr w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
]
|
||||
},
|
||||
"fst st1": {
|
||||
"ExpectedInstructionCount": 12,
|
||||
@@ -7463,19 +7473,20 @@
|
||||
]
|
||||
},
|
||||
"fstp st0": {
|
||||
"ExpectedInstructionCount": 11,
|
||||
"ExpectedInstructionCount": 12,
|
||||
"Comment": [
|
||||
"0xdd 11b 0xd8 /3"
|
||||
],
|
||||
"ExpectedArm64ASM": [
|
||||
"ldrb w20, [x28, #1051]",
|
||||
"add w20, w20, #0x1 (1)",
|
||||
"and w20, w20, #0x7",
|
||||
"strb w20, [x28, #1051]",
|
||||
"add x21, x28, x20, lsl #4",
|
||||
"ldr q2, [x21, #1056]",
|
||||
"add w22, w20, #0x1 (1)",
|
||||
"and w22, w22, #0x7",
|
||||
"strb w22, [x28, #1051]",
|
||||
"str q2, [x21, #1056]",
|
||||
"ldrb w21, [x28, #1202]",
|
||||
"mov w22, #0x1",
|
||||
"add w20, w20, #0x7 (7)",
|
||||
"and w20, w20, #0x7",
|
||||
"lsl w20, w22, w20",
|
||||
"bic w20, w21, w20",
|
||||
"strb w20, [x28, #1202]"
|
||||
|
||||
Loaded 100 of 103 files, more files were not shown because too many files have changed in this diff.
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Reference in new issue
Block a user