mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-07 17:00:19 +02:00
Ryan Houdek
ead73371d9
WINE uses this to determine TSC frequency and because it doesn't say `tsc` on ARM devices, it was ignoring TSC and instead using CPU maximum frequency. This was causing Horizon to think the TSC ran at whatever the max frequency of a core was (1.8Ghz to 2.6Ghz depending?) This was causing all of Horizon Zero Dawn's physics to run at slower than real time speeds because our 1Ghz (on Orion) TSC is significantly lower than the max clock speeds of the cores. This is still a bug in Wine that it is using the maximum CPU clock speed in the case of current_clocksource not being TSC, but that's a battle for a different time.
637 lines
26 KiB
C++
637 lines
26 KiB
C++
// SPDX-License-Identifier: MIT
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/*
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$info$
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tags: LinuxSyscalls|common
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desc: Emulated /proc/cpuinfo, version, osrelease, etc
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$end_info$
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*/
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#include "CodeLoader.h"
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#include "Common/CPUInfo.h"
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#include "Common/FDUtils.h"
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#include "LinuxSyscalls/Syscalls.h"
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#include "LinuxSyscalls/EmulatedFiles/EmulatedFiles.h"
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Core/CPUID.h>
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#include <FEXCore/Utils/LogManager.h>
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#include <FEXCore/fextl/fmt.h>
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#include <FEXCore/fextl/string.h>
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#include <FEXCore/fextl/sstream.h>
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#include <FEXHeaderUtils/Filesystem.h>
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#include <git_version.h>
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#include <cstring>
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#include <fcntl.h>
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#include <filesystem>
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#include <ostream>
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#include <stdio.h>
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#include <system_error>
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#include <unistd.h>
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#include <utility>
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namespace FEX::EmulatedFile {
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/**
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* @brief Generates a temporary file using raw FDs
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*
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* Since we are hooking syscalls that are expecting to use raw FDs, we need to make sure to also use raw FDs.
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* The guest application can leave these FDs dangling.
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*
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* Using glibc tmpfile creates a FILE which glibc tracks and will try cleaning up on application exit.
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* If we are running a 32-bit application then this dangling FILE will be allocated using the FEX allcator
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* Which will have already been cleaned up on shutdown.
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*
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* Dangling raw FD is safe since if the guest doesn't close them, then the kernel cleans them up on application close.
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*
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* @return A temporary file that we can use
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*/
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static int GenTmpFD(const char* pathname, int flags) {
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uint32_t memfd_flags {MFD_ALLOW_SEALING};
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if (flags & O_CLOEXEC) {
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memfd_flags |= MFD_CLOEXEC;
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}
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return memfd_create(pathname, memfd_flags);
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}
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// Seal the tmpfd features by sealing them all.
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// Makes the tmpfd read-only.
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static void SealTmpFD(int fd) {
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int ret = fcntl(fd, F_ADD_SEALS, F_SEAL_SEAL | F_SEAL_SHRINK | F_SEAL_GROW | F_SEAL_WRITE | F_SEAL_FUTURE_WRITE);
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if (ret == -1) [[unlikely]] {
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// This shouldn't ever happen, but also isn't fatal.
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LogMan::Msg::EFmt("Couldn't seal tmpfd! {}", errno);
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}
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}
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fextl::string GenerateCPUInfo(FEXCore::Context::Context* ctx, uint32_t CPUCores) {
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fextl::ostringstream cpu_stream {};
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auto res_0 = ctx->RunCPUIDFunction(0, 0);
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auto res_1 = ctx->RunCPUIDFunction(1, 0);
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auto res_6 = ctx->RunCPUIDFunction(6, 0);
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auto res_7 = ctx->RunCPUIDFunction(7, 0);
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auto res_7_1 = ctx->RunCPUIDFunction(7, 1);
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auto res_d_1 = ctx->RunCPUIDFunction(0xD, 1);
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auto res_10 = ctx->RunCPUIDFunction(0x10, 0);
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auto res_8000_0001 = ctx->RunCPUIDFunction(0x8000'0001, 0);
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auto res_8000_0007 = ctx->RunCPUIDFunction(0x8000'0007, 0);
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auto res_8000_0008 = ctx->RunCPUIDFunction(0x8000'0008, 0);
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auto res_8000_000a = ctx->RunCPUIDFunction(0x8000'000a, 0);
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auto res_8000_001f = ctx->RunCPUIDFunction(0x8000'001f, 0);
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union VendorID {
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struct {
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uint32_t id;
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char Str[13];
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};
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struct {
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FEXCore::CPUID::FunctionResults cpuid;
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uint8_t null;
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};
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};
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union ModelName {
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struct {
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char Str[49];
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};
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struct {
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FEXCore::CPUID::FunctionResults cpuid_2;
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FEXCore::CPUID::FunctionResults cpuid_3;
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FEXCore::CPUID::FunctionResults cpuid_4;
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uint8_t null;
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};
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};
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union Info {
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FEXCore::CPUID::FunctionResults cpuid;
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struct {
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unsigned Stepping : 4;
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unsigned Model : 4;
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unsigned FamilyID : 4;
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unsigned Type : 4;
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unsigned ExModelID : 4;
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unsigned ExFamilyID : 8;
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unsigned : 4;
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};
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};
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VendorID vendorid {};
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vendorid.cpuid = {res_0.eax, res_0.ebx, res_0.edx, res_0.ecx};
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vendorid.null = 0;
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Info info {res_1};
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uint32_t Family = info.FamilyID + (info.FamilyID == 0xF ? info.ExFamilyID : 0);
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fextl::ostringstream flags_data {};
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// Generate the flags data up front
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// This is the same per core
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{
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auto add_flag_if = [&flags_data](bool flag, const char* name) {
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if (flag) {
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flags_data << name << " ";
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}
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};
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add_flag_if(res_1.edx & (1 << 0), "fpu");
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add_flag_if(res_1.edx & (1 << 1), "vme");
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add_flag_if(res_1.edx & (1 << 2), "de");
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add_flag_if(res_1.edx & (1 << 3), "pse");
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add_flag_if(res_1.edx & (1 << 4), "tsc");
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add_flag_if(res_1.edx & (1 << 5), "msr");
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add_flag_if(res_1.edx & (1 << 6), "pae");
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add_flag_if(res_1.edx & (1 << 7), "mce");
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add_flag_if(res_1.edx & (1 << 8), "cx8");
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add_flag_if(res_1.edx & (1 << 9), "apic");
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add_flag_if(res_1.edx & (1 << 11), "sep");
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add_flag_if(res_1.edx & (1 << 12), "mtrr");
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add_flag_if(res_1.edx & (1 << 13), "pge");
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add_flag_if(res_1.edx & (1 << 14), "mca");
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add_flag_if(res_1.edx & (1 << 15), "cmov");
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add_flag_if(res_1.edx & (1 << 16), "pat");
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add_flag_if(res_1.edx & (1 << 17), "pse36");
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add_flag_if(res_1.edx & (1 << 18), "pn");
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add_flag_if(res_1.edx & (1 << 19), "clflush");
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add_flag_if(res_1.edx & (1 << 21), "ds"); // XXX
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add_flag_if(res_1.edx & (1 << 22), "acpi"); // XXX
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add_flag_if(res_1.edx & (1 << 23), "mmx");
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add_flag_if(res_1.edx & (1 << 24), "fxsr");
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add_flag_if(res_1.edx & (1 << 25), "sse");
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add_flag_if(res_1.edx & (1 << 26), "sse2");
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add_flag_if(res_1.edx & (1 << 27), "ss");
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add_flag_if(res_1.edx & (1 << 28), "ht");
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add_flag_if(res_1.edx & (1 << 29), "tm");
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add_flag_if(res_1.edx & (1 << 30), "ia64");
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add_flag_if(res_1.edx & (1 << 31), "pbe");
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add_flag_if(res_8000_0001.edx & (1 << 11), "syscall");
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add_flag_if(res_8000_0001.edx & (1 << 19), "mp");
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add_flag_if(res_8000_0001.edx & (1 << 20), "nx");
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add_flag_if(res_8000_0001.edx & (1 << 22), "mmxext");
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add_flag_if(res_8000_0001.edx & (1 << 25), "fxsr_opt");
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add_flag_if(res_8000_0001.edx & (1 << 26), "pdpe1gb");
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add_flag_if(res_8000_0001.edx & (1 << 27), "rdtscp");
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add_flag_if(res_8000_0001.edx & (1 << 29), "lm");
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add_flag_if(res_8000_0001.edx & (1 << 31), "3dnow");
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add_flag_if(res_8000_0001.edx & (1 << 30), "3dnowext");
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add_flag_if(res_8000_0007.edx & (1 << 8), "constant_tsc");
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// We are not a uniprocessor running in SMP mode
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add_flag_if(false, "up");
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// Timer is always running
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add_flag_if(true, "art");
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// No Intel perfmon
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add_flag_if(false, "arch_perfmon");
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// No precise event based sampling
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add_flag_if(false, "pebs");
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// No branch trace store
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add_flag_if(false, "bts");
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add_flag_if(true, "rep_good");
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add_flag_if(res_8000_0007.edx & (1 << 12), "tm");
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// Always support long nop
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add_flag_if(true, "nopl");
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// Always expose topology information
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add_flag_if(true, "xtoplogy");
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// Atom/geode only?
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add_flag_if(false, "tsc_reliable");
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add_flag_if(res_8000_0007.edx & (1 << 8), "nonstop_tsc");
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// We always support CPUID
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add_flag_if(true, "cpuid");
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add_flag_if(Family > 0x16, "extd_apicid");
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add_flag_if(false, "amd_dcm"); // Never claim to be a multi node processor
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add_flag_if(res_8000_0007.edx & (1 << 11), "aperfmperf");
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// Need to check ARM documentation if we can support this?
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add_flag_if(false, "nonstop_tsc_s3");
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// We can calculate this flag on AArch64
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add_flag_if(true, "tsc_known_freq");
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add_flag_if(res_1.ecx & (1 << 0), "pni");
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add_flag_if(res_1.ecx & (1 << 1), "pclmulqdq");
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add_flag_if(res_1.ecx & (1 << 2), "dtes64");
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add_flag_if(res_1.ecx & (1 << 3), "monitor");
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add_flag_if(res_1.ecx & (1 << 4), "ds_cpl");
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add_flag_if(res_1.ecx & (1 << 5), "vmx");
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add_flag_if(res_1.ecx & (1 << 6), "smx");
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add_flag_if(res_1.ecx & (1 << 7), "est");
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add_flag_if(res_1.ecx & (1 << 8), "tm2");
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add_flag_if(res_1.ecx & (1 << 9), "ssse3");
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add_flag_if(res_1.ecx & (1 << 11), "sdbg");
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add_flag_if(res_1.ecx & (1 << 12), "fma");
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add_flag_if(res_1.ecx & (1 << 13), "cx16");
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add_flag_if(res_1.ecx & (1 << 14), "xptr");
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add_flag_if(res_1.ecx & (1 << 15), "pdcm");
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add_flag_if(res_1.ecx & (1 << 17), "pcid");
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add_flag_if(res_1.ecx & (1 << 18), "dca");
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add_flag_if(res_1.ecx & (1 << 19), "sse4_1");
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add_flag_if(res_1.ecx & (1 << 20), "sse4_2");
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add_flag_if(res_1.ecx & (1 << 21), "x2apic");
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add_flag_if(res_1.ecx & (1 << 22), "movbe");
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add_flag_if(res_1.ecx & (1 << 23), "popcnt");
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add_flag_if(res_1.ecx & (1 << 24), "tsc_deadline_timer");
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add_flag_if(res_1.ecx & (1 << 25), "aes");
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add_flag_if(res_1.ecx & (1 << 26), "xsave");
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add_flag_if(res_1.ecx & (1 << 28), "avx");
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add_flag_if(res_1.ecx & (1 << 29), "f16c");
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add_flag_if(res_1.ecx & (1 << 30), "rdrand");
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add_flag_if(res_1.ecx & (1 << 31), "hypervisor");
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add_flag_if(res_8000_0001.ecx & (1 << 0), "lahf_lm");
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add_flag_if(res_8000_0001.ecx & (1 << 1), "cmp_legacy");
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add_flag_if(res_8000_0001.ecx & (1 << 2), "svm");
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add_flag_if(res_8000_0001.ecx & (1 << 3), "extapic");
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add_flag_if(res_8000_0001.ecx & (1 << 4), "cr8_legacy");
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add_flag_if(res_8000_0001.ecx & (1 << 5), "abm");
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add_flag_if(res_8000_0001.ecx & (1 << 6), "sse4a");
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add_flag_if(res_8000_0001.ecx & (1 << 7), "misalignsse");
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add_flag_if(res_8000_0001.ecx & (1 << 8), "3dnowprefetch");
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add_flag_if(res_8000_0001.ecx & (1 << 9), "osvw");
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add_flag_if(res_8000_0001.ecx & (1 << 10), "ibs");
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add_flag_if(res_8000_0001.ecx & (1 << 11), "xop");
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add_flag_if(res_8000_0001.ecx & (1 << 12), "skinit");
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add_flag_if(res_8000_0001.ecx & (1 << 13), "wdt");
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add_flag_if(res_8000_0001.ecx & (1 << 15), "lwp");
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add_flag_if(res_8000_0001.ecx & (1 << 16), "fma4");
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add_flag_if(res_8000_0001.ecx & (1 << 17), "tce");
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add_flag_if(res_8000_0001.ecx & (1 << 19), "nodeid_msr");
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add_flag_if(res_8000_0001.ecx & (1 << 21), "tbm");
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add_flag_if(res_8000_0001.ecx & (1 << 22), "topoext");
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add_flag_if(res_8000_0001.ecx & (1 << 23), "perfctr_core");
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add_flag_if(res_8000_0001.ecx & (1 << 24), "perfctr_nb");
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add_flag_if(res_8000_0001.ecx & (1 << 26), "bpext");
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add_flag_if(res_8000_0001.ecx & (1 << 27), "ptsc");
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add_flag_if(res_8000_0001.ecx & (1 << 28), "perfctr_llc");
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add_flag_if(res_8000_0001.ecx & (1 << 29), "mwaitx");
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// We don't support ring 3 supporting mwait
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add_flag_if(false, "ring3mwait");
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// We don't support Intel CPUID fault support
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add_flag_if(false, "cpuid_fault");
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add_flag_if(res_8000_0007.edx & (1 << 9), "cpb");
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add_flag_if(res_6.ecx & (1 << 3), "epb");
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add_flag_if(res_10.ebx & (1 << 1), "cat_l3");
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add_flag_if(res_10.ebx & (1 << 2), "cat_l2");
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add_flag_if(false, "invpcid_single");
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add_flag_if(res_8000_0007.edx & (1 << 7), "hw_pstate");
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add_flag_if(res_8000_001f.eax & (1 << 0), "sme");
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// Kernel page table isolation.
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add_flag_if(false, "pti");
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// We don't support Intel's Protected Processor Inventory Number
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add_flag_if(false, "intel_ppin");
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add_flag_if(res_8000_0008.ebx & (1 << 6), "mba");
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add_flag_if(res_8000_001f.eax & (1 << 1), "sev");
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{ // Speculative bug workarounds
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// We don't claim to have these bugs, so we don't need to claim these flags
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add_flag_if(res_7.edx & (1 << 31), "ssbd");
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add_flag_if(false, "ibrs");
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add_flag_if(false, "ibpb");
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add_flag_if(res_7.edx & (1 << 27), "stibp");
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add_flag_if(false, "ibrs_enhanced");
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}
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// We don't support Intel's TPR Shadow feature
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add_flag_if(false, "tpr_shadow");
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// Intel virtual NMI
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add_flag_if(false, "vnmi");
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// Intel FlexPriority
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add_flag_if(false, "flexpriority");
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// Intel Extended page table
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add_flag_if(false, "ept");
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// Intel virtual processor ID
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add_flag_if(false, "vpid");
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// Prefer VMMCall to VMCall
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add_flag_if(false, "vmmcall");
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// Intel extended page table access dirty bit
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add_flag_if(false, "ept_ad");
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add_flag_if(res_7.ebx & (1 << 0), "fsgsbase");
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add_flag_if(res_7.ebx & (1 << 1), "tsc_adjust");
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add_flag_if(res_7.ebx & (1 << 3), "bmi1");
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add_flag_if(res_7.ebx & (1 << 4), "hle");
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add_flag_if(res_7.ebx & (1 << 5), "avx2");
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add_flag_if(res_7.ebx & (1 << 7), "smep");
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add_flag_if(res_7.ebx & (1 << 8), "bmi2");
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add_flag_if(res_7.ebx & (1 << 9), "erms");
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add_flag_if(res_7.ebx & (1 << 10), "invpcid");
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add_flag_if(res_7.ebx & (1 << 11), "rtm");
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add_flag_if(res_7.ebx & (1 << 12), "rdt_m");
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add_flag_if(res_7.ebx & (1 << 13), "depc_fpu_cs_ds");
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add_flag_if(res_7.ebx & (1 << 14), "mpx");
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add_flag_if(res_7.ebx & (1 << 15), "rdt_a");
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add_flag_if(res_7.ebx & (1 << 16), "avx512f");
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add_flag_if(res_7.ebx & (1 << 17), "avx512dq");
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add_flag_if(res_7.ebx & (1 << 18), "rdseed");
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add_flag_if(res_7.ebx & (1 << 19), "adx");
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add_flag_if(res_7.ebx & (1 << 20), "smap");
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add_flag_if(res_7.ebx & (1 << 21), "avx512ifma");
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add_flag_if(res_7.ebx & (1 << 23), "clflushopt");
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add_flag_if(res_7.ebx & (1 << 24), "clwb");
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add_flag_if(res_7.ebx & (1 << 25), "intel_pt");
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add_flag_if(res_7.ebx & (1 << 26), "avx512pf");
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add_flag_if(res_7.ebx & (1 << 27), "avx512er");
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add_flag_if(res_7.ebx & (1 << 28), "avx512cd");
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add_flag_if(res_7.ebx & (1 << 29), "sha_ni");
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add_flag_if(res_7.ebx & (1 << 30), "avx512bw");
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add_flag_if(res_7.ebx & (1 << 31), "avx512vl");
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add_flag_if(res_d_1.eax & (1 << 0), "xsaveopt");
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add_flag_if(res_d_1.eax & (1 << 1), "xsavec");
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add_flag_if(res_d_1.eax & (1 << 2), "xgetbv1");
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add_flag_if(res_d_1.eax & (1 << 3), "xsaves");
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add_flag_if(res_7_1.eax & (1 << 5), "avx512_bf16");
|
|
add_flag_if(res_8000_0008.ebx & (1 << 0), "clzero");
|
|
add_flag_if(res_8000_0008.ebx & (1 << 1), "irperf");
|
|
add_flag_if(res_8000_0008.ebx & (1 << 2), "xsaveerptr");
|
|
|
|
// Intel digital thermal sensor
|
|
add_flag_if(false, "dtherm");
|
|
// Intel turbo boost
|
|
add_flag_if(false, "ida");
|
|
add_flag_if(res_6.eax & (1 << 2), "arat");
|
|
// Power limit notification controls
|
|
add_flag_if(false, "pln");
|
|
// Intel package thermal status
|
|
add_flag_if(false, "pts");
|
|
|
|
// Intel Hardware P-state features
|
|
add_flag_if(false, "hwp");
|
|
add_flag_if(false, "hwp_notify");
|
|
add_flag_if(false, "hwp_act_window");
|
|
add_flag_if(false, "hwp_epp");
|
|
add_flag_if(false, "hwp_pkg_req");
|
|
|
|
add_flag_if(res_8000_000a.ebx & (1 << 0), "npt");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 1), "lbrv");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 2), "svm_lock");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 3), "nrip_save");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 4), "tsc_scale");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 5), "vmcb_clean");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 6), "flushbyasid");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 7), "decodeassists");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 10), "pausefilter");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 12), "pfthreshold");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 13), "avic");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 15), "v_vmsave_vmload");
|
|
add_flag_if(res_8000_000a.ebx & (1 << 16), "vgif");
|
|
|
|
add_flag_if(res_7.ecx & (1 << 1), "avx512vbmi");
|
|
add_flag_if(res_7.ecx & (1 << 2), "umip");
|
|
add_flag_if(res_7.ecx & (1 << 3), "pku");
|
|
add_flag_if(res_7.ecx & (1 << 4), "ospke");
|
|
add_flag_if(res_7.ecx & (1 << 5), "waitpkg");
|
|
add_flag_if(res_7.ecx & (1 << 6), "avx512_vbmi2");
|
|
add_flag_if(res_7.ecx & (1 << 8), "gfni");
|
|
add_flag_if(res_7.ecx & (1 << 9), "vaes");
|
|
add_flag_if(res_7.ecx & (1 << 10), "vpclmulqdq");
|
|
add_flag_if(res_7.ecx & (1 << 11), "avx512_vnni");
|
|
add_flag_if(res_7.ecx & (1 << 12), "avx512_bitalg");
|
|
add_flag_if(res_7.ecx & (1 << 13), "tme");
|
|
add_flag_if(res_7.ecx & (1 << 14), "avx512_vpopcntdq");
|
|
add_flag_if(res_7.ecx & (1 << 16), "la57");
|
|
add_flag_if(res_7.ecx & (1 << 22), "rdpid");
|
|
add_flag_if(res_7.ecx & (1 << 25), "cldemote");
|
|
add_flag_if(res_7.ecx & (1 << 27), "movdiri");
|
|
add_flag_if(res_7.ecx & (1 << 28), "movdir64b");
|
|
|
|
add_flag_if(res_8000_0007.ebx & (1 << 0), "overflow_recov");
|
|
add_flag_if(res_8000_0007.ebx & (1 << 1), "succor");
|
|
add_flag_if(res_8000_0007.ebx & (1 << 3), "smca");
|
|
|
|
add_flag_if(res_7.edx & (1 << 2), "avx512_4vnniw");
|
|
add_flag_if(res_7.edx & (1 << 3), "avx512_4fmaps");
|
|
add_flag_if(res_7.edx & (1 << 4), "fsrm");
|
|
add_flag_if(res_7.edx & (1 << 8), "avx512_vp2intersect");
|
|
add_flag_if(res_7.edx & (1 << 10), "md_clear");
|
|
add_flag_if(res_7.edx & (1 << 14), "serialize");
|
|
add_flag_if(res_7.edx & (1 << 18), "pconfig");
|
|
add_flag_if(res_7.edx & (1 << 19), "arch_lbr");
|
|
add_flag_if(res_7.edx & (1 << 28), "flush_l1d");
|
|
add_flag_if(res_7.edx & (1 << 29), "arch_capabilities");
|
|
}
|
|
|
|
// Get the cycle counter frequency from CPUID function 15h.
|
|
auto res_15 = ctx->RunCPUIDFunction(0x15, 0);
|
|
// Frequency is calculated in Hz, we need to convert it to megahertz since FEX is guaranteed to return >= 1Ghz.
|
|
// x86 Bogomips is calculated as an equation based on the clock speed of the CPU (Or TSC) divided by 500k jiffies.
|
|
// A `jiffie` is an internal metric for the kernel's `HZ` frequency which is usually between 100 and 1000.
|
|
// Userspace can't query this HZ config option, so assume 1000Hz since that's common.
|
|
// This gives a 1Ghz ARMv9.2 CPU a Bogomips of 2Ghz.
|
|
constexpr double HzInMhz = 1000000.0;
|
|
constexpr double HzInKhz = 1000.0;
|
|
constexpr double BogomipsJiffyPrecision = 1'000.0;
|
|
constexpr double BogoMipsDivisor = 500'000.0 / BogomipsJiffyPrecision;
|
|
|
|
const double Frequency = 1.0 / (static_cast<double>(res_15.eax) / (static_cast<double>(res_15.ebx) * static_cast<double>(res_15.ecx)));
|
|
const double FrequencyMhz = Frequency / HzInMhz;
|
|
const double FrequencyKhz = Frequency / HzInKhz;
|
|
const double Bogomips = FrequencyKhz / BogoMipsDivisor;
|
|
// Generate the cycle counter frequency string in the format expected by cpuinfo.
|
|
// ex: `4000.000`
|
|
const auto FrequencyString = fextl::fmt::format("{:.3f}", FrequencyMhz);
|
|
const auto BogomipsString = fextl::fmt::format("{:.2f}", Bogomips);
|
|
|
|
for (int i = 0; i < CPUCores; ++i) {
|
|
cpu_stream << "processor\t: " << i << std::endl; // Logical id
|
|
cpu_stream << "vendor_id\t: " << vendorid.Str << std::endl;
|
|
cpu_stream << "cpu family\t: " << Family << std::endl;
|
|
cpu_stream << "model\t\t: " << (info.Model + (info.FamilyID >= 6 ? (info.ExModelID << 4) : 0)) << std::endl;
|
|
ModelName modelname {};
|
|
auto res_8000_0002 = ctx->RunCPUIDFunctionName(0x8000'0002, 0, i);
|
|
auto res_8000_0003 = ctx->RunCPUIDFunctionName(0x8000'0003, 0, i);
|
|
auto res_8000_0004 = ctx->RunCPUIDFunctionName(0x8000'0004, 0, i);
|
|
modelname.cpuid_2 = res_8000_0002;
|
|
modelname.cpuid_3 = res_8000_0003;
|
|
modelname.cpuid_4 = res_8000_0004;
|
|
modelname.null = 0;
|
|
|
|
cpu_stream << "model name\t: " << modelname.Str << std::endl;
|
|
cpu_stream << "stepping\t: " << info.Stepping << std::endl;
|
|
cpu_stream << "microcode\t: 0x0" << std::endl;
|
|
cpu_stream << "cpu MHz\t\t: " << FrequencyString << std::endl;
|
|
cpu_stream << "cache size\t: 512 KB" << std::endl;
|
|
cpu_stream << "physical id\t: 0" << std::endl; // Socket id (always 0 for a single socket system)
|
|
cpu_stream << "siblings\t: " << CPUCores << std::endl; // Number of logical cores
|
|
cpu_stream << "core id\t\t: " << i << std::endl; // Physical id
|
|
cpu_stream << "cpu cores\t: " << CPUCores << std::endl; // Number of physical cores
|
|
cpu_stream << "apicid\t\t: " << i << std::endl;
|
|
cpu_stream << "initial apicid\t: " << i << std::endl;
|
|
cpu_stream << "fpu\t\t: " << (res_1.edx & (1 << 0) ? "yes" : "no") << std::endl;
|
|
cpu_stream << "fpu_exception\t: " << (res_1.edx & (1 << 0) ? "yes" : "no") << std::endl;
|
|
cpu_stream << "cpuid level\t: " << vendorid.id << std::endl;
|
|
cpu_stream << "wp\t\t: yes" << std::endl;
|
|
cpu_stream << "flags\t\t: " << flags_data.str() << std::endl;
|
|
|
|
// We don't have any bugs, don't question it
|
|
cpu_stream << "bugs\t\t: " << std::endl;
|
|
cpu_stream << "bogomips\t: " << BogomipsString << std::endl;
|
|
// These next four aren't necessarily correct
|
|
cpu_stream << "TLB size\t: 2560 4K pages" << std::endl;
|
|
cpu_stream << "clflush size\t: 64" << std::endl;
|
|
cpu_stream << "cache_alignment\t : 64" << std::endl;
|
|
|
|
// Cortex-A is 40 or 44 bits physical, and 48/52 virtual
|
|
// Choose the lesser configuration
|
|
cpu_stream << "address sizes\t: 40 bits physical, 48 bits virtual" << std::endl;
|
|
|
|
// No power management but required to report
|
|
cpu_stream << "power management: " << std::endl;
|
|
|
|
cpu_stream << std::endl;
|
|
}
|
|
|
|
return cpu_stream.str();
|
|
}
|
|
|
|
EmulatedFDManager::EmulatedFDManager(FEXCore::Context::Context* ctx)
|
|
: CTX {ctx}
|
|
, ThreadsConfig {FEX::CPUInfo::CalculateNumberOfCPUs()} {
|
|
FDReadCreators["/proc/cpuinfo"] = [&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) -> int32_t {
|
|
// Only allow a single thread to initialize the cpu_info.
|
|
// Jit in-case multiple threads try to initialize at once.
|
|
// Check if deferred cpuinfo initialization has occured.
|
|
std::call_once(cpu_info_initialized, [&]() { cpu_info = GenerateCPUInfo(ctx, ThreadsConfig); });
|
|
|
|
int FD = GenTmpFD(pathname, flags);
|
|
write(FD, (void*)&cpu_info.at(0), cpu_info.size());
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
FDReadCreators["/proc/sys/kernel/osrelease"] = [&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags,
|
|
mode_t mode) -> int32_t {
|
|
int FD = GenTmpFD(pathname, flags);
|
|
uint32_t GuestVersion = FEX::HLE::_SyscallHandler->GetGuestKernelVersion();
|
|
char Tmp[64] {};
|
|
snprintf(Tmp, sizeof(Tmp), "%d.%d.%d\n", FEX::HLE::SyscallHandler::KernelMajor(GuestVersion),
|
|
FEX::HLE::SyscallHandler::KernelMinor(GuestVersion), FEX::HLE::SyscallHandler::KernelPatch(GuestVersion));
|
|
// + 1 to ensure null at the end
|
|
write(FD, Tmp, strlen(Tmp) + 1);
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
FDReadCreators["/proc/version"] = [&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) -> int32_t {
|
|
int FD = GenTmpFD(pathname, flags);
|
|
// UTS version NEEDS to be in a format that can pass to `date -d`
|
|
// Format of this is Linux version <Release> (<Compile By>@<Compile Host>) (<Linux Compiler>) #<version> {SMP, PREEMPT, PREEMPT_RT} <UTS version>\n"
|
|
const char kernel_version[] = "Linux version %d.%d.%d (FEX@FEX) (clang) #" GIT_DESCRIBE_STRING " SMP " __DATE__ " " __TIME__ "\n";
|
|
uint32_t GuestVersion = FEX::HLE::_SyscallHandler->GetGuestKernelVersion();
|
|
char Tmp[sizeof(kernel_version) + 64] {};
|
|
snprintf(Tmp, sizeof(Tmp), kernel_version, FEX::HLE::SyscallHandler::KernelMajor(GuestVersion),
|
|
FEX::HLE::SyscallHandler::KernelMinor(GuestVersion), FEX::HLE::SyscallHandler::KernelPatch(GuestVersion));
|
|
// + 1 to ensure null at the end
|
|
write(FD, Tmp, strlen(Tmp) + 1);
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
// Wine reads this to ensure TSC is trusted by the kernel. Otherwise it falls back to maximum clock speed of the CPU cores.
|
|
// Without this, games like Horizon Zero Dawn would run their physics in slow-motion.
|
|
FDReadCreators["/sys/devices/system/clocksource/clocksource0/current_clocksource"] =
|
|
[&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) -> int32_t {
|
|
int FD = GenTmpFD(pathname, flags);
|
|
const char source[] = "tsc\n";
|
|
// + 1 to ensure null at the end
|
|
write(FD, source, strlen(source) + 1);
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
auto NumCPUCores = [&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) -> int32_t {
|
|
int FD = GenTmpFD(pathname, flags);
|
|
write(FD, (void*)&cpus_online.at(0), cpus_online.size());
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
FDReadCreators["/sys/devices/system/cpu/online"] = NumCPUCores;
|
|
FDReadCreators["/sys/devices/system/cpu/present"] = NumCPUCores;
|
|
|
|
fextl::string procAuxv = fextl::fmt::format("/proc/{}/auxv", getpid());
|
|
|
|
FDReadCreators[procAuxv] = &EmulatedFDManager::ProcAuxv;
|
|
FDReadCreators["/proc/self/auxv"] = &EmulatedFDManager::ProcAuxv;
|
|
|
|
auto cmdline_handler = [&](FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) -> int32_t {
|
|
int FD = GenTmpFD(pathname, flags);
|
|
auto CodeLoader = FEX::HLE::_SyscallHandler->GetCodeLoader();
|
|
auto Args = CodeLoader->GetApplicationArguments();
|
|
char NullChar {};
|
|
// cmdline is an array of null terminated arguments
|
|
for (size_t i = 0; i < Args->size(); ++i) {
|
|
auto& Arg = Args->at(i);
|
|
write(FD, Arg.c_str(), Arg.size());
|
|
// Finish off with a null terminator
|
|
write(FD, &NullChar, sizeof(uint8_t));
|
|
}
|
|
|
|
// One additional null terminator to finish the list
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
};
|
|
|
|
FDReadCreators["/proc/self/cmdline"] = cmdline_handler;
|
|
fextl::string procCmdLine = fextl::fmt::format("/proc/{}/cmdline", getpid());
|
|
FDReadCreators[procCmdLine] = cmdline_handler;
|
|
|
|
if (ThreadsConfig > 1) {
|
|
cpus_online = fextl::fmt::format("0-{}", ThreadsConfig - 1);
|
|
} else {
|
|
cpus_online = "0";
|
|
}
|
|
}
|
|
|
|
EmulatedFDManager::~EmulatedFDManager() {}
|
|
|
|
int32_t EmulatedFDManager::Open(const char* pathname, int flags, uint32_t mode) {
|
|
auto Creator = FDReadCreators.end();
|
|
if (pathname) {
|
|
Creator = FDReadCreators.find(pathname);
|
|
}
|
|
|
|
if (Creator == FDReadCreators.end()) {
|
|
return -1;
|
|
}
|
|
|
|
return Creator->second(CTX, AT_FDCWD, pathname, flags, mode);
|
|
}
|
|
|
|
int32_t EmulatedFDManager::ProcAuxv(FEXCore::Context::Context* ctx, int32_t fd, const char* pathname, int32_t flags, mode_t mode) {
|
|
uint64_t auxvBase = 0, auxvSize = 0;
|
|
FEX::HLE::_SyscallHandler->GetCodeLoader()->GetAuxv(auxvBase, auxvSize);
|
|
if (!auxvBase) {
|
|
LogMan::Msg::DFmt("Failed to get Auxv stack address");
|
|
return -1;
|
|
}
|
|
|
|
int FD = GenTmpFD(pathname, flags);
|
|
write(FD, (void*)auxvBase, auxvSize);
|
|
lseek(FD, 0, SEEK_SET);
|
|
SealTmpFD(FD);
|
|
return FD;
|
|
}
|
|
} // namespace FEX::EmulatedFile
|