mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 10:00:16 +02:00
83 lines
1.9 KiB
JSON
83 lines
1.9 KiB
JSON
{
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"Features": {
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"Bitness": 64,
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"EnabledHostFeatures": [
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"TSO",
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"LRCPC",
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"LRCPC2",
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"FLAGM",
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"FLAGM2"
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],
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"DisabledHostFeatures": [
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"SVE128",
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"SVE256",
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"RPRES",
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"AFP"
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],
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"BinaryCacheVersion": 12
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},
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"Comment": [
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"These are instruction combinations that could be more optimal if FEX optimized for them"
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],
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"Instructions": {
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"Load variables from memory": {
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"x86InstructionCount": 6,
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"ExpectedInstructionCount": 13,
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"Comment": [
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"Just to ensure small atomic offset loads are using LRCPC2"
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],
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"x86Insts": [
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"mov edi, [rcx]",
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"mov edx, [rcx + 4]",
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"mov rbx, [rcx + 8]",
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"mov rsi, [rcx + 16]",
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"mov ax, [rcx + 24]",
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"mov bl, [rcx + 26]"
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],
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"ExpectedArm64ASM": [
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"ldapur w11, [x7]",
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"nop",
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"ldapur w5, [x7, #4]",
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"nop",
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"ldapur x6, [x7, #8]",
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"nop",
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"ldapur x10, [x7, #16]",
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"nop",
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"ldapurh w20, [x7, #24]",
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"nop",
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"bfxil x4, x20, #0, #16",
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"ldapurb w20, [x7, #26]",
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"bfxil x6, x20, #0, #8"
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]
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},
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"Store variables to memory": {
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"x86InstructionCount": 6,
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"ExpectedInstructionCount": 11,
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"Comment": [
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"Just to ensure small atomic offset stores are using LRCPC2"
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],
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"x86Insts": [
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"mov [rcx], edi",
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"mov [rcx + 4], edx",
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"mov [rcx + 8], rbx",
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"mov [rcx + 16], rsi",
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"mov [rcx + 24], ax",
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"mov [rcx + 26], bl"
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],
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"ExpectedArm64ASM": [
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"nop",
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"stlur w11, [x7]",
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"nop",
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"stlur w5, [x7, #4]",
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"nop",
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"stlur x6, [x7, #8]",
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"nop",
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"stlur x10, [x7, #16]",
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"nop",
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"stlurh w4, [x7, #24]",
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"stlurb w6, [x7, #26]"
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]
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}
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}
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}
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