LC 24720b67da VectorOps: Make SVE shift==0 case symmetric with ASIMD ...

Ensures that we have consistent behavior.

2026-07-13 10:26:42 -04:00

..

ArchHelpers

Arm64Emitter: Wire up conditional FPR spilling in SpillForPreserveAllABICall

2026-07-10 10:10:25 -04:00

Dispatcher

Dispatcher: Avoid loading unnecessary reg in vixl single step

2026-07-11 15:03:29 -04:00

Interpreter

Re-optimize FYL2X for reduced precision x87 path

2026-06-30 15:00:16 -07:00

JIT

VectorOps: Make SVE shift==0 case symmetric with ASIMD

2026-07-13 10:26:42 -04:00

OpcodeDispatcher

Crypto: Clarify zero vector size in SHA1RNDS4Op()

2026-07-12 18:49:27 -04:00

VSyscall

FEXCore/Interface/Core/VSyscall: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

X86Tables

[SVE256] Ensure insertion behavior for AES operations on SSE

2026-07-03 19:35:31 -04:00

Addressing.cpp

FEXCore: Switch constant emission to default to NoPad

2025-12-29 11:45:51 -08:00

Addressing.h

Addressing: Shave 8 bytes off AddressMode

2025-10-06 15:52:15 -04:00

CodeCache.cpp

Merge pull request #5672 from neobrain/feature_woa_code_cache_bitness

2026-07-09 14:55:21 -07:00

Core.cpp

Core: Fix dereference of invalid iterator

2026-07-06 15:07:37 +02:00

CPUBackend.cpp

IR: Add constant for swapping midsections of 256-bit vectors around

2026-06-29 12:50:53 -04:00

CPUBackend.h

FEXCore: Add helper function to query available CodeBuffer size

2026-02-20 18:49:07 +01:00

CPUID.cpp

CPUID: Fix MIDR walking in SetupHostHybridFlag()

2026-07-10 05:46:16 -04:00

CPUID.h

CPUID: Add basic handling for AVX10 info

2026-03-25 19:18:05 -04:00

Frontend.cpp

Frontend: Fix vsyscall page tracking.

2026-06-03 18:03:31 -07:00

Frontend.h

Frontend: Fix vsyscall page tracking.

2026-06-03 18:03:31 -07:00

LookupCache.cpp

CodeCache: Implement lazy code loading

2026-05-13 21:25:47 +02:00

LookupCache.h

FEXCore: Moves SpinWaitLock and WritePriorityMutex to frontend visible includes

2026-03-31 19:02:51 -07:00

OpcodeDispatcher.cpp

FEXCore: Fixes a crash with multiblock if ProcessorID IR op is encountered

2026-07-08 17:41:03 -07:00

OpcodeDispatcher.h

[SVE256] Ensure insertion behavior for AES operations on SSE

2026-07-03 19:35:31 -04:00