Alyssa Rosenzweig 15b86e4c5a OpcodeDispatcher: rewrite ROL/ROR ...

single unified implementation for ROL & ROR (instead of 4 cases). no more
deferred flags because it's easy to shoot ourselves in the foot with deferred
flags w.r.t the new RA design, and rotates are rare enough with very efficient
flag calculations such that the extra JIT overhead should be minimal to DCE the
resulting calculations later.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2024-03-31 14:47:19 -04:00

..

Crypto.cpp

OpcodeDispatcher: reassociate and sink W in sha1

2024-02-02 13:03:07 -04:00

Flags.cpp

OpcodeDispatcher: rewrite ROL/ROR

2024-03-31 14:47:19 -04:00

Vector.cpp

OpcodeDispatcher: eliminate crossblock liveness in xsave/xrstor

2024-03-29 09:57:16 -04:00

X87.cpp

FEXCore: Moves IREmitter from the public API to backend

2023-12-25 07:00:29 -08:00

X87F64.cpp

FEXCore: Moves IREmitter from the public API to backend

2023-12-25 07:00:29 -08:00