Docs: Update for release FEX-2104

.clang-format

@@ -1,109 +0,0 @@
-Language: Cpp
-BasedOnStyle: WebKit
-AccessModifierOffset: -2
-AlignAfterOpenBracket: Align
-AlignArrayOfStructures: None
-AlignConsecutiveAssignments: None
-AlignConsecutiveBitFields: Consecutive
-AlignConsecutiveDeclarations: None
-AlignConsecutiveMacros: None
-AlignEscapedNewlines: Left
-AlignOperands: Align
-AlignTrailingComments: true
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortCaseLabelsOnASingleLine: true
-AllowShortEnumsOnASingleLine: true
-AllowShortFunctionsOnASingleLine: Empty
-AllowShortIfStatementsOnASingleLine: WithoutElse
-AllowShortLambdasOnASingleLine: Inline
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: true
-AttributeMacros:
-  - JEMALLOC_NOTHROW
-  - FEX_ALIGNED
-  - FEX_ANNOTATE
-  - FEX_DEFAULT_VISIBILITY
-  - FEX_NAKED
-  - FEX_PACKED
-  - FEXCORE_PRESERVE_ALL_ATTR
-  - GLIBC_ALIAS_FUNCTION
-BinPackArguments: true
-BinPackParameters: true
-BitFieldColonSpacing: Both
-BreakAfterAttributes: Leave
-BreakBeforeBraces: Attach
-BreakBeforeBinaryOperators: None
-BreakBeforeInlineASMColon: OnlyMultiline # clang 16 required
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializers: BeforeComma
-BreakInheritanceList: BeforeColon
-ColumnLimit: 140
-CompactNamespaces: false
-ConstructorInitializerIndentWidth: 2
-ContinuationIndentWidth: 2
-Cpp11BracedListStyle: true
-DerivePointerAlignment: false
-EmptyLineAfterAccessModifier: Leave
-EmptyLineBeforeAccessModifier: Leave
-ExperimentalAutoDetectBinPacking: false
-FixNamespaceComments: true
-IncludeBlocks: Preserve
-IndentAccessModifiers: false
-IndentCaseBlocks: false
-IndentCaseLabels: false
-IndentExternBlock: AfterExternBlock
-IndentGotoLabels: false
-IndentPPDirectives: None
-IndentRequires: false
-IndentWidth: 2
-InsertBraces: true
-KeepEmptyLinesAtTheStartOfBlocks: true
-LambdaBodyIndentation: Signature
-LineEnding: LF # clang 16 required
-MaxEmptyLinesToKeep: 2
-NamespaceIndentation: Inner
-QualifierAlignment: Left
-PackConstructorInitializers: Never
-PenaltyBreakAssignment: 2
-PenaltyBreakBeforeFirstCallParameter: 2
-PenaltyBreakOpenParenthesis: 2
-PenaltyBreakString: 10
-PenaltyBreakTemplateDeclaration: 8
-PenaltyExcessCharacter: 2
-PenaltyReturnTypeOnItsOwnLine: 16
-PointerAlignment: Left
-RemoveBracesLLVM: false
-ReferenceAlignment: Left
-ReflowComments: true
-RequiresClausePosition: WithPreceding
-SeparateDefinitionBlocks: Leave
-SortIncludes: Never
-SpaceAfterCStyleCast: false
-SpaceAfterLogicalNot: false
-SpaceAfterTemplateKeyword: false
-SpaceAroundPointerQualifiers: Default
-SpaceBeforeAssignmentOperators: true
-SpaceBeforeCaseColon: false
-SpaceBeforeCpp11BracedList: true
-SpaceBeforeInheritanceColon: true
-SpaceBeforeParens: Custom
-SpaceBeforeParensOptions:
-  AfterControlStatements: true
-  AfterFunctionDeclarationName: false
-  AfterFunctionDefinitionName: false
-  AfterOverloadedOperator: false
-  AfterRequiresInClause: true
-  BeforeNonEmptyParentheses: false
-SpaceBeforeRangeBasedForLoopColon: true
-SpaceBeforeSquareBrackets: false
-SpaceInEmptyBlock: false
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: Leave
-SpacesInCStyleCastParentheses: false
-SpacesInConditionalStatement: false
-SpacesInParentheses: false
-Standard: c++20
-UseTab: Never

.clang-format-ignore

@@ -1,12 +0,0 @@
-# This file is used to ignore files and directories from clang-format
-Source/Common/cpp-optparse/*
-
-# Files with human-indented tables for readability - don't mess with these
-FEXCore/Source/Interface/Core/X86Tables/*.cpp
-
-# Inline headers with list-like content that can't be processed individually
-Source/Tools/LinuxEmulation/LinuxSyscalls/x*/SyscallsNames.inl
-Source/Tools/LinuxEmulation/LinuxSyscalls/x*/Ioctl/*.inl
-
-# Include files in unittests
-unittests/*ASM/Includes/*.inc

.git-blame-ignore-revs

@@ -1,27 +0,0 @@
-# Since version 2.23 (released in August 2019), git-blame has a feature
-# to ignore or bypass certain commits.
-#
-# This file contains a list of commits that are not likely what you
-# are looking for in a blame, such as mass reformatting or renaming.
-# You can set this file as a default ignore file for blame by running
-# the following command.
-#
-# $ git config blame.ignoreRevsFile .git-blame-ignore-revs
-
-# Whole tree reformat PR#3571
-2b4ec88daebd35fefb5bf5c73d7fc2b4155771ed
-
-# Second reformat to find fixed point PR#3577
-905aa935f5ce344a48ef4d5edab3c31efa8d793e
-
-# Reformat of CodeEmitter inl files
-8760c593ece92d7e9fa94c40da0368fd367c9cad
-
-# Whole-tree reformat with clang-format-19
-5267cde60e7642852d18f20ae8568643bb5293d5
-
-# Minor reformat with clang-format-19
-9fdd96af61c969cb5732471223f00eda64b7a069
-
-# Reformat of X86Tables.h
-ba2b0ef809f66f1a6d334f000798fa2ceafab26f

.github/ISSUE_TEMPLATE/potential-game-bug.md

@@ -1,44 +0,0 @@
----
-name: Potential Game Bug
-about: A bug in FEX-Emu that causes a problem in a game
-title: "[Game]: [Short Problem Description]"
-labels: Game related
-assignees: ''
-
----
-
-**What Game**
-The game name.
-A link to the storefront where to get the game. GOG, Steam, Itch.io, etc
-
-**Describe the bug**
-A clear and concise description of what the bug is.
-
-**To Reproduce**
-Steps to reproduce the behavior:
-1. Go to '...'
-2. Click on '....'
-3. Scroll down to '....'
-4. See error
-
-**Expected behavior**
-A clear and concise description of what you expected to happen.
-
-**Screenshots and Video**
-If applicable, add screenshots and video to help explain your problem.
-
-**System information:**
- - OS: [eg: Ubuntu 21.10]
- - CPU/SoC: [eg: Snapdragon 888, Intel Core i8-12900k]
- - Video driver version: [eg: OpenGL ES 3.2 Mesa 22.0.0-devel (git-9ff086052a)]
- - RootFS used: [eg: Ubuntu 21.10 Official Rootfs]
- - FEX version: (FEXGetConfig --version) [eg: FEX-2112-155-gc691d709]
- - Thunks Enabled: [Yes/No]
-
-**Additional context**
- - Is this an x86 or x86-64 game: [x86/x86-64/Both]
- - Does this reproduce on AArch64 with Radeon/Intel/Nvidia: [Yes/No/Untested]
- - Is this a Vulkan game: [Yes/No/Unknown]
-   - If Yes, What is your Vulkan driver:
-
-Add any other context about the problem here.

.github/workflows/ccpp.yml

@@ -13,150 +13,137 @@ env:
   BUILD_TYPE: Release
   CC: clang
   CXX: clang++
-  FEX_PORTABLE: 1
 
 jobs:
-  build_plus_test:
+  build:
     runs-on: ${{ matrix.arch }}
     strategy:
       matrix:
-        arch: [[self-hosted, ARMv8.0], [self-hosted, ARMv8.2], [self-hosted, ARMv8.4]]
+        arch: [[self-hosted, x64], [self-hosted, ARMv8.0], [self-hosted, ARMv8.2]]
       fail-fast: false
 
     steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
+    - uses: actions/checkout@v2
 
-    - name: Set runner info
-      run: |
-        echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-        echo "runner_name=$(hostname)" >> $GITHUB_ENV
+    - name: Set runner label
+      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
 
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
+    - name : submodule checkout
+      # Need to update submodules
+      run: git submodule update --init --depth 1
+
+    - name: Clean Build Environment
+      run: rm -Rf ${{runner.workspace}}/build
+
+    - name: Create Build Environment
+      # Some projects don't allow in-source building, so create a separate build directory
+      # We'll use this as our working directory for all subsequent commands
+      run: cmake -E make_directory ${{runner.workspace}}/build
 
     - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True \
-          -DENABLE_X86_HOST_DEBUG=True -DBUILD_FEX_LINUX_TESTS=True -DBUILD_THUNKS=True \
-          -DCMAKE_INSTALL_PREFIX="$PWD"/build/install
-
-    # These steps make a lot of noise but rarely fail.
-    # Put them in a separate step to make normal build logs easier to parse
-    - name: Noisy Build Targets
-      run: cmake --build build --target asm_files 32bit_asm_files JemallocLibs Catch2 vixl cephes_128bit
+      # Use a bash shell so we can use the same syntax for environment variable
+      # access regardless of the host operating system
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      # Note the current convention is to use the -S and -B options here to specify source
+      # and build directories, but this is only available with CMake 3.13 and higher.
+      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
 
     - name: Build
-      id: build
-      run: cmake --build build
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the build.  You can specify a specific target with "--target <NAME>"
+      run: cmake --build . --config $BUILD_TYPE
 
-    - name: Install
-      run: cmake --build build --target install
-
-    # GCC tests
-    - name: GCC64 Target Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: gcc_target_tests_64
-
-    - name: GCC32 Target Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: gcc_target_tests_32
-
-    # API tests
-    - name: API Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: api_tests
-
-    - name: FEXCore API Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: fexcore_apitests
-
-    # ARM emission tests
-    - name: ARM Emitter Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: emitter_tests
-
-    # Linux  tests
-    - name: FEX Linux Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: fex_linux_tests_all
-      env:
-        FEX_PORTABLE: 0
-
-    # Thunking
-    - name: Thunkgen tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: thunkgen_tests
-
-    - name: Test GL No-Thunks
-      if: ${{ steps.build.outcome == 'success' && matrix.arch[1] == 'x64' }}
-      uses: ./.github/workflows/test
-      with:
-        target: thunk_functional_tests_nothunks
-      env:
-        DISPLAY: ':0'
-
-    - name: Test GL Thunks
-      if: ${{ steps.build.outcome == 'success' && matrix.arch[1] == 'x64' }}
-      uses: ./.github/workflows/test
-      with:
-        target: thunk_functional_tests_thunks
-      env:
-        DISPLAY: ':0'
-
-    # ASM tests
     - name: ASM Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: asm_tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target asm_tests
 
-    # POSIX tests
-    - name: POSIX Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: posix_tests
-
-    # GVisor tests
-    - name: GVisor Tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: gvisor_tests
-
-    # Struct verifier tests
-    - name: Struct verifier tests
-      if: steps.build.outcome == 'success'
-      uses: ./.github/workflows/test
-      with:
-        target: struct_verifier
-
-    - name: Remove old SHM regions
+    - name: ASM Test Results move
       if: ${{ always() }}
-      run: cmake --build build --target remove_old_shm_regions
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
+
+    - name: IR Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests
+
+    - name: IR Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
+
+    - name: Posix Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the posixtest
+      run: cmake --build . --config $BUILD_TYPE --target posix_tests
+
+    - name: Posix Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_Posix.log || true
+
+    - name: gvisor tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the gvisor tests
+      run: cmake --build . --config $BUILD_TYPE --target gvisor_tests
+
+    - name: GVisor Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GVisor.log || true
+
+    - name: gcc target tests 64
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the gvisor tests
+      run: cmake --build . --config $BUILD_TYPE --target gcc_target_tests_64
+
+    - name: GCC64 Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GCC64.log || true
+
+    - name: Struct verifier tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      run: cmake --build . --config $BUILD_TYPE --target struct_verifier
+
+    - name: Struct verifier Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_StructVerifier.log || true
+
+    - name: Truncate test results
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      # Cap out the log files at 20M in case something crash spins and dumps fault text
+      # ASM tests get quite close to 10MB
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+
+    - name: Set runner name
+      if: ${{ always() }}
+      run: echo "runner_name=$(hostname)" >> $GITHUB_ENV
 
     - name: Upload results
       if: ${{ always() }}
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
+      uses: 'actions/upload-artifact@v2'
       with:
-        name: Results-${{ env.runner_name }}-${{ env.runner_label }}
-        path: results/*.log
+        name: Results-${{ env.runner_name }}
+        path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log
         retention-days: 3
+

.github/workflows/glibc_fault.yml

@@ -1,124 +0,0 @@
-name: GLIBC fault test
-# This workflow file is the same as the `Build + Test` with some key differences
-# - Runs on any x86 and ARM64 runner
-# - Disables the glibc jemalloc compile option
-# - Enables the glibc allocator fault option
-# - Disables gvisor tests to reduce stress on CI machines (tmp/shm tests overwhelm them)
-# - Disables thunk tests since they are incompatible with glibc fault allocator
-# - Disables ARMEmitter tests (We don't want to fault test vixl's disassembler)
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-  FEX_PORTABLE: 1
-
-jobs:
-  glibc_fault_test:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner info
-      run: |
-        echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-        echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-
-    - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False \
-          -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_FEX_LINUX_TESTS=True \
-          -DENABLE_GLIBC_ALLOCATOR_HOOK_FAULT=True -DENABLE_JEMALLOC_GLIBC_ALLOC=False \
-          -DCMAKE_INSTALL_PREFIX="$PWD"/build/install
-
-    # These steps make a lot of noise but rarely fail.
-    # Put them in a separate step to make normal build logs easier to parse
-    - name: Noisy Build Targets
-      run: cmake --build build --target asm_files 32bit_asm_files JemallocLibs Catch2 vixl cephes_128bit
-
-    - name: Build
-      run: cmake --build build
-
-    - name: Install
-      run: cmake --build build --target install
-
-    # GCC tests
-    - name: GCC64 Target Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: gcc_target_tests_64
-
-    - name: GCC32 Target Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: gcc_target_tests_32
-
-    # API Tests
-    - name: API Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: api_tests
-
-    - name: FEXCore API Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: fexcore_apitests
-
-    # Linux tests
-    - name: FEX Linux Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: fex_linux_tests_all
-
-    # ASM Tests
-    - name: ASM Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: asm_tests
-
-    # POSIX Tests
-    - name: POSIX Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: posix_tests
-
-    - name: Remove old SHM regions
-      if: ${{ always() }}
-      run: cmake --build build --target remove_old_shm_regions
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}-${{ env.runner_label }}
-        path: results/*.log
-        retention-days: 3
-

.github/workflows/hostrunner.yml

@@ -1,68 +0,0 @@
-name: Hostrunner tests
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-  FEX_PORTABLE: 1
-
-jobs:
-  hostrunner_tests:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, x64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner info
-      run: |
-        echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-        echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-
-    - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False \
-          -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
-
-    # These steps make a lot of noise but rarely fail.
-    # Put them in a separate step to make normal build logs easier to parse
-    - name: Noisy Build Targets
-      run: cmake --build build --target asm_files 32bit_asm_files JemallocLibs Catch2 vixl cephes_128bit
-
-    - name: Build
-      run: cmake --build build
-
-    # ASM tests
-    - name: ASM Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: asm_tests
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}-${{ env.runner_label }}
-        path: results/*.log
-        retention-days: 3
-

.github/workflows/instcountci.yml

@@ -1,78 +0,0 @@
-name: Instruction Count CI run
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-
-jobs:
-  instcountci_tests:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, x64], [self-hosted, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner info
-      run: |
-        echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-        echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-
-    - name: Set VIXL_SIM_ENABLED
-      run: |
-        case '${{ matrix.arch[1] }}' in
-          x64) _sim=True ;;
-          ARM64) _sim=False ;;
-        esac
-        echo "VIXL_SIM_ENABLED=$_sim" >> $GITHUB_ENV
-
-    - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_VIXL_SIMULATOR=$VIXL_SIM_ENABLED \
-          -DENABLE_VIXL_DISASSEMBLER=True -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
-
-    - name: Build
-      env:
-        FEX_DISABLETELEMETRY: 1
-      run: cmake --build build --target CodeSizeValidation instcountci_test_files
-
-    - name: Instruction Count Tests
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: instcountci_tests
-
-    - name: Update local repo instcount
-      if: ${{ always() }}
-      run: cmake --build build --target instcountci_update_tests
-
-    - name: Check InstCountCI diff
-      if: ${{ always() }}
-      run: git --no-pager diff --exit-code HEAD
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}-${{ env.runner_label }}
-        path: results/*.log
-        retention-days: 3

.github/workflows/mingw_build.yml

@@ -1,53 +0,0 @@
-name: Mingw build
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  BUILD_TYPE: Debug
-
-jobs:
-  mingw_build:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64, mingw], [self-hosted, ARM64EC, mingw, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Add MingGW to PATH
-      run: echo "$HOME/llvm-mingw/build/bin/" >> $GITHUB_PATH
-
-    - name: Set CC
-      run: |
-        case '${{ matrix.arch[1] }}' in
-          x64) _cpu=x86_64 ;;
-          ARM64) _cpu=aarch64 ;;
-          ARM64EC) _cpu=arm64ec ;;
-        esac
-        echo "MINGW_TRIPLE=${_cpu}-w64-mingw32" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-
-    - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/Data/CMake/toolchain_mingw.cmake \
-        -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTING=False \
-        -DCMAKE_INSTALL_PREFIX="$PWD"/build/install
-
-    - name: Build
-      run: cmake --build build

.github/workflows/pr-code-format.yml

@@ -1,63 +0,0 @@
-# Inspired by LLVM's pr-code-format.yml at
-# https://github.com/llvm/llvm-project/blob/main/.github/workflows/pr-code-format.yml
-
-name: Check code formatting
-on:
-  pull_request:
-    branches:
-      - main
-
-jobs:
-  code_formatter:
-    runs-on: [self-hosted, X64]
-    if: github.repository == 'FEX-Emu/FEX'
-
-    steps:
-      - name: Checkout
-        uses: actions/checkout@v4
-        with:
-          ref: ${{ github.event.pull_request.head.sha }}
-
-      - name: Checkout through merge base
-        uses: rmacklin/fetch-through-merge-base@v0
-        timeout-minutes: 3
-        with:
-          base_ref: ${{ github.event.pull_request.base.ref }}
-          head_ref: ${{ github.event.pull_request.head.sha }}
-          deepen_length: 500
-
-      - name: Get changed files
-        run: |
-          BASE=$(git merge-base main HEAD)
-          FILES=$(git diff --name-only "$BASE" | tr '\n' ',' | sed 's/,$//')
-          echo "CHANGED_FILES=$FILES" >> $GITHUB_ENV
-
-          echo "Changed files:"
-          echo "$FILES"
-
-      - name: Check git-clang-format-19 exists
-        run: which git-clang-format-19
-
-      - name: Setup Python env
-        uses: actions/setup-python@v4
-        with:
-          python-version: 3.11
-          cache: pip
-          cache-dependency-path: ./External/code-format-helper/requirements_formatting.txt
-
-      - name: Install python dependencies
-        run: pip install -r ./External/code-format-helper/requirements_formatting.txt
-
-      - name: Run code formatter
-        env:
-          CLANG_FORMAT_PATH: git-clang-format-19
-          GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
-          START_REV: ${{ github.event.pull_request.base.sha }}
-          END_REV: ${{ github.event.pull_request.head.sha }}
-        run: |
-          python ./External/code-format-helper/code-format-helper.py \
-            --repo "FEX-Emu/FEX" \
-            --issue-number "$GITHUB_PR_NUMBER" \
-            --start-rev "$START_REV" \
-            --end-rev "$END_REV" \
-            --changed-files "$CHANGED_FILES"

.github/workflows/setup-env/action.yml

@@ -1,33 +0,0 @@
-name: Setup Build Environment
-description: Setup RootFS and build environment
-
-inputs:
-  setup-rootfs:
-    description: 'Whether or not to set up the rootfs'
-    default: true
-
-runs:
-  using: composite
-  steps:
-    - name: Set rootfs paths
-      if: ${{ inputs.setup-rootfs == 'true' }}
-      shell: bash
-      run: |
-        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS_PATH=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-
-    - name: Update RootFS cache
-      if: ${{ inputs.setup-rootfs == 'true' }}
-      shell: bash
-      run: python3 Scripts/CI_FetchRootFS.py
-
-    - name: Checkout Submodules
-      shell: bash
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean Build Environment
-      shell: bash
-      run: rm -Rf build

.github/workflows/steamrt4.yml

@@ -1,72 +0,0 @@
-name: steamrt4 build
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  DEBIAN_FRONTEND: noninteractive
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-
-jobs:
-  steamrt4_build:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64, distrobox]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-      with:
-        setup-rootfs: false
-
-    # Setup everything required.
-    - name : distrobox setup
-      run: |
-        distrobox create -Y -i registry.gitlab.steamos.cloud/steamrt/steamrt4/sdk/arm64:4.0.20251117.183306 steamrt4 || true
-        distrobox upgrade steamrt4
-        distrobox enter --name steamrt4 -- sudo apt-get install -y \
-          git cmake ninja-build ccache \
-          lld clang \
-          libclang-dev llvm-dev \
-          libstdc++-14-dev-i386-cross libgcc-14-dev-i386-cross \
-          libstdc++-14-dev-amd64-cross libgcc-14-dev-amd64-cross
-
-    - name: Configure CMake
-      run: |
-        distrobox enter --name steamrt4 -- cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE \
-          -G Ninja -DBUILD_STEAM_SUPPORT=True -DENABLE_LTO=True -DENABLE_ASSERTIONS=False -DBUILD_THUNKS=True \
-          -DBUILD_FEXCONFIG=False -DBUILD_TESTING=False -DENABLE_CLANG_THUNKS=True -DUSE_LINKER=lld \
-          -DCMAKE_INSTALL_PREFIX=/usr
-
-    - name: Build
-      run: distrobox enter --name steamrt4 -- cmake --build build
-
-    - name: install
-      run: DESTDIR="$PWD"/install distrobox enter --name steamrt4 -- cmake --build build -t install
-
-    - name: Upload libraries
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        overwrite: true
-        name: steamrt4_steampipe_depot
-        path: ${{ github.workspace }}/install/*
-        retention-days: 60
-        compression-level: 9

.github/workflows/test/action.yml

@@ -1,21 +0,0 @@
-name: Run Test and Store Logs
-description: Run a test and store the log.
-inputs:
-  target:
-    description: 'The test target to run'
-    required: true
-
-runs:
-  using: composite
-  steps:
-    - name: Run Tests
-      shell: bash
-      run: cmake --build build --target ${{ inputs.target }}
-
-    - name: Move and Truncate Results
-      if: ${{ always() }}
-      shell: bash
-      run: |
-        mkdir -p results
-        mv build/Testing/Temporary/LastTest.log results/${{ inputs.target }}.log || true
-        truncate --size="<20M" results/${{ inputs.target }}.log || true

.github/workflows/vixl_simulator.yml

@@ -1,83 +0,0 @@
-name: Vixl Simulator run
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-  FEX_PORTABLE: 1
-
-jobs:
-  vixl_simulator:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        # Only the x86-64 runner is fast enough to run this
-        arch: [[self-hosted, x64], [self-hosted, ARMv8.4]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Set runner info
-      run: |
-        echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-        echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Setup Build Environment
-      uses: ./.github/workflows/setup-env
-
-    - name: Configure CMake
-      run: |
-        cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_VIXL_SIMULATOR=True -DENABLE_LTO=False \
-          -DENABLE_VIXL_DISASSEMBLER=True -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
-
-    # These steps make a lot of noise but rarely fail.
-    # Put them in a separate step to make normal build logs easier to parse
-    - name: Noisy Build Targets
-      run: cmake --build build --target asm_files 32bit_asm_files JemallocLibs Catch2 vixl cephes_128bit
-
-    - name: Build
-      run: cmake --build build
-
-    - name: ASM Tests - SVE256
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      with:
-        target: asm_tests
-
-    - name: ASM Tests - SVE128
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      env:
-        FEX_FORCESVEWIDTH: "128"
-      with:
-        target: asm_tests
-
-    - name: ASM Tests - ASIMD
-      if: ${{ always() }}
-      uses: ./.github/workflows/test
-      env:
-        FEX_HOSTFEATURES: "disablesve"
-      with:
-        target: asm_tests
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}-${{ env.runner_label }}
-        path: results/*.log
-        retention-days: 3

.github/workflows/wine_build/action.yml

@@ -1,35 +0,0 @@
-name: Wine DLL Build
-description: Build a wow64 or arm64ec Wine DLL
-
-inputs:
-  target:
-    description: 'The target (arm64ec or wow64)'
-    required: true
-
-runs:
-  using: composite
-  steps:
-    - name: Clean Build Environment
-      shell: bash
-      run: rm -Rf build_${{ inputs.target }}
-
-    - name: Configure CMake
-      shell: bash
-      run: |
-        case "${{ inputs.target }}" in
-          wow64) _cc=aarch64 ;;
-          arm64ec) _cc=arm64ec ;;
-        esac
-
-        cmake -S . -B build_${{ inputs.target }} -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=Data/CMake/toolchain_mingw.cmake \
-          -DMINGW_TRIPLE=${_cc}-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows -G Ninja \
-          -DENABLE_LTO=False -DENABLE_ASSERTIONS=False -DENABLE_JEMALLOC_GLIBC_ALLOC=False \
-          -DBUILD_TESTING=False -DCMAKE_INSTALL_PREFIX=/usr -DTUNE_ARCH=generic -DTUNE_CPU=none
-
-    - name: Build
-      shell: bash
-      run: cmake --build build_${{ inputs.target }}
-
-    - name: Install
-      shell: bash
-      run: DESTDIR="$PWD"/install cmake --build build_${{ inputs.target }} -t install

.github/workflows/wine_dll_artifacts.yml

@@ -1,55 +0,0 @@
-name: Wine DLL artifacts
-
-on:
-  push:
-    branches:
-      - main
-
-env:
-  BUILD_TYPE: Release
-
-jobs:
-  wine_dll_artifacts:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64, mingw]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v6
-      with:
-        fetch-depth: '0'
-        fetch-tags: 'true'
-
-    - name: Add MingGW to PATH
-      run: echo "$HOME/llvm-mingw/build/bin/" >> $GITHUB_PATH
-
-    - name: Checkout Submodules
-      # Need to update submodules
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean install directory
-      run: rm -Rf install
-
-    - name: Build (wow64)
-      uses: ./.github/workflows/wine_build
-      with:
-        target: wow64
-
-    - name: Build (arm64ec)
-      uses: ./.github/workflows/wine_build
-      with:
-        target: arm64ec
-
-    - name: Upload libraries
-      uses: actions/upload-artifact@v6
-      timeout-minutes: 1
-      with:
-        overwrite: true
-        name: wine_dll_artifacts
-        path: ${{ github.workspace }}/install/usr/lib/wine/aarch64-windows/lib*.dll
-        retention-days: 60
-        compression-level: 9

.gitignore

@@ -4,12 +4,9 @@ compile_commands.json
 vim_rc
 Config.json
 
-[Bb]uild*
+[Bb]uild*/
 [Bb]in/
 out/
 .vscode/
 .vs/
 *.pyc
-.cache
-.idea/
-CMakeLists.txt.user

.gitlab-ci.yml

@@ -1,71 +0,0 @@
-spec:
-  inputs:
-    PROMOTE_BRANCH:
-      description: "Branch to promote the build to. Empty means no promotion."
-      default: "bleeding-edge"
-
----
-
-workflow:
-  rules:
-    - when: always
-      variables:
-        PROMOTE_BRANCH: $[[ inputs.PROMOTE_BRANCH ]]
-
-variables:
-    DEBIAN_FRONTEND: noninteractive
-    GIT_SUBMODULE_STRATEGY: recursive
-    GIT_DEPTH: 0
-    CC: clang
-    CXX: clang++
-
-build:
-  stage: build
-  image: registry.gitlab.steamos.cloud/steamrt/steamrt4/sdk/arm64:4.0.20251117.183306
-  tags:
-    - docker
-    - linux
-    - arm64
-    - aarch64
-  script:
-    - apt-get -y update
-    - apt-get install -y
-        git cmake ninja-build ccache
-        lld clang
-        libclang-dev llvm-dev
-        libstdc++-14-dev-i386-cross libgcc-14-dev-i386-cross
-        libstdc++-14-dev-amd64-cross libgcc-14-dev-amd64-cross
-    - cmake -E make_directory build/
-    - cmake -DCMAKE_BUILD_TYPE=Release -G Ninja -DBUILD_STEAM_SUPPORT=True -DENABLE_LTO=True -DENABLE_ASSERTIONS=False -DBUILD_THUNKS=True -DBUILD_FEXCONFIG=False -DBUILD_TESTING=False -DENABLE_CLANG_THUNKS=True -DUSE_LINKER=lld -DCMAKE_INSTALL_PREFIX=/usr -DTUNE_ARCH=armv8.2-a -DTUNE_CPU=none . -B build/
-    - cmake --build build/ --config Release
-    - DESTDIR=$(pwd)/install/ cmake --build build/ --config Release -t install
-
-  artifacts:
-    name: "steamrt artifacts"
-    untracked: false
-    paths:
-      - install/
-
-promote:
-  stage: deploy
-  variables:
-    GIT_STRATEGY: none
-  image: registry.gitlab.steamos.cloud/steamrt/steamrt4/sdk/arm64:4.0.20251117.183306
-  tags:
-    - docker
-    - linux
-    - arm64
-    - aarch64
-  rules:
-    - if: '$PROMOTE_BRANCH'
-  before_script:
-    - apt-get -y update
-    - apt-get install -y tmux curl
-  script:
-    # comment out to debug: SSH in via GCP, go down the container and attach to the session (with `tmux attach -t debug`)
-#    - tmux new-session -d -s debug
-#    - while tmux has-session -t debug 2>/dev/null; do sleep 1; done
-
-    # ref controls which fex-depot code runs the pipeline, while VERSION_PARAM controls which fex branch's artifacts that pipeline downloads.
-    - >
-      curl --fail --location --request POST --form token=${FEX_DEPOT_TRIGGER_TOKEN} --form ref=master --form "variables[PROMOTE_BRANCH]=${PROMOTE_BRANCH}" --form "variables[VERSION_PARAM]=${CI_COMMIT_REF_NAME}" "${CI_API_V4_URL}/projects/fex%2Ffex-depot/trigger/pipeline"

.gitmodules

@@ -1,54 +1,32 @@
 [submodule "External/vixl"]
 	shallow = true
 	path = External/vixl
-	url = https://github.com/FEX-Emu/vixl.git
+	url = https://github.com/Sonicadvance1/vixl.git
 [submodule "External/cpp-optparse"]
-	path = Source/Common/cpp-optparse
+	path = External/cpp-optparse
 	url = https://github.com/Sonicadvance1/cpp-optparse
+[submodule "External/imgui"]
+	path = External/imgui
+	url = https://github.com/Sonicadvance1/imgui.git
+[submodule "External/json-maker"]
+	path = External/json-maker
+	url = https://github.com/Sonicadvance1/json-maker.git
+[submodule "External/tiny-json"]
+	path = External/tiny-json
+	url = https://github.com/Sonicadvance1/tiny-json.git
+[submodule "External/xbyak"]
+        shallow = true
+	path = External/xbyak
+	url = https://github.com/FEX-Emu/xbyak.git
 [submodule "External/fex-posixtest-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-posixtest-bins
 	url = https://github.com/FEX-Emu/fex-posixtest-bins.git
 [submodule "External/fex-gvisor-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gvisor-tests-bins
 	url = https://github.com/FEX-Emu/fex-gvisor-tests-bins.git
 [submodule "External/fex-gcc-target-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gcc-target-tests-bins
 	url = https://github.com/FEX-Emu/fex-gcc-target-tests-bins.git
-[submodule "External/fmt"]
-	path = External/fmt
-	url = https://github.com/fmtlib/fmt.git
-[submodule "External/drm-headers"]
-	path = External/drm-headers
-	url = https://github.com/FEX-Emu/drm-headers.git
-[submodule "External/xxhash"]
-	path = External/xxhash
-	url = https://github.com/Cyan4973/xxHash.git
-[submodule "External/Catch2"]
-	path = External/Catch2
-	url = https://github.com/catchorg/Catch2.git
-[submodule "External/Vulkan-Headers"]
-	shallow = true
-	path = External/Vulkan-Headers
-	url = https://github.com/KhronosGroup/Vulkan-Headers.git
-[submodule "External/jemalloc_glibc"]
-	path = External/jemalloc_glibc
-	url = https://github.com/FEX-Emu/jemalloc.git
-[submodule "External/tracy"]
-	path = External/tracy
-	url = https://github.com/wolfpld/tracy
-[submodule "External/range-v3"]
-	path = External/range-v3
-	url = https://github.com/ericniebler/range-v3.git
-[submodule "External/zydis"]
-	shallow = true
-	path = External/zydis
-	url = https://github.com/zyantific/zydis.git
-[submodule "External/unordered_dense"]
-	path = External/unordered_dense
-	url = https://github.com/martinus/unordered_dense.git
-[submodule "External/rpmalloc"]
-	path = External/rpmalloc
-	url = https://github.com/FEX-Emu/rpmalloc.git

CMakeLists.txt

@@ -1,183 +1,23 @@
 cmake_minimum_required(VERSION 3.14)
-project(FEX C CXX ASM)
+project(FEX)
 
-include(CheckIncludeFiles)
-check_include_files("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H)
-
-option(BUILD_FEX_LINUX_TESTS "Build FEXLinuxTests (requires x86 compiler)" FALSE)
+option(BUILD_TESTS "Build unit tests to ensure sanity" TRUE)
 option(BUILD_THUNKS "Build thunks" FALSE)
-option(BUILD_FEXCONFIG "Build FEXConfig" TRUE)
-option(ENABLE_CLANG_THUNKS "Build thunks with clang" TRUE)
-option(ENABLE_IWYU "Enable the Include What You Use sanitizer" FALSE)
+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
+option(ENABLE_IWYU "Enables include what you use program" FALSE)
 option(ENABLE_LTO "Enable LTO with compilation" TRUE)
 option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE)
-set(USE_LINKER "" CACHE STRING "Path to a custom linker program")
-option(ENABLE_UBSAN "Enable the Clang Undefined Behavior Sanitizer" FALSE)
-option(ENABLE_ASAN "Enable the Clang Address Sanitizer" FALSE)
-option(ENABLE_TSAN "Enable the Clang Thread Sanitizer" FALSE)
-option(ENABLE_COVERAGE "Enable Code Coverage" FALSE)
-option(ENABLE_ASSERTIONS "Enable debug assertions" FALSE)
-option(ENABLE_GDB_SYMBOLS "Enable GDBSymbols integration support" ${HAVE_GDB_JIT_READER_H})
-option(ENABLE_STRICT_WERROR "Enable stricter -Werror" FALSE)
-option(ENABLE_WERROR "Enable -Werror" FALSE)
-option(ENABLE_FEX_ALLOCATOR "Enable allocator for FEX" TRUE)
-option(ENABLE_JEMALLOC_GLIBC_ALLOC "Enable jemalloc glibc allocator" TRUE)
-option(ENABLE_OFFLINE_TELEMETRY "Enable FEX offline telemetry" TRUE)
-option(ENABLE_COMPILE_TIME_TRACE "Enable time trace compile option" FALSE)
-option(ENABLE_LIBCXX "Use LLVM's libc++ instead of the GNU libstdc++" FALSE)
-option(ENABLE_CCACHE "Enable ccache for build caching" TRUE)
-option(ENABLE_VIXL_SIMULATOR "Use the VIXL simulator for emulation (only useful for CI testing)" FALSE)
-option(ENABLE_VIXL_DISASSEMBLER "Enable debug disassembler output with VIXL" FALSE)
-option(ENABLE_ZYDIS "Enable x86/x86-64 guest disassembler output with Zydis" FALSE)
-option(USE_LEGACY_BINFMTMISC "Use legacy method of setting up binfmt_misc" FALSE)
-option(ENABLE_FEXCORE_PROFILER "Enable FEXCore's timeline profiling capabilities" FALSE)
-set(FEXCORE_PROFILER_BACKEND "gpuvis" CACHE STRING "Set which backend to use for FEXCore's profiler")
-set_property(CACHE FEXCORE_PROFILER_BACKEND PROPERTY STRINGS gpuvis tracy)
-option(ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT "Enables glibc memory allocation hooking with fault for CI testing")
-option(USE_PDB_DEBUGINFO "Build debug info in PDB format" FALSE)
-option(BUILD_STEAM_SUPPORT "Enable Steam integration" FALSE)
+option(ENABLE_LLD "Enable linking with LLD" FALSE)
+option(ENABLE_ASAN "Enables Clang ASAN" FALSE)
+option(ENABLE_TSAN "Enables Clang TSAN" FALSE)
+option(ENABLE_ASSERTIONS "Enables assertions in build" FALSE)
+option(ENABLE_VISUAL_DEBUGGER "Enables the visual debugger for compiling" FALSE)
+option(ENABLE_STRICT_WERROR "Enables stricter -Werror for CI" FALSE)
+option(ENABLE_WERROR "Enables -Werror" FALSE)
 
-set(X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686")
-set(X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64")
-set(X86_DEV_ROOTFS "/" CACHE FILEPATH "Path to the sysroot used for cross-compiling for i686 and x86_64")
-set(DATA_DIRECTORY "" CACHE PATH "Global data directory (override)")
-set(HOSTLIBS_DATA_DIRECTORY "" CACHE PATH "Global data directory (override)")
-
-if (NOT DATA_DIRECTORY)
-  set(DATA_DIRECTORY "${CMAKE_INSTALL_PREFIX}/share/fex-emu")
-endif()
-
-include(GNUInstallDirs)
-if (NOT HOSTLIBS_DATA_DIRECTORY)
-  set(HOSTLIBS_DATA_DIRECTORY "${CMAKE_INSTALL_FULL_LIBDIR}/fex-emu")
-endif()
-
-## Platform Checks ##
-# Only 64-bit Linux and Windows are supported
-
-# NB: SIZEOF_VOID_P is in bytes, not bits
-# On 32-bit systems this is set to 4
-if (NOT CMAKE_SIZEOF_VOID_P EQUAL 8)
-  message(FATAL_ERROR "Unsupported pointer size ${CMAKE_SIZEOF_VOID_P}."
-    " FEX only supports 64-bit (8-byte pointer) systems."
-    " If you believe this is in error, file an issue.")
-elseif (NOT (WIN32 OR CMAKE_SYSTEM_NAME STREQUAL "Linux"))
-  message(FATAL_ERROR "Unsupported system type ${CMAKE_SYSTEM_NAME}."
-    " FEX only supports Linux and Windows."
-    " If you believe this is in error, file an issue.")
-endif()
-
-## Compiler Checks ##
-# GCC and MSVC are unsupported
-if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
-  message(FATAL_ERROR "FEX doesn't support GCC! Use Clang instead.")
-elseif (MSVC)
-  message(FATAL_ERROR "FEX doesn't support MSVC! Use Clang on MinGW instead.")
-elseif (MINGW)
-  message(STATUS "Building for MinGW")
-  set(ENABLE_FEX_ALLOCATOR TRUE)
-  set(ENABLE_JEMALLOC_GLIBC_ALLOC FALSE)
-else ()
-  message(STATUS "Clang version ${CMAKE_CXX_COMPILER_VERSION}")
-  set(CLANG_MINIMUM_VERSION 13.0)
-  if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${CLANG_MINIMUM_VERSION})
-    message(FATAL_ERROR "Clang version too old for FEX. Need at least ${CLANG_MINIMUM_VERSION} but has ${CMAKE_CXX_COMPILER_VERSION}")
-  endif()
-endif()
-
-## Architecture Handling ##
-string(TOLOWER ${CMAKE_SYSTEM_PROCESSOR} processor)
-if (processor MATCHES "x86|amd64")
-  option(ENABLE_X86_HOST_DEBUG "Enables compiling on x86_64 host" FALSE)
-  if (NOT ENABLE_X86_HOST_DEBUG)
-    message(FATAL_ERROR
-      " FEX doesn't support compiling for x86-64 hosts!"
-      " This is /only/ a supported configuration for FEX CI and nothing else!")
-  else()
-    message(STATUS "x86_64 debug build")
-  endif()
-
-  set(ARCHITECTURE_x86_64 1)
-  add_compile_definitions(ARCHITECTURE_x86_64=1)
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcx16")
-elseif (processor MATCHES "^aarch64|^arm64|^armv8\.*")
-  set(ARCHITECTURE_arm64 1)
-  add_compile_definitions(ARCHITECTURE_arm64=1)
-
-  # arm64ec needs to define both arm64 and arm64ec
-  if (processor MATCHES "^arm64ec")
-    set(ARCHITECTURE_arm64ec 1)
-    add_compile_definitions(ARCHITECTURE_arm64ec=1)
-  endif()
-endif()
-
-if (NOT (ARCHITECTURE_arm64 OR ARCHITECTURE_arm64ec OR ARCHITECTURE_x86_64))
-  message(FATAL_ERROR "Unsupported processor type ${processor}."
-    " If you believe this is in error, file an issue.")
-endif()
-
-if (BUILD_STEAM_SUPPORT)
-  add_compile_definitions(FEX_STEAM_SUPPORT=1)
-endif()
-
-if (ENABLE_FEXCORE_PROFILER)
-  add_compile_definitions(ENABLE_FEXCORE_PROFILER=1)
-  string(TOUPPER "${FEXCORE_PROFILER_BACKEND}" FEXCORE_PROFILER_BACKEND)
-
-  if (FEXCORE_PROFILER_BACKEND STREQUAL "GPUVIS")
-    add_compile_definitions(FEXCORE_PROFILER_BACKEND=1)
-  elseif (FEXCORE_PROFILER_BACKEND STREQUAL "TRACY")
-    add_compile_definitions(FEXCORE_PROFILER_BACKEND=2)
-    add_compile_definitions(TRACY_ENABLE=1)
-    # Required so that Tracy will only start in the selected guest application
-    add_compile_definitions(TRACY_MANUAL_LIFETIME=1)
-    add_compile_definitions(TRACY_DELAYED_INIT=1)
-    # This interferes with FEX's signal handling
-    add_compile_definitions(TRACY_NO_CRASH_HANDLER=1)
-    # Tracy can gather call stack samples in regular intervals, but this
-    # isn't useful for us since it would usually sample opaque JIT code
-    add_compile_definitions(TRACY_NO_SAMPLING=1)
-    # This pulls in libbacktrace which allocators in global constructors (before FEX can set up its allocator hooks)
-    add_compile_definitions(TRACY_NO_CALLSTACK=1)
-    if (MINGW)
-      message(FATAL_ERROR "Tracy profiler not supported on MinGW")
-    endif()
-  else()
-    message(FATAL_ERROR "Unknown FEXCore profiler backend ${FEXCORE_PROFILER_BACKEND}")
-  endif()
-endif()
-
-if (ENABLE_JEMALLOC_GLIBC_ALLOC AND ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
-  message(FATAL_ERROR "Can't have both glibc fault allocator and jemalloc glibc allocator enabled at the same time")
-endif()
-
-if (ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
-  add_compile_definitions(GLIBC_ALLOCATOR_FAULT=1)
-endif()
-
-# uninstall target
-if(NOT TARGET uninstall)
-  configure_file(
-    "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/cmake_uninstall.cmake.in"
-    "${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/cmake_uninstall.cmake"
-    IMMEDIATE @ONLY)
-
-  add_custom_target(uninstall
-    COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/cmake_uninstall.cmake)
-endif()
-
-# These options are meant for package management
-set(TUNE_CPU "native" CACHE STRING "Override the CPU the build is tuned for")
-set(TUNE_ARCH "generic" CACHE STRING "Override the Arch the build is tuned for")
-set(OVERRIDE_VERSION "detect" CACHE STRING "Override the FEX version")
-set(OVERRIDE_HASH "detect" CACHE STRING "Override the FEX git hash")
-
-get_property(IS_MULTI_CONFIG GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG)
-if (NOT IS_MULTI_CONFIG AND NOT CMAKE_BUILD_TYPE)
-    set(CMAKE_BUILD_TYPE Release
-        CACHE STRING "Choose the type of build." FORCE)
-    message(STATUS "No build type set, defaulting to a Release build")
-endif()
+set (X86_C_COMPILER "x86_64-linux-gnu-gcc" CACHE STRING "c compiler for compiling x86 guest libs")
+set (X86_CXX_COMPILER "x86_64-linux-gnu-g++" CACHE STRING "c++ compiler for compiling x86 guest libs")
+set (DATA_DIRECTORY "${CMAKE_INSTALL_PREFIX}/share/fex-emu" CACHE PATH "global data directory")
 
 string(TOUPPER "${CMAKE_BUILD_TYPE}" CMAKE_BUILD_TYPE)
 if (CMAKE_BUILD_TYPE MATCHES "DEBUG")
@@ -186,16 +26,9 @@ endif()
 
 if (ENABLE_ASSERTIONS)
   message(STATUS "Assertions enabled")
-  add_compile_definitions(ASSERTIONS_ENABLED=1)
+  add_definitions(-DASSERTIONS_ENABLED=1)
 endif()
 
-if (ENABLE_GDB_SYMBOLS)
-  message(STATUS "GDBSymbols support enabled")
-  add_compile_definitions(GDB_SYMBOLS_ENABLED=1)
-endif()
-
-add_compile_definitions(_LARGEFILE64_SOURCE)
-
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/Bin)
@@ -205,57 +38,16 @@ cmake_policy(SET CMP0083 NEW) # Follow new PIE policy
 include(CheckPIESupported)
 check_pie_supported()
 
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION ${ENABLE_LTO})
-
-include(CheckCXXSourceCompiles)
-set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
-check_cxx_source_compiles(
-  "
-  __attribute__((preserve_all))
-  int Testy(int a, int b, int c, int d, int e, int f) {
-  return a + b + c + d + e + f;
-  }
-  int main() {
-  return Testy(0, 1, 2, 3, 4, 5);
-  }"
-  HAS_CLANG_PRESERVE_ALL)
-unset(CMAKE_REQUIRED_FLAGS)
-if (HAS_CLANG_PRESERVE_ALL)
-  if (MINGW)
-    message(STATUS "Ignoring broken clang::preserve_all support")
-    set(HAS_CLANG_PRESERVE_ALL FALSE)
-  else()
-    message(STATUS "Has clang::preserve_all")
-  endif()
-endif()
-
-if (ARCHITECTURE_arm64 AND HAS_CLANG_PRESERVE_ALL)
-  add_compile_definitions("FEX_PRESERVE_ALL_ATTR=__attribute__((preserve_all))" "FEX_HAS_PRESERVE_ALL_ATTR=1")
+if (ENABLE_LTO)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
 else()
-  add_compile_definitions("FEX_PRESERVE_ALL_ATTR=" "FEX_HAS_PRESERVE_ALL_ATTR=0")
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION FALSE)
 endif()
 
-check_cxx_source_compiles(
-  "
-  #define _GNU_SOURCE
-  #include <errno.h>
-  int main() {
-  return program_invocation_name == nullptr;
-  }"
-  HAS_PROGRAM_INVOCATION_NAME)
-add_compile_definitions("HAS_PROGRAM_INVOCATION_NAME=${HAS_PROGRAM_INVOCATION_NAME}")
-
-if (ENABLE_VIXL_SIMULATOR)
-  # We can run the simulator on both x86-64 or AArch64 hosts
-  add_compile_definitions(VIXL_SIMULATOR=1 VIXL_INCLUDE_SIMULATOR_AARCH64=1)
-endif()
-
-if (ENABLE_CCACHE)
-  find_program(CCACHE_PROGRAM ccache)
-  if(CCACHE_PROGRAM)
-    message(STATUS "CCache enabled")
-    set_property(GLOBAL PROPERTY RULE_LAUNCH_COMPILE "${CCACHE_PROGRAM}")
-  endif()
+find_program(CCACHE_PROGRAM ccache)
+if(CCACHE_PROGRAM)
+  message(STATUS "CCache enabled")
+  set_property(GLOBAL PROPERTY RULE_LAUNCH_COMPILE "${CCACHE_PROGRAM}")
 endif()
 
 if (ENABLE_XRAY)
@@ -263,46 +55,14 @@ if (ENABLE_XRAY)
   link_libraries(-fxray-instrument)
 endif()
 
-if (ENABLE_COMPILE_TIME_TRACE)
-  add_compile_options(-ftime-trace)
-  link_libraries(-ftime-trace)
-endif()
-
-set(PTHREAD_LIB pthread)
-
-if (USE_LINKER)
-  message(STATUS "Overriding linker to: ${USE_LINKER}")
-  add_link_options("-fuse-ld=${USE_LINKER}")
-endif()
-
-if (ENABLE_LIBCXX)
-  message(WARNING "This is an unsupported configuration and should only be used for testing")
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11 -stdlib=libc++")
-  set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -stdlib=libc++ -lc++abi")
-endif()
-
-if (NOT ENABLE_OFFLINE_TELEMETRY)
-  # Disable FEX offline telemetry entirely if asked
-  add_compile_definitions(FEX_DISABLE_TELEMETRY=1)
-endif()
-
-if (ENABLE_UBSAN)
-  # See https://github.com/FEX-Emu/FEX/pull/4494#issuecomment-2800608944
-  # and related discussion for the use of -fno-sanitize=alignment -fno-sanitize=function
-  # with UBSAN.
-  # alignment: we don't follow a strict alignment policy, for example IR uses packed structs
-  # that are regularly access unaligned.
-  # function: syscalls cast function pointers to void (*)(unsigned long...), causing warnings
-  # related to this access.
-  add_compile_definitions(ENABLE_UBSAN=1)
-  add_compile_options(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined)
-  link_libraries(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined)
+if (ENABLE_LLD)
+  link_libraries(-fuse-ld=lld)
 endif()
 
 if (ENABLE_ASAN)
-  add_compile_definitions(ENABLE_ASAN=1)
-  add_compile_options(-fno-omit-frame-pointer -fsanitize=address -fsanitize-address-use-after-scope)
-  link_libraries(-fno-omit-frame-pointer -fsanitize=address -fsanitize-address-use-after-scope)
+  add_definitions(-DENABLE_ASAN=1)
+  add_compile_options(-fno-omit-frame-pointer -fsanitize=address)
+  link_libraries(-fno-omit-frame-pointer -fsanitize=address)
 endif()
 
 if (ENABLE_TSAN)
@@ -310,128 +70,57 @@ if (ENABLE_TSAN)
   link_libraries(-fno-omit-frame-pointer -fsanitize=thread)
 endif()
 
-if (ENABLE_COVERAGE)
-  add_compile_options(-fprofile-instr-generate -fcoverage-mapping)
-  link_libraries(-fprofile-instr-generate -fcoverage-mapping)
-endif()
+set (CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
+set (CMAKE_LINKER_FLAGS_RELWITHDEBINFO "${CMAKE_LINKER_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
 
-if (ENABLE_JEMALLOC_GLIBC_ALLOC)
-  # The glibc jemalloc subproject which hooks the glibc allocator.
-  # Required for thunks to work.
-  # All host native libraries will use this allocator, while *most* other FEX internal allocations will use the other jemalloc allocator.
-  add_subdirectory(External/jemalloc_glibc/)
-elseif (NOT MINGW)
-  message(STATUS
-    " jemalloc glibc allocator disabled!\n"
-    " This is not a recommended configuration!\n"
-    " This will very explicitly break thunk execution!\n"
-    " Use at your own risk!")
-endif()
+set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -fomit-frame-pointer")
+set (CMAKE_LINKER_FLAGS_RELEASE "${CMAKE_LINKER_FLAGS_RELEASE} -fomit-frame-pointer")
 
-if (ENABLE_FEX_ALLOCATOR)
-  # The rpmalloc subproject that all FEXCore fextl objects allocate through.
-  add_subdirectory(External/rpmalloc/)
-elseif (NOT MINGW)
-  message (STATUS
-    " FEX allocator is disabled!\n"
-    " This is not a recommended configuration!\n"
-    " This will very explicitly break 32-bit application execution!\n"
-    " Use at your own risk!")
-endif()
-
-if (USE_PDB_DEBUGINFO)
-  add_compile_options(-g -gcodeview)
-  add_link_options(-g -Wl,--pdb=)
-endif()
-
-set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
-set(CMAKE_LINKER_FLAGS_RELWITHDEBINFO "${CMAKE_LINKER_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
-
-set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -fomit-frame-pointer")
-set(CMAKE_LINKER_FLAGS_RELEASE "${CMAKE_LINKER_FLAGS_RELEASE} -fomit-frame-pointer")
-
-## Modules ##
-list(APPEND CMAKE_MODULE_PATH ${CMAKE_SOURCE_DIR}/Data/CMake/)
-
-include(LinkerGC)
-
-## Externals ##
-
-find_package(unordered_dense QUIET CONFIG)
-if (NOT unordered_dense_FOUND)
-  add_subdirectory(External/unordered_dense)
-endif()
-
-include(CTest)
-if (BUILD_TESTING OR ENABLE_VIXL_DISASSEMBLER OR ENABLE_VIXL_SIMULATOR)
-  add_subdirectory(External/vixl/)
-endif()
-
-if (ENABLE_ZYDIS)
-  find_package(Zycore 1.5 MODULE QUIET)
-  find_package(Zydis 4.0 MODULE QUIET)
-
-  if (TARGET Zydis::Zydis AND TARGET Zycore::Zycore)
-    message(STATUS "Using system Zydis")
-  else()
-    set(ZYDIS_BUILD_TOOLS OFF CACHE BOOL "" FORCE)
-    set(ZYDIS_BUILD_EXAMPLES OFF CACHE BOOL "" FORCE)
-
-    message(STATUS "Using bundled Zydis")
-    add_subdirectory(External/zydis/)
+if (CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64")
+  option(ENABLE_X86_HOST_DEBUG "Enables compiling on x86_64 host" FALSE)
+  if (NOT ENABLE_X86_HOST_DEBUG)
+    message(FATAL_ERROR
+      " Be warned: FEX isn't optimized for x86_64 hosts!\n"
+      " Support for x86_64 hosts is only for debugging and convenience!\n"
+      " Don't expect amazing performance or optimal code generation!\n"
+      " Pass -DENABLE_X86_HOST_DEBUG=True to bypass this message!")
   endif()
+  set(_M_X86_64 1)
+  add_definitions(-D_M_X86_64=1)
+  set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcx16")
 endif()
 
-if (ENABLE_FEXCORE_PROFILER AND FEXCORE_PROFILER_BACKEND STREQUAL "TRACY")
-  add_subdirectory(External/tracy)
+if (CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
+  set(_M_ARM_64 1)
+  add_definitions(-D_M_ARM_64=1)
 endif()
 
-find_package(Python 3.9 REQUIRED COMPONENTS Interpreter)
+add_subdirectory(External/vixl/)
+include_directories(External/vixl/src/)
 
-set(BUILD_SHARED_LIBS OFF)
-
-if (NOT CMAKE_CROSSCOMPILING)
-  find_package(xxhash MODULE QUIET)
+if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
+  # This means we were attempted to get compiled with GCC
+  message(FATAL_ERROR "FEX doesn't support getting compiled with GCC!")
 endif()
 
-if (NOT TARGET xxHash::xxhash)
-  set(XXHASH_BUNDLED_MODE TRUE)
-  set(XXHASH_BUILD_XXHSUM FALSE)
-  add_subdirectory(External/xxhash/cmake_unofficial/)
-endif()
+find_package(Python 3.0 REQUIRED COMPONENTS Interpreter)
 
-add_compile_options(-Wno-trigraphs)
-add_compile_definitions(GLOBAL_DATA_DIRECTORY="${DATA_DIRECTORY}/")
+add_definitions(-Wno-trigraphs)
+add_definitions(-DGLOBAL_DATA_DIRECTORY="${DATA_DIRECTORY}/")
 
-if (BUILD_TESTING)
-  find_package(Catch2 3 QUIET)
-  if (NOT Catch2_FOUND)
-    add_subdirectory(External/Catch2/)
+add_subdirectory(External/cpp-optparse/)
+include_directories(External/cpp-optparse/)
 
-    # Pull in catch_discover_tests definition
-    list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/External/Catch2/contrib/")
-  endif()
+add_subdirectory(External/imgui/)
+include_directories(External/imgui/)
 
-  include(Catch)
-else ()
-  # Override any previously generated test list to avoid running stale test binaries
-  file(GENERATE OUTPUT CTestTestfile.cmake CONTENT "# No tests since BUILD_TESTING is disabled")
-endif()
-
-find_package(fmt QUIET)
-if (NOT fmt_FOUND)
-  # Disable fmt install
-  set(FMT_INSTALL OFF)
-  add_subdirectory(External/fmt/)
-endif()
-
-find_package(range-v3 QUIET)
-if (NOT range-v3_FOUND)
-  add_subdirectory(External/range-v3/)
-  target_compile_definitions(range-v3 INTERFACE RANGES_DISABLE_DEPRECATED_WARNINGS)
-endif()
+add_subdirectory(External/json-maker/)
+include_directories(External/json-maker/)
 
 add_subdirectory(External/tiny-json/)
+include_directories(External/tiny-json/)
+
+include_directories(External/xbyak/)
 
 include_directories(Source/)
 include_directories("${CMAKE_BINARY_DIR}/Source/")
@@ -455,9 +144,9 @@ if(ENUM_ENUM_WARNING)
   add_compile_options(-Wno-deprecated-enum-enum-conversion)
 endif()
 
-# GCC enables -Wchanges-meaning by default and treats some cases as an error
-if(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
-  add_compile_options(-Wno-error=changes-meaning)
+check_cxx_compiler_flag("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
+if(COMPILER_SUPPORTS_MARCH_NATIVE)
+  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
 endif()
 
 if(ENABLE_WERROR OR ENABLE_STRICT_WERROR)
@@ -468,233 +157,137 @@ if(ENABLE_WERROR OR ENABLE_STRICT_WERROR)
   endif()
 endif()
 
-set(FEX_TUNE_COMPILE_FLAGS)
-if (NOT TUNE_ARCH STREQUAL "generic")
-  check_cxx_compiler_flag("-march=${TUNE_ARCH}" COMPILER_SUPPORTS_ARCH_TYPE)
-  if(COMPILER_SUPPORTS_ARCH_TYPE)
-    list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=${TUNE_ARCH}")
-  else()
-    message(FATAL_ERROR "Trying to compile arch type '${TUNE_ARCH}' but the compiler doesn't support this")
-  endif()
-endif()
+if(_M_ARM_64)
+  # Due to an oversight in llvm, it declares any reasonably new Kryo CPU to only be ARMv8.0
+  # Manually detect newer CPU revisions until clang and llvm fixes their bug
+  # This script will either provide a supported CPU or 'native'
+  # Additionally -march doesn't work under AArch64+Clang, so you have to use -mcpu or -mtune
+  execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/aarch64_fit_native.py" "/proc/cpuinfo"
+    OUTPUT_VARIABLE AARCH64_CPU)
 
-if (TUNE_CPU STREQUAL "native")
-  if(ARCHITECTURE_arm64)
-    if (CMAKE_CXX_COMPILER_VERSION VERSION_GREATER_EQUAL 999999.0)
-      # Clang 12.0 fixed the -mcpu=native bug with mixed big.little implementers
-      # Clang can not currently check for native Apple M1 type in hypervisor. Currently disabled
-      check_cxx_compiler_flag("-mcpu=native" COMPILER_SUPPORTS_CPU_TYPE)
-      if(COMPILER_SUPPORTS_CPU_TYPE)
-        list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=native")
-      endif()
-    else()
-      execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/aarch64_fit_native.py" "/proc/cpuinfo" "${CMAKE_CXX_COMPILER_VERSION}"
-        OUTPUT_VARIABLE AARCH64_CPU)
+  string(STRIP ${AARCH64_CPU} AARCH64_CPU)
 
-      string(STRIP ${AARCH64_CPU} AARCH64_CPU)
-
-      execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/NeedDisabledSVE.py"
-        RESULT_VARIABLE NEEDS_SVE_DISABLED)
-      if (NEEDS_SVE_DISABLED)
-        message(STATUS "Platform has bugged SVE. Disabling")
-        set(AARCH64_CPU "cortex-a78")
-      endif()
-
-      check_cxx_compiler_flag("-mcpu=${AARCH64_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
-      if(COMPILER_SUPPORTS_CPU_TYPE)
-        list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${AARCH64_CPU}")
-      endif()
-    endif()
-  else()
-    check_cxx_compiler_flag("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
-    if(COMPILER_SUPPORTS_MARCH_NATIVE)
-      list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=native")
-    endif()
-  endif()
-elseif (NOT TUNE_CPU STREQUAL "none")
-  check_cxx_compiler_flag("-mcpu=${TUNE_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
+  check_cxx_compiler_flag("-mcpu=${AARCH64_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
   if(COMPILER_SUPPORTS_CPU_TYPE)
-    list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${TUNE_CPU}")
-  else()
-    message(FATAL_ERROR "Trying to compile cpu type '${TUNE_CPU}' but the compiler doesn't support this")
+    set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcpu=${AARCH64_CPU}")
   endif()
 endif()
 
-set(GIT_DESCRIBE_STRING "FEX-Unknown")
-
-if (OVERRIDE_VERSION STREQUAL "detect")
-  find_package(Git)
-
-  if (GIT_FOUND)
-    execute_process(
-      COMMAND ${GIT_EXECUTABLE} describe --abbrev=7
-      WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
-      OUTPUT_VARIABLE GIT_DESCRIBE_STRING
-      ERROR_QUIET
-      OUTPUT_STRIP_TRAILING_WHITESPACE)
-  endif()
-else()
-  set(GIT_DESCRIBE_STRING "${OVERRIDE_VERSION}")
-endif()
-
-set(GIT_HASH "Unknown")
-
-if (OVERRIDE_HASH STREQUAL "detect")
-  find_package(Git)
-
-  if (GIT_FOUND)
-    execute_process(
-      COMMAND ${GIT_EXECUTABLE} rev-parse HEAD
-      WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
-      OUTPUT_VARIABLE GIT_HASH
-      ERROR_QUIET
-      OUTPUT_STRIP_TRAILING_WHITESPACE)
-  endif()
-else()
-  set(GIT_HASH "${OVERRIDE_HASH}")
-endif()
-
-message(STATUS "FEX version: ${GIT_DESCRIBE_STRING}")
-message(STATUS "FEX commit: ${GIT_HASH}")
-
-# Prepends 0x to every two-character sequence in the hash,
-# OR the final character of the hash, to plumb it for C++ usage. e.g.:
-# -DOVERRIDE_HASH=123456aa => 0x12, 0x34, 0x56, 0xaa,
-# -DOVERRIDE_HASH=12345678a => 0x12, 0x34, 0x56, 0x78, 0xa,
-string(REGEX
-  REPLACE "(..|.$)" "0x\\1, "
-  GIT_HASH_ARRAY "${GIT_HASH}")
-
 if (ENABLE_IWYU)
-  find_program(IWYU_EXE
-    NAMES iwyu include-what-you-use)
+  find_program(IWYU_EXE "iwyu")
   if (IWYU_EXE)
     message(STATUS "IWYU enabled")
     set(CMAKE_CXX_INCLUDE_WHAT_YOU_USE "${IWYU_EXE}")
   endif()
 endif()
 
+if (ENABLE_CLANG_FORMAT)
+  find_program(CLANG_TIDY_EXE "clang-tidy")
+  if (NOT CLANG_TIDY_EXE)
+    message(FATAL_ERROR "Couldn't find clang-tidy")
+  endif()
+
+  set(CLANG_TIDY_FLAGS
+    "-checks=*"
+    "-fuchsia*"
+    "-bugprone-macro-parentheses"
+    "-clang-analyzer-core.*"
+    "-cppcoreguidelines-pro-type-*"
+    "-cppcoreguidelines-pro-bounds-array-to-pointer-decay"
+    "-cppcoreguidelines-pro-bounds-pointer-arithmetic"
+    "-cppcoreguidelines-avoid-c-arrays"
+    "-cppcoreguidelines-avoid-magic-numbers"
+    "-cppcoreguidelines-pro-bounds-constant-array-index"
+    "-cppcoreguidelines-no-malloc"
+    "-cppcoreguidelines-special-member-functions"
+    "-cppcoreguidelines-owning-memory"
+    "-cppcoreguidelines-macro-usage"
+    "-cppcoreguidelines-avoid-goto"
+    "-google-readability-function-size"
+    "-google-readability-namespace-comments"
+    "-google-readability-braces-around-statements"
+    "-google-build-using-namespace"
+    "-hicpp-*"
+    "-llvm-namespace-comment"
+    "-llvm-include-order" # Messes up with case sensitivity
+    "-llvmlibc-*"
+    "-misc-unused-parameters"
+    "-modernize-loop-convert"
+    "-modernize-use-auto"
+    "-modernize-avoid-c-arrays"
+    "-modernize-use-nodiscard"
+    "readability-*"
+    "-readability-function-size"
+    "-readability-implicit-bool-conversion"
+    "-readability-braces-around-statements"
+    "-readability-else-after-return"
+    "-readability-magic-numbers"
+    "-readability-named-parameter"
+    "-readability-uppercase-literal-suffix"
+    "-cert-err34-c"
+    "-cert-err58-cpp"
+    "-bugprone-exception-escape"
+    )
+  string(REPLACE ";" "," CLANG_TIDY_FLAGS "${CLANG_TIDY_FLAGS}")
+  set(CMAKE_CXX_CLANG_TIDY ${CLANG_TIDY_EXE} "${CLANG_TIDY_FLAGS}")
+endif()
+
 add_compile_options(-Wall)
 
-if (BUILD_TESTING)
+configure_file(
+  ${CMAKE_CURRENT_SOURCE_DIR}/include/Config.h.in
+  ${CMAKE_BINARY_DIR}/generated/Config.h)
+
+if (BUILD_TESTS)
+  include(CTest)
+  enable_testing()
   message(STATUS "Unit tests are enabled")
-
-  set(TEST_JOB_COUNT "" CACHE STRING "Override number of parallel jobs to use while running tests")
-  if (TEST_JOB_COUNT)
-    message(STATUS "Running tests with ${TEST_JOB_COUNT} jobs")
-  elseif(CMAKE_VERSION VERSION_LESS "3.29")
-    execute_process(COMMAND "nproc" OUTPUT_STRIP_TRAILING_WHITESPACE OUTPUT_VARIABLE TEST_JOB_COUNT)
-  endif()
-  set(TEST_JOB_FLAG "-j${TEST_JOB_COUNT}")
-endif()
-
-add_subdirectory(External/SoftFloat-3e/)
-add_subdirectory(External/cephes/)
-add_subdirectory(FEXHeaderUtils/)
-add_subdirectory(CodeEmitter/)
-add_subdirectory(FEXCore/)
-
-if (ARCHITECTURE_arm64 AND NOT MINGW AND NOT BUILD_STEAM_SUPPORT)
-  # Binfmt_misc files must be installed prior to Source/ installs
-  add_subdirectory(Data/binfmts/)
 endif()
+add_subdirectory(External/FEXCore)
 
 add_subdirectory(Source/)
+add_subdirectory(Data/AppConfig/)
 
-if (NOT BUILD_STEAM_SUPPORT)
-  add_subdirectory(Data/AppConfig/)
-endif()
-
-# Install the ThunksDB file
-file(GLOB CONFIG_SOURCES CONFIGURE_DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/Data/*.json)
-
-# Any application configuration json file gets installed
-foreach(CONFIG_SRC ${CONFIG_SOURCES})
-  install(FILES ${CONFIG_SRC}
-    DESTINATION ${DATA_DIRECTORY}/
-    COMPONENT Runtime)
-endforeach()
-
-if (BUILD_TESTING)
+if (BUILD_TESTS)
   add_subdirectory(unittests/)
 endif()
 
 if (BUILD_THUNKS)
-  set(FEX_PROJECT_SOURCE_DIR ${PROJECT_SOURCE_DIR})
-  add_subdirectory(ThunkLibs/Generator)
-
-  # Thunk targets for both host libraries and IDE integration
-  add_subdirectory(ThunkLibs/HostLibs)
-
-  # Thunk targets for IDE integration of guest code, only
-  add_subdirectory(ThunkLibs/GuestLibs)
-
-  # Thunk targets for guest libraries
   include(ExternalProject)
+
+  ExternalProject_Add(host-libs
+    PREFIX host-libs
+    SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/ThunkLibs/HostLibs"
+    BINARY_DIR "Host"
+    CMAKE_ARGS "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
+    INSTALL_COMMAND ""
+    BUILD_ALWAYS ON
+  )
+
+  install(
+    CODE "MESSAGE(\"-- Installing: host-libs\")"
+    CODE "
+    EXECUTE_PROCESS(COMMAND ${CMAKE_COMMAND} --build . --target ThunkHostsInstall
+    WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Host
+    )"
+    DEPENDS host-libs
+  )
+
   ExternalProject_Add(guest-libs
     PREFIX guest-libs
     SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/ThunkLibs/GuestLibs"
     BINARY_DIR "Guest"
-    CMAKE_ARGS
-      "-DBITNESS=64"
-      "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}"
-      "-DBUILD_FEX_LINUX_TESTS=${BUILD_FEX_LINUX_TESTS}"
-      "-DENABLE_CLANG_THUNKS=${ENABLE_CLANG_THUNKS}"
-      "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_64_TOOLCHAIN_FILE}"
-      "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
-      "-DFEX_PROJECT_SOURCE_DIR=${FEX_PROJECT_SOURCE_DIR}"
-      "-DGENERATOR_EXE=$<TARGET_FILE:thunkgen>"
-      "-DX86_DEV_ROOTFS=${X86_DEV_ROOTFS}"
+    CMAKE_ARGS "-DX86_C_COMPILER:STRING=${X86_C_COMPILER}" "-DX86_CXX_COMPILER:STRING=${X86_CXX_COMPILER}" "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
     INSTALL_COMMAND ""
     BUILD_ALWAYS ON
-    DEPENDS thunkgen)
-
-  ExternalProject_Add(guest-libs-32
-    PREFIX guest-libs-32
-    SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/ThunkLibs/GuestLibs"
-    BINARY_DIR "Guest_32"
-    CMAKE_ARGS
-      "-DBITNESS=32"
-      "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}"
-      "-DBUILD_FEX_LINUX_TESTS=${BUILD_FEX_LINUX_TESTS}"
-      "-DENABLE_CLANG_THUNKS=${ENABLE_CLANG_THUNKS}"
-      "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_32_TOOLCHAIN_FILE}"
-      "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
-      "-DFEX_PROJECT_SOURCE_DIR=${FEX_PROJECT_SOURCE_DIR}"
-      "-DGENERATOR_EXE=$<TARGET_FILE:thunkgen>"
-      "-DX86_DEV_ROOTFS=${X86_DEV_ROOTFS}"
-    INSTALL_COMMAND ""
-    BUILD_ALWAYS ON
-    DEPENDS thunkgen)
+  )
 
   install(
-    CODE "message(\"-- Installing: guest-libs\")"
+    CODE "MESSAGE(\"-- Installing: guest-libs\")"
     CODE "
-      execute_process(COMMAND ${CMAKE_COMMAND} --build . --target install
-        WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Guest)"
+    EXECUTE_PROCESS(COMMAND ${CMAKE_COMMAND} --build . --target ThunkGuestsInstall
+    WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Guest
+    )"
     DEPENDS guest-libs
-    COMPONENT Runtime)
-
-  install(
-    CODE "message(\"-- Installing: guest-libs-32\")"
-    CODE "
-      execute_process(COMMAND ${CMAKE_COMMAND} --build . --target install
-        WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Guest_32)"
-    DEPENDS guest-libs-32
-    COMPONENT Runtime)
-
-  add_custom_target(uninstall_guest-libs
-    COMMAND ${CMAKE_COMMAND} "--build" "." "--target" "uninstall"
-    WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Guest)
-
-  add_custom_target(uninstall_guest-libs-32
-    COMMAND ${CMAKE_COMMAND} "--build" "." "--target" "uninstall"
-    WORKING_DIRECTORY ${CMAKE_BINARY_DIR}/Guest_32)
-
-  add_dependencies(uninstall uninstall_guest-libs)
-  add_dependencies(uninstall uninstall_guest-libs-32)
-endif()
-
-if (NOT MINGW AND BUILD_STEAM_SUPPORT)
-  add_subdirectory(Source/Steam/)
+  )
 endif()

CMakeSettings.json

@@ -129,4 +129,4 @@
 			"variables": []
 		}
 	]
-}
+}

CODE_OF_CONDUCT.md

@@ -55,7 +55,7 @@ further defined and clarified by project maintainers.
 ## Enforcement
 
 Instances of abusive, harassing, or otherwise unacceptable behavior may be
-reported by contacting the project team at team@fex-emu.com. All
+reported by contacting the project team at team@fex-emu.org. All
 complaints will be reviewed and investigated and will result in a response that
 is deemed necessary and appropriate to the circumstances. The project team is
 obligated to maintain confidentiality with regard to the reporter of an incident.

CodeEmitter/CMakeLists.txt

@@ -1,2 +0,0 @@
-add_library(CodeEmitter INTERFACE)
-target_include_directories(CodeEmitter INTERFACE .)

CodeEmitter/CodeEmitter/BranchOps.inl

@@ -1,386 +0,0 @@
-// SPDX-License-Identifier: MIT
-/* Branch instruction emitters.
- *
- * Most of these instructions will use `BackwardLabel`, `ForwardLabel`, or `BiDirectionLabel` to determine where a branch targets.
- */
-
-#pragma once
-#ifndef INCLUDED_BY_EMITTER
-#include <CodeEmitter/Emitter.h>
-namespace ARMEmitter {
-struct EmitterOps : Emitter {
-#endif
-
-public:
-  // Branches, Exception Generating and System instructions
-public:
-  // Conditional branch immediate
-  ///< Branch conditional
-  void b(ARMEmitter::Condition Cond, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0101'010 << 25;
-    Branch_Conditional(Op, 0, 0, Cond, Imm);
-  }
-  [[nodiscard]] BranchEncodeSucceeded b(ARMEmitter::Condition Cond, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-    if (Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0101'010 << 25;
-      Branch_Conditional(Op, 0, 0, Cond, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-  [[nodiscard]] BranchEncodeSucceeded b(ARMEmitter::Condition Cond, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::BC});
-    constexpr uint32_t Op = 0b0101'010 << 25;
-    Branch_Conditional(Op, 0, 0, Cond, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded b(ARMEmitter::Condition Cond, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return b(Cond, &Label->Backward);
-    } else {
-      return b(Cond, &Label->Forward);
-    }
-  }
-
-  ///< Branch consistent conditional
-  void bc(ARMEmitter::Condition Cond, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0101'010 << 25;
-    Branch_Conditional(Op, 0, 1, Cond, Imm);
-  }
-  [[nodiscard]] BranchEncodeSucceeded bc(ARMEmitter::Condition Cond, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-    if (Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0101'010 << 25;
-      Branch_Conditional(Op, 0, 1, Cond, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded bc(ARMEmitter::Condition Cond, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::BC});
-    constexpr uint32_t Op = 0b0101'010 << 25;
-    Branch_Conditional(Op, 0, 1, Cond, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded bc(ARMEmitter::Condition Cond, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return bc(Cond, &Label->Backward);
-    } else {
-      return bc(Cond, &Label->Forward);
-    }
-  }
-
-  // Unconditional branch register
-  void br(ARMEmitter::Register rn) {
-    constexpr uint32_t Op = 0b1101011 << 25 | 0b0'000 << 21 | // opc
-                            0b1'1111 << 16 |                  // op2
-                            0b0000'00 << 10 |                 // op3
-                            0b0'0000;                         // op4
-
-    UnconditionalBranch(Op, rn);
-  }
-  void blr(ARMEmitter::Register rn) {
-    constexpr uint32_t Op = 0b1101011 << 25 | 0b0'001 << 21 | // opc
-                            0b1'1111 << 16 |                  // op2
-                            0b0000'00 << 10 |                 // op3
-                            0b0'0000;                         // op4
-
-    UnconditionalBranch(Op, rn);
-  }
-  void ret(ARMEmitter::Register rn = ARMEmitter::Reg::r30) {
-    constexpr uint32_t Op = 0b1101011 << 25 | 0b0'010 << 21 | // opc
-                            0b1'1111 << 16 |                  // op2
-                            0b0000'00 << 10 |                 // op3
-                            0b0'0000;                         // op4
-
-    UnconditionalBranch(Op, rn);
-  }
-
-  // Unconditional branch immediate
-  void b(uint32_t Imm) {
-    constexpr uint32_t Op = 0b0001'01 << 26;
-
-    UnconditionalBranch(Op, Imm);
-  }
-  [[nodiscard]] BranchEncodeSucceeded b(const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-    if (Imm >= -134217728 && Imm <= 134217724 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0001'01 << 26;
-      UnconditionalBranch(Op, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-  [[nodiscard]] BranchEncodeSucceeded b(ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::B});
-    constexpr uint32_t Op = 0b0001'01 << 26;
-
-    UnconditionalBranch(Op, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded b(BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return b(&Label->Backward);
-    } else {
-      return b(&Label->Forward);
-    }
-  }
-
-  void bl(uint32_t Imm) {
-    constexpr uint32_t Op = 0b1001'01 << 26;
-
-    UnconditionalBranch(Op, Imm);
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded bl(const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-    if (Imm >= -134217728 && Imm <= 134217724 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b1001'01 << 26;
-      UnconditionalBranch(Op, Imm >> 2);
-
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-  [[nodiscard]] BranchEncodeSucceeded bl(ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::B});
-    constexpr uint32_t Op = 0b1001'01 << 26;
-
-    UnconditionalBranch(Op, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded bl(BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return bl(&Label->Backward);
-    } else {
-      return bl(&Label->Forward);
-    }
-  }
-
-  // Compare and branch
-  void cbz(ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0011'0100 << 24;
-
-    CompareAndBranch(Op, s, rt, Imm);
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbz(ARMEmitter::Size s, ARMEmitter::Register rt, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-
-    if (Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0011'0100 << 24;
-      CompareAndBranch(Op, s, rt, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbz(ARMEmitter::Size s, ARMEmitter::Register rt, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::BC});
-
-    constexpr uint32_t Op = 0b0011'0100 << 24;
-
-    CompareAndBranch(Op, s, rt, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbz(ARMEmitter::Size s, ARMEmitter::Register rt, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return cbz(s, rt, &Label->Backward);
-    } else {
-      return cbz(s, rt, &Label->Forward);
-    }
-  }
-
-  void cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0011'0101 << 24;
-
-    CompareAndBranch(Op, s, rt, Imm);
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-
-    if (Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0011'0101 << 24;
-      CompareAndBranch(Op, s, rt, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::BC});
-
-    constexpr uint32_t Op = 0b0011'0101 << 24;
-
-    CompareAndBranch(Op, s, rt, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return cbnz(s, rt, &Label->Backward);
-    } else {
-      return cbnz(s, rt, &Label->Forward);
-    }
-  }
-
-  // Test and branch immediate
-  void tbz(ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0011'0110 << 24;
-
-    TestAndBranch(Op, rt, Bit, Imm);
-  }
-  [[nodiscard]] BranchEncodeSucceeded tbz(ARMEmitter::Register rt, uint32_t Bit, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-
-    if (Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0011'0110 << 24;
-      TestAndBranch(Op, rt, Bit, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded tbz(ARMEmitter::Register rt, uint32_t Bit, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::TEST_BRANCH});
-
-    constexpr uint32_t Op = 0b0011'0110 << 24;
-
-    TestAndBranch(Op, rt, Bit, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded tbz(ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return tbz(rt, Bit, &Label->Backward);
-    } else {
-      return tbz(rt, Bit, &Label->Forward);
-    }
-  }
-
-  void tbnz(ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
-    constexpr uint32_t Op = 0b0011'0111 << 24;
-
-    TestAndBranch(Op, rt, Bit, Imm);
-  }
-  [[nodiscard]] BranchEncodeSucceeded tbnz(ARMEmitter::Register rt, uint32_t Bit, const BackwardLabel* Label) {
-    int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
-
-    if (Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0)) {
-      constexpr uint32_t Op = 0b0011'0111 << 24;
-      TestAndBranch(Op, rt, Bit, Imm >> 2);
-      return BranchEncodeSucceeded::Success;
-    }
-
-    // Can't encode.
-    return BranchEncodeSucceeded::Failure;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded tbnz(ARMEmitter::Register rt, uint32_t Bit, ForwardLabel* Label) {
-    AddLocationToLabel(Label, ForwardLabel::Reference {.Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::InstType::TEST_BRANCH});
-    constexpr uint32_t Op = 0b0011'0111 << 24;
-
-    TestAndBranch(Op, rt, Bit, 0);
-
-    // Forward label doesn't know if it can encode until Bind.
-    return BranchEncodeSucceeded::Success;
-  }
-
-  [[nodiscard]] BranchEncodeSucceeded tbnz(ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel* Label) {
-    if (Label->Backward.Location) {
-      return tbnz(rt, Bit, &Label->Backward);
-    } else {
-      return tbnz(rt, Bit, &Label->Forward);
-    }
-  }
-
-private:
-  // Conditional branch immediate
-  void Branch_Conditional(uint32_t Op, uint32_t Op1, uint32_t Op0, ARMEmitter::Condition Cond, uint32_t Imm) {
-    uint32_t Instr = Op;
-
-    Instr |= Op1 << 24;
-    Instr |= (Imm & 0x7'FFFF) << 5;
-    Instr |= Op0 << 4;
-    Instr |= FEXCore::ToUnderlying(Cond);
-
-    dc32(Instr);
-  }
-
-  // Unconditional branch register
-  void UnconditionalBranch(uint32_t Op, ARMEmitter::Register rn) {
-    uint32_t Instr = Op;
-    Instr |= Encode_rn(rn);
-    dc32(Instr);
-  }
-
-  // Unconditional branch - immediate
-  void UnconditionalBranch(uint32_t Op, uint32_t Imm) {
-    uint32_t Instr = Op;
-    Instr |= Imm & 0x3FF'FFFF;
-    dc32(Instr);
-  }
-
-  // Compare and branch
-  void CompareAndBranch(uint32_t Op, ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
-    const uint32_t SF = s == ARMEmitter::Size::i64Bit ? (1U << 31) : 0;
-
-    uint32_t Instr = Op;
-
-    Instr |= SF;
-    Instr |= (Imm & 0x7'FFFF) << 5;
-    Instr |= Encode_rt(rt);
-    dc32(Instr);
-  }
-
-  // Test and branch - immediate
-  void TestAndBranch(uint32_t Op, ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
-    uint32_t Instr = Op;
-
-    Instr |= (Bit >> 5) << 31;
-    Instr |= (Bit & 0b1'1111) << 19;
-    Instr |= (Imm & 0x3FFF) << 5;
-    Instr |= Encode_rt(rt);
-    dc32(Instr);
-  }
-
-#ifndef INCLUDED_BY_EMITTER
-}; // struct LoadstoreEmitterOps
-} // namespace ARMEmitter
-#endif

CodeEmitter/CodeEmitter/Buffer.h

@@ -1,100 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <type_traits>
-
-namespace ARMEmitter {
-class Buffer {
-public:
-  Buffer() {
-    SetBuffer(nullptr, 0);
-  }
-
-  Buffer(uint8_t* Base, uint64_t BaseSize) {
-    SetBuffer(Base, BaseSize);
-  }
-
-  void SetBuffer(uint8_t* Base, uint64_t BaseSize) {
-    BufferBase = Base;
-    CurrentOffset = BufferBase;
-    Size = BaseSize;
-  }
-
-  template<typename T>
-  requires (std::is_trivially_copyable_v<T>)
-  void dcn(const T& Data) {
-    std::memcpy(CurrentOffset, &Data, sizeof(Data));
-    CurrentOffset += sizeof(Data);
-  }
-  void dc8(uint8_t Data) {
-    dcn(Data);
-  }
-  void dc16(uint16_t Data) {
-    dcn(Data);
-  }
-  void dc32(uint32_t Data) {
-    dcn(Data);
-  }
-  void dc64(uint64_t Data) {
-    dcn(Data);
-  }
-
-  void EmitString(const char* String) {
-    const auto StringLength = strlen(String);
-    memcpy(CurrentOffset, String, StringLength);
-    CurrentOffset += StringLength;
-  }
-
-  void Align(size_t Size = 4) {
-    // Align the buffer to provided size.
-    auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & (Size - 1);
-    if (!CurrentAlignment) {
-      return;
-    }
-    std::memset(CurrentOffset, 0, Size - CurrentAlignment);
-    CurrentOffset += Size - CurrentAlignment;
-  }
-
-  template<typename T>
-  T GetCursorAddress() const {
-    return reinterpret_cast<T>(CurrentOffset);
-  }
-
-  static void ClearICache(void* Begin, std::size_t Length) {
-    __builtin___clear_cache(static_cast<char*>(Begin), static_cast<char*>(Begin) + Length);
-  }
-
-  size_t GetCursorOffset() const {
-    return static_cast<size_t>(CurrentOffset - BufferBase);
-  }
-
-  uint8_t* GetBufferBase() const {
-    return BufferBase;
-  }
-
-  void CursorIncrement(size_t Size) {
-    CurrentOffset += Size;
-  }
-
-  void SetCursorOffset(size_t Offset) {
-    CurrentOffset = BufferBase + Offset;
-  }
-
-  uint64_t GetBufferSize() const {
-    return Size;
-  }
-
-  template<typename T>
-  size_t GetCursorOffsetFromAddress(const T* Address) const {
-    return static_cast<size_t>(reinterpret_cast<const uint8_t*>(Address) - BufferBase);
-  }
-
-protected:
-
-  uint8_t* BufferBase;
-  uint8_t* CurrentOffset;
-  uint64_t Size;
-};
-} // namespace ARMEmitter

CodeEmitter/CodeEmitter/Emitter.h

@@ -1,904 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-
-#include <FEXCore/Utils/CompilerDefs.h>
-#include <FEXCore/Utils/EnumUtils.h>
-#include <FEXCore/Utils/LogManager.h>
-#include <FEXCore/Utils/MathUtils.h>
-#include <FEXCore/fextl/vector.h>
-
-#include <FEXHeaderUtils/BitUtils.h>
-#include <CodeEmitter/Buffer.h>
-#include <CodeEmitter/Registers.h>
-
-#include <array>
-#include <bit>
-#include <cstdint>
-#include <utility>
-#include <type_traits>
-
-/*
- * Welcome to FEX-Emu's custom AArch64 emitter.
- * This was written specifically to avoid the performance cost of the vixl emitter.
- *
- * There are some specific design constraints in this design to target a couple features:
- *   - High performance
- *   - Low CPU cache performance hit
- *   - Significantly reduced code footprint
- *   - Low number of branches
- *
- * These requirements are mostly achieved by removing a bunch of developer conveniences
- * that vixl provides. The developer needs to take a lot of care to not shoot themselves in the foot.
- *
- * Misc design decisions:
- * - Registers are encoded as basic uint32_t enums.
- *   - Converting between different registers is zero-cost.
- *   - Passing around as arguments are as cheap as registers
- *     - Contrast to vixl where every register requires living on the stack.
- *   - Registers can get encoded in to instructions with a simple `BFM` instruction.
- *
- * - Instructions are very simply emitted, allowing direct inlining most of the time.
- *   - These are simple enough that multiple back-to-back instructions get optimized to 128-bit load-store operations.
- *     - Contrast to vixl where pretty much no instruction emitter gets inlined.
- *
- * - Instruction emitters are /mostly/ unsized. Most instructions take a size argument first, which gets encoded
- *   directly in to the instruction.
- *   - Contrast to vixl where the register arguments are how the instructions determine operating size.
- *   - Size argument allows FEX to use `CSEL` to select a size at runtime, instead of branching.
- *   - Some instructions are explicitly sized based on register type. Read comments in the respective `inl` files to
- *     see why.
- *     Some scalar/vector operations are an example of this.
- *
- * - Almost zero helper functions.
- *   - Primary exception to this rule is load-store operations. These will use a helper to make
- *     it easier to select the correct load-store instruction. Mostly because these are a nightmare selecting
- *     the right instruction.
- */
-namespace ARMEmitter {
-/*
- * This `Size` enum is used for most ALU operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class Size : uint32_t {
-  i32Bit = 0,
-  i64Bit,
-};
-
-// This allows us to get the `Size` enum in bits.
-[[nodiscard]]
-constexpr size_t RegSizeInBits(Size size) {
-  return size_t {32} << FEXCore::ToUnderlying(size);
-}
-
-/* This `SubRegSize` enum is used for most ASIMD operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class SubRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-  i128Bit = 0b100,
-};
-
-// This allows us to get the `SubRegSize` in bits.
-[[nodiscard]]
-constexpr size_t SubRegSizeInBits(SubRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-// Many floating point operations constrain their element sizes to the
-// main three float sizes half, single, and double precision. This just
-// combines all the checks together for brevity.
-[[nodiscard]]
-constexpr bool IsStandardFloatSize(SubRegSize size) {
-  return size == SubRegSize::i16Bit || size == SubRegSize::i32Bit || size == SubRegSize::i64Bit;
-}
-
-/* This `ScalarRegSize` enum is used for most scalar float
- * operations.
- *
- * This is specifically duplicated from `SubRegSize` to have strongly
- * typed functions.
- *
- * `ScalarRegSize` specifically doesn't have `i128Bit` because scalar operations
- * can't operate at 128-bit.
- */
-enum class ScalarRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-};
-
-// This allows us to get the `ScalarRegSize` in bits.
-[[nodiscard]]
-constexpr size_t ScalarRegSizeInBits(ScalarRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-/* This `VectorRegSizePair` union allows us to have an overlapping type
- * to select a scalar operation or a vector depending on which operation
- * we pass in.
- * Useful in FEX's vector operations that behave as scalar or vector
- * depending on various factors. But since the operation will have the sa,e
- * element size, we want to choose the operation more easily
- */
-union VectorRegSizePair {
-  ScalarRegSize Scalar;
-  SubRegSize Vector;
-};
-
-// This allows us to create a `VectorRegSizePair` union.
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(SubRegSize size) {
-  return VectorRegSizePair {.Vector = size};
-}
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(ScalarRegSize size) {
-  return VectorRegSizePair {.Scalar = size};
-}
-
-// This `ShiftType` enum is used for ALU shift-register encoded instructions.
-enum class ShiftType : uint32_t {
-  LSL = 0,
-  LSR,
-  ASR,
-  ROR,
-};
-
-// This `ExtendedType` enum is used for ALU extended-register encoded instructions.
-enum class ExtendedType : uint32_t {
-  UXTB = 0b000,
-  UXTH = 0b001,
-  UXTW = 0b010,
-  UXTX = 0b011,
-  SXTB = 0b100,
-  SXTH = 0b101,
-  SXTW = 0b110,
-  SXTX = 0b111,
-  LSL_32 = UXTW,
-  LSL_64 = UXTX,
-};
-
-// This `Condition` enum is used for various conditional instructions.
-enum class Condition : uint32_t {
-  // Meaning:   Int                    - Float
-  CC_EQ = 0, // Equal                  - Equal
-  CC_NE,     // Not Eq                 - Not Eq or unordered
-  CC_CS,     // Carry set              - Greater than, equal, or unordered
-  CC_CC,     // Carry clear            - Less than
-  CC_MI,     // Minus/Negative         - Less than
-  CC_PL,     // Plus, positive or zero - GT, equal, or unordered
-  CC_VS,     // Overflow               - Unordered
-  CC_VC,     // No Overflow            - Ordered
-  CC_HI,     // Unsigned higher        - GT, or unordered
-  CC_LS,     // Unsigned lower or same - LT or EQ
-  CC_GE,     // Signed GT or EQ        - GT or EQ
-  CC_LT,     // Signed LT              - LT or Unordered
-  CC_GT,     // Signed GT              - GT
-  CC_LE,     // Signed LT or EQ        - LT, EQ, or Unordered
-  CC_AL,     // Always                 - Always
-  CC_NV,     // Always                 - Always
-
-  // Aliases
-  CC_HS = CC_CS,
-  CC_LO = CC_CC,
-};
-
-/*
- * This `StatusFlags` enum is used for conditional compare encoded instructions.
- * These directly encode to the `nzcv` flags.
- */
-enum class StatusFlags : uint32_t {
-  None = 0,
-  Flag_V = 0b0001,
-  Flag_C = 0b0010,
-  Flag_Z = 0b0100,
-  Flag_N = 0b1000,
-
-  Flag_NZCV = Flag_N | Flag_Z | Flag_C | Flag_V,
-};
-
-
-/*
- * This `IndexType` enum is used for load-store instructions.
- * Not all load-store instructions use this, so the user needs to be careful.
- */
-enum class IndexType {
-  POST,
-  OFFSET,
-  PRE,
-
-  UNPRIVILEGED,
-};
-
-// Used with adr and scalar + vector load/store variants to denote
-// a modifier operation.
-enum class SVEModType : uint8_t {
-  MOD_UXTW,
-  MOD_SXTW,
-  MOD_LSL,
-  MOD_NONE,
-};
-
-/* This `SVEMemOperand` class is used for the helper SVE load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class SVEMemOperand final {
-public:
-  enum class Type {
-    ScalarPlusScalar,
-    ScalarPlusImm,
-    ScalarPlusVector,
-    VectorPlusImm,
-  };
-
-  SVEMemOperand(XRegister rn, XRegister rm = XReg::zr)
-    : rn {rn}
-    , MemType {Type::ScalarPlusScalar}
-    , MetaType {.ScalarScalarType {
-        .rm = rm,
-      }} {}
-  SVEMemOperand(XRegister rn, int32_t imm = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusImm}
-    , MetaType {.ScalarImmType {
-        .Imm = imm,
-      }} {}
-  SVEMemOperand(XRegister rn, ZRegister zm, SVEModType mod = SVEModType::MOD_NONE, uint8_t scale = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusVector}
-    , MetaType {.ScalarVectorType {
-        .zm = zm,
-        .mod = mod,
-        .scale = scale,
-      }} {}
-  SVEMemOperand(ZRegister zn, uint32_t imm)
-    : rn {Register {zn.Idx()}}
-    , MemType {Type::VectorPlusImm}
-    , MetaType {.VectorImmType {
-        .Imm = imm,
-      }} {}
-
-  [[nodiscard]]
-  bool IsScalarPlusScalar() const {
-    return MemType == Type::ScalarPlusScalar;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusImm() const {
-    return MemType == Type::ScalarPlusImm;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusVector() const {
-    return MemType == Type::ScalarPlusVector;
-  }
-  [[nodiscard]]
-  bool IsVectorPlusImm() const {
-    return MemType == Type::VectorPlusImm;
-  }
-
-  union Data {
-    struct {
-      Register rm;
-    } ScalarScalarType;
-
-    struct {
-      int32_t Imm;
-    } ScalarImmType;
-
-    struct {
-      ZRegister zm;
-      SVEModType mod;
-      uint8_t scale;
-    } ScalarVectorType;
-
-    struct {
-      // rn will be a ZRegister
-      uint32_t Imm;
-    } VectorImmType;
-  };
-
-  Register rn;
-  Type MemType;
-  Data MetaType;
-};
-
-/* This `ExtendedMemOperand` class is used for the helper load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class ExtendedMemOperand final {
-public:
-  ExtendedMemOperand(XRegister rn, XRegister rm = XReg::zr, ExtendedType Option = ExtendedType::LSL_64, uint32_t Shift = 0)
-    : rn {rn}
-    , MetaType {.Extended {
-        .Header = {.MemType = TYPE_EXTENDED},
-        .rm = rm,
-        .Option = Option,
-        .Shift = Shift,
-      }} {}
-  ExtendedMemOperand(XRegister rn, IndexType Index = IndexType::OFFSET, int32_t Imm = 0)
-    : rn {rn}
-    , MetaType {.ImmType {
-        .Header = {.MemType = TYPE_IMM},
-        .Index = Index,
-        .Imm = Imm,
-      }} {}
-
-  Register rn;
-  enum Type {
-    TYPE_EXTENDED,
-    TYPE_IMM,
-  };
-  struct HeaderStruct {
-    Type MemType;
-  };
-  union {
-    HeaderStruct Header;
-    struct {
-      HeaderStruct Header;
-      Register rm;
-      ExtendedType Option;
-      uint32_t Shift;
-    } Extended;
-    struct {
-      HeaderStruct Header;
-      IndexType Index;
-      int32_t Imm;
-    } ImmType;
-  } MetaType;
-};
-
-template<uint32_t op0, uint32_t op1, uint32_t CRn, uint32_t CRm, uint32_t op2>
-inline constexpr uint32_t GenSystemReg = op0 << 19 | op1 << 16 | CRn << 12 | CRm << 8 | op2 << 5;
-
-// This `SystemRegister` enum is used for the mrs/msr instructions.
-enum class SystemRegister : uint32_t {
-  CTR_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b001>,
-  DCZID_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b111>,
-  TPIDR_EL0 = GenSystemReg<0b11, 0b011, 0b1101, 0b0000, 0b010>,
-  RNDR = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b000>,
-  RNDRRS = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b001>,
-  NZCV = GenSystemReg<0b11, 0b011, 0b0100, 0b0010, 0b000>,
-  FPCR = GenSystemReg<0b11, 0b011, 0b0100, 0b0100, 0b000>,
-  TPIDRRO_EL0 = GenSystemReg<0b11, 0b011, 0b1101, 0b0000, 0b011>,
-  CNTFRQ_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b000>,
-  CNTVCT_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b010>,
-  CNTVCTSS_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b110>,
-};
-
-template<uint32_t op1, uint32_t CRm, uint32_t op2>
-inline constexpr uint32_t GenDCReg = op1 << 16 | CRm << 8 | op2 << 5;
-
-// This `DataCacheOperation` enum is used for the dc instruction.
-enum class DataCacheOperation : uint32_t {
-  IVAC = GenDCReg<0b000, 0b0110, 0b001>,
-  ISW = GenDCReg<0b000, 0b0110, 0b010>,
-  CSW = GenDCReg<0b000, 0b1010, 0b010>,
-  CISW = GenDCReg<0b000, 0b1110, 0b010>,
-  ZVA = GenDCReg<0b011, 0b0100, 0b001>,
-  CVAC = GenDCReg<0b011, 0b1010, 0b001>,
-  CVAU = GenDCReg<0b011, 0b1011, 0b001>,
-  CIVAC = GenDCReg<0b011, 0b1110, 0b001>,
-
-  // MTE2
-  IGVAC = GenDCReg<0b000, 0b0110, 0b011>,
-  IGSW = GenDCReg<0b000, 0b0110, 0b100>,
-  IGDVAC = GenDCReg<0b000, 0b0110, 0b101>,
-  IGDSW = GenDCReg<0b000, 0b0110, 0b110>,
-  CGSW = GenDCReg<0b000, 0b1010, 0b100>,
-  CGDSW = GenDCReg<0b000, 0b1010, 0b110>,
-  CIGSW = GenDCReg<0b000, 0b1110, 0b100>,
-  CIGDSW = GenDCReg<0b000, 0b1110, 0b110>,
-
-  // MTE
-  GVA = GenDCReg<0b011, 0b0100, 0b011>,
-  GZVA = GenDCReg<0b011, 0b0100, 0b100>,
-  CGVAC = GenDCReg<0b011, 0b1010, 0b011>,
-  CGDVAC = GenDCReg<0b011, 0b1010, 0b101>,
-  CGVAP = GenDCReg<0b011, 0b1100, 0b011>,
-  CGDVAP = GenDCReg<0b011, 0b1100, 0b101>,
-  CGVADP = GenDCReg<0b011, 0b1101, 0b011>,
-  CGDVADP = GenDCReg<0b011, 0b1101, 0b101>,
-  CIGVAC = GenDCReg<0b011, 0b1110, 0b011>,
-  CIGDVAC = GenDCReg<0b011, 0b1110, 0b101>,
-
-  // DPB
-  CVAP = GenDCReg<0b011, 0b1100, 0b001>,
-
-  // DPB2
-  CVADP = GenDCReg<0b011, 0b1101, 0b001>,
-};
-
-template<uint32_t CRm, uint32_t op2>
-inline constexpr uint32_t GenHintBarrierReg = CRm << 8 | op2 << 5;
-
-// This `HintRegister` enum is used for the hint instruction.
-enum class HintRegister : uint32_t {
-  NOP = GenHintBarrierReg<0b0000, 0b000>,
-  YIELD = GenHintBarrierReg<0b0000, 0b001>,
-  WFE = GenHintBarrierReg<0b0000, 0b010>,
-  WFI = GenHintBarrierReg<0b0000, 0b011>,
-  SEV = GenHintBarrierReg<0b0000, 0b100>,
-  SEVL = GenHintBarrierReg<0b0000, 0b101>,
-  DGH = GenHintBarrierReg<0b0000, 0b110>,
-  CSDB = GenHintBarrierReg<0b0010, 0b100>,
-};
-
-// This `BarrierRegister` enum is used for the various barrier instructions.
-enum class BarrierRegister : uint32_t {
-  CLREX = GenHintBarrierReg<0b0000, 0b010>,
-  TCOMMIT = GenHintBarrierReg<0b0000, 0b011>,
-  DSB = GenHintBarrierReg<0b0000, 0b100>,
-  DMB = GenHintBarrierReg<0b0000, 0b101>,
-  ISB = GenHintBarrierReg<0b0000, 0b110>,
-  SB = GenHintBarrierReg<0b0000, 0b111>,
-};
-
-// This `BarrierScope` enum is used for the dsb/dmb instructions.
-enum class BarrierScope : uint32_t {
-  // Outer shareable
-  OSHLD = 0b0001,
-  OSHST = 0b0010,
-  OSH = 0b0011,
-  // Non shareable
-  NSHLD = 0b0101,
-  NSHST = 0b0110,
-  NSH = 0b0111,
-  // Inner shareable
-  ISHLD = 0b1001,
-  ISHST = 0b1010,
-  ISH = 0b1011,
-  // Full System visibility
-  LD = 0b1101,
-  ST = 0b1110,
-  SY = 0b1111,
-};
-
-// This `Prefetch` enum is used for prefetch instructions.
-enum class Prefetch : uint32_t {
-  // Prefetch for load
-  PLDL1KEEP = 0b00000,
-  PLDL1STRM = 0b00001,
-  PLDL2KEEP = 0b00010,
-  PLDL2STRM = 0b00011,
-  PLDL3KEEP = 0b00100,
-  PLDL3STRM = 0b00101,
-
-  // Preload instructions
-  PLIL1KEEP = 0b01000,
-  PLIL1STRM = 0b01001,
-  PLIL2KEEP = 0b01010,
-  PLIL2STRM = 0b01011,
-  PLIL3KEEP = 0b01100,
-  PLIL3STRM = 0b01101,
-
-  // Preload for store
-  PSTL1KEEP = 0b10000,
-  PSTL1STRM = 0b10001,
-  PSTL2KEEP = 0b10010,
-  PSTL2STRM = 0b10011,
-  PSTL3KEEP = 0b10100,
-  PSTL3STRM = 0b10101,
-};
-
-// This `PredicatePattern` enun is used for some SVE instructions.
-enum class PredicatePattern : uint32_t {
-  SVE_POW2 = 0b00000,
-  SVE_VL1 = 0b00001,
-  SVE_VL2 = 0b00010,
-  SVE_VL3 = 0b00011,
-  SVE_VL4 = 0b00100,
-  SVE_VL5 = 0b00101,
-  SVE_VL6 = 0b00110,
-  SVE_VL7 = 0b00111,
-  SVE_VL8 = 0b01000,
-  SVE_VL16 = 0b01001,
-  SVE_VL32 = 0b01010,
-  SVE_VL64 = 0b01011,
-  SVE_VL128 = 0b01100,
-  SVE_VL256 = 0b01101,
-  SVE_MUL4 = 0b11101,
-  SVE_MUL3 = 0b11110,
-  SVE_ALL = 0b11111,
-};
-
-// Used with SVE FP immediate arithmetic instructions
-enum class SVEFAddSubImm : uint32_t {
-  _0_5,
-  _1_0,
-};
-enum class SVEFMulImm : uint32_t {
-  _0_5,
-  _2_0,
-};
-enum class SVEFMaxMinImm : uint32_t {
-  _0_0,
-  _1_0,
-};
-
-/* This `BackwardLabel` struct is used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `below` an instruction that uses it.
- * Which means that a branch would jump backwards.
- */
-struct BackwardLabel {
-  uint8_t* Location {};
-};
-
-/* This `ForwardLabel` struct is used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `above` an instruction that uses it.
- * Which means that a branch would jump forwards.
- */
-struct ForwardLabel {
-  enum class InstType {
-    UNKNOWN,
-    ADR,
-    ADRP,
-    B,
-    BC,
-    TEST_BRANCH,
-    RELATIVE_LOAD,
-    LONG_ADDRESS_GEN,
-  };
-
-  struct Reference {
-    uint8_t* Location {};
-    InstType Type = InstType::UNKNOWN;
-  };
-
-  // The first element is stored separately to avoid allocations for simple cases
-  Reference FirstInst;
-
-  fextl::vector<Reference> Insts;
-};
-
-/* This `BiDirectionalLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is in either direction of an instruction that uses it.
- * Which means a branch could jump backwards or forwards depending on situation.
- */
-struct BiDirectionalLabel {
-  BackwardLabel Backward;
-  ForwardLabel Forward;
-};
-
-static inline void AddLocationToLabel(ForwardLabel* Label, ForwardLabel::Reference&& Location) {
-  if (Label->FirstInst.Location == nullptr) {
-    Label->FirstInst = Location;
-  } else {
-    Label->Insts.push_back(Location);
-  }
-}
-
-// Some FCMA ASIMD instructions support a rotation argument.
-enum class Rotation : uint32_t {
-  ROTATE_0 = 0b00,
-  ROTATE_90 = 0b01,
-  ROTATE_180 = 0b10,
-  ROTATE_270 = 0b11,
-};
-
-// Concept for contraining some instructions to accept only an XRegister or WRegister.
-// Particularly for operations that differ encodings depending on which one is used.
-template<typename T>
-concept IsXOrWRegister = std::is_same_v<T, XRegister> || std::is_same_v<T, WRegister>;
-
-// Concept for contraining some instructions to accept only a QRegister or DRegister.
-template<typename T>
-concept IsQOrDRegister = std::is_same_v<T, QRegister> || std::is_same_v<T, DRegister>;
-
-template<typename T>
-concept IsLabel = std::is_same_v<T, ARMEmitter::ForwardLabel> || std::is_same_v<T, ARMEmitter::BackwardLabel> ||
-                  std::is_same_v<T, ARMEmitter::BiDirectionalLabel> || std::is_same_v<T, ARMEmitter::ForwardLabel::Reference>;
-
-enum class BranchEncodeSucceeded {
-  Success,
-  Failure,
-};
-
-// Whether or not a given set of vector registers are sequential
-// in increasing order as far as the register file is concerned (modulo its size)
-//
-// For example, a set of registers like:
-//
-// v1,  v2, v3 and
-// v31, v0, v1
-//
-// would both be considered sequential sequences, and some instructions in particular
-// limit register lists to these kind of sequences.
-//
-template<typename T, typename... Args>
-constexpr bool AreVectorsSequential(T first, const Args&... args) {
-  // Ensure we always have a pair of registers to compare against.
-  static_assert(sizeof...(args) >= 1, "Number of arguments must be greater than 1");
-
-  const auto fn = [](auto& lhs, const auto& rhs) {
-    const auto result = ((lhs.Idx() + 1) % 32) == rhs.Idx();
-    lhs = rhs;
-    return result;
-  };
-
-  return (fn(first, args) && ...);
-}
-
-// Returns if the immediate can fit in to add/sub immediate instruction encodings.
-constexpr bool IsImmAddSub(uint64_t imm) {
-  constexpr uint64_t U12Mask = 0xFFF;
-  auto FitsWithin12Bits = [](uint64_t imm) {
-    return (imm & ~U12Mask) == 0;
-  };
-  // Can fit in to the instruction encoding:
-  // - if only bits [11:0] are set.
-  // - if only bits [23:12] are set.
-  return FitsWithin12Bits(imm) || (FitsWithin12Bits(imm >> 12) && (imm & U12Mask) == 0);
-}
-
-// This is an emitter that is designed around the smallest code bloat as possible.
-// Eschewing most developer convenience in order to keep code as small as possible.
-
-// Choices:
-// - Size of ops passed as an argument rather than template to let the compiler use csel instead of branching.
-// - Registers are unsized so they can be passed in a GPR and not need conversion operations
-class Emitter : public ARMEmitter::Buffer {
-public:
-  Emitter() = default;
-
-  Emitter(uint8_t* Base, uint64_t BaseSize)
-    : Buffer(Base, BaseSize) {}
-
-  // Bind a backward label to an address.
-  // Address that is bound is the current emitter location.
-  [[nodiscard]] bool Bind(BackwardLabel* Label) {
-    LOGMAN_THROW_A_FMT(Label->Location == nullptr, "Trying to bind a label twice");
-    Label->Location = GetCursorAddress<uint8_t*>();
-
-    // Always binds because it is only storing a location.
-    return true;
-  }
-
-  [[nodiscard]] bool Bind(const ForwardLabel::Reference* Label) {
-    uint8_t* CurrentAddress = GetCursorAddress<uint8_t*>();
-    // Patch up the instructions
-    switch (Label->Type) {
-    case ForwardLabel::InstType::ADR: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      if (!IsADRRange(Imm)) {
-        // Can't bind.
-        return false;
-      }
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case ForwardLabel::InstType::ADRP: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-
-      if (!(IsADRPRange(Imm) && IsADRPAligned(Imm))) {
-        // Can't bind.
-        return false;
-      }
-
-      Imm >>= 12;
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case ForwardLabel::InstType::B: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      if (!(Imm >= -134217728 && Imm <= 134217724 && ((Imm & 0b11) == 0))) {
-        // Can't bind.
-        return false;
-      }
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FF'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= Offset;
-      *Instruction = Inst;
-
-      break;
-    }
-    case ForwardLabel::InstType::TEST_BRANCH: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      if (!(Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0))) {
-        // Can't bind.
-        return false;
-      }
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-
-      break;
-    }
-    case ForwardLabel::InstType::BC:
-    case ForwardLabel::InstType::RELATIVE_LOAD: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      if (!(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0))) {
-        // Can't bind.
-        return false;
-      }
-      Imm >>= 2;
-      uint32_t InstMask = 0x7'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case ForwardLabel::InstType::LONG_ADDRESS_GEN: {
-      const auto* Instructions = reinterpret_cast<uint32_t*>(Label->Location);
-      const auto ImmInstOne = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[0]);
-      const auto ImmInstTwo = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[1]);
-      const auto ImmInstThree = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[2]);
-      const auto OriginalOffset = GetCursorOffset();
-
-      const auto InstOffset = GetCursorOffsetFromAddress(Instructions);
-      SetCursorOffset(InstOffset);
-
-      // We encoded the destination register in to the first instruction space.
-      // Read it back.
-      ARMEmitter::Register DestReg(Instructions[0]);
-
-      if (IsADRRange(ImmInstThree)) {
-        // If within ADR range from the third instruction, then we can emit NOP+NOP+ADR
-        nop();
-        nop();
-        adr(DestReg, static_cast<uint32_t>(ImmInstThree) & 0x7FFF);
-      } else if (IsADRPRange(ImmInstTwo)) {
-
-        // If within ADRP range from the first instruction, then we are /definitely/ in range for the second instruction.
-        // First check if we are in non-offset range for second instruction.
-        if (IsADRPAligned(reinterpret_cast<uint64_t>(CurrentAddress))) {
-          // We can emit nop + nop + adrp
-          nop();
-          nop();
-          adrp(DestReg, static_cast<uint32_t>(ImmInstThree >> 12) & 0x7FFF);
-        } else {
-          // Not aligned, need nop + adrp + add
-          nop();
-          adrp(DestReg, static_cast<uint32_t>(ImmInstTwo >> 12) & 0x7FFF);
-          add(ARMEmitter::Size::i64Bit, DestReg, DestReg, ImmInstTwo & 0xFFF);
-        }
-      } else {
-        // Stinky path, we need to emit a movz+movk+movk sequence.
-        movz(ARMEmitter::Size::i64Bit, DestReg, uint32_t(ImmInstOne >> 32) & 0x7FFF, 32);
-        movk(ARMEmitter::Size::i64Bit, DestReg, uint32_t(ImmInstOne >> 16) & 0xFFFF, 16);
-        movk(ARMEmitter::Size::i64Bit, DestReg, uint32_t(ImmInstOne) & 0xFFFF);
-      }
-
-      SetCursorOffset(OriginalOffset);
-      break;
-    }
-    default: LOGMAN_MSG_A_FMT("Unexpected inst type in label fixup");
-    }
-
-    return true;
-  }
-
-  // Bind a forward label to a location.
-  // This walks all the instructions in the label's vector.
-  // Then backpatching all instructions that have used the label.
-  [[nodiscard]] bool Bind(ForwardLabel* Label) {
-    bool Bound = true;
-    if (Label->FirstInst.Location) {
-      Bound &= Bind(&Label->FirstInst);
-    }
-    for (auto& Inst : Label->Insts) {
-      Bound &= Bind(&Inst);
-    }
-
-    return Bound;
-  }
-
-  // Bind a bidirectional location to a location.
-  // Binds both forwards and backwards depending on how the label was used.
-  [[nodiscard]] bool Bind(BiDirectionalLabel* Label) {
-    bool Bound = true;
-    if (!Label->Backward.Location) {
-      Bound &= Bind(&Label->Backward);
-    }
-    Bound &= Bind(&Label->Forward);
-
-    return Bound;
-  }
-
-  static constexpr Condition InvertCondition(Condition cond) {
-    // These behave as always, so it makes no sense to allow inverting these.
-    LOGMAN_THROW_A_FMT(cond != Condition::CC_AL && cond != Condition::CC_NV, "Cannot invert CC_AL or CC_NV");
-    return static_cast<Condition>(FEXCore::ToUnderlying(cond) ^ 1);
-  }
-
-#include <CodeEmitter/VixlUtils.inl>
-
-public:
-
-// This symbol is used to allow external tooling (IDEs, clang-format, ...) to process the included files individually:
-// If defined, the files will inject member functions into this class.
-// If not, the files will wrap the member functions in a class so that tooling will process them properly.
-#define INCLUDED_BY_EMITTER
-
-  // TODO: Implement SME when it matters.
-#include <CodeEmitter/ALUOps.inl>
-#include <CodeEmitter/BranchOps.inl>
-#include <CodeEmitter/LoadstoreOps.inl>
-#include <CodeEmitter/SystemOps.inl>
-#include <CodeEmitter/ScalarOps.inl>
-#include <CodeEmitter/ASIMDOps.inl>
-#include <CodeEmitter/SVEOps.inl>
-
-#undef INCLUDED_BY_EMITTER
-
-protected:
-  template<typename T>
-  uint32_t Encode_ra(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  uint32_t Encode_ra(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rt2(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  uint32_t Encode_rt2(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rm(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rm(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rs(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rs(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rn(T Reg) const {
-    return Reg.Idx() << 5;
-  }
-  uint32_t Encode_rn(uint32_t Reg) const {
-    return Reg << 5;
-  }
-  template<typename T>
-  uint32_t Encode_rd(T Reg) const {
-    return Reg.Idx();
-  }
-  uint32_t Encode_rd(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_rt(T Reg) const {
-    return Reg.Idx();
-  }
-  uint32_t Encode_rt(Prefetch Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-  uint32_t Encode_rt(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_pd(T Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-};
-} // namespace ARMEmitter

CodeEmitter/CodeEmitter/SystemOps.inl

@@ -1,194 +0,0 @@
-// SPDX-License-Identifier: MIT
-/* System instruction emitters.
- *
- * This is mostly a mashup of various instruction types.
- * Nothing follows an explicit pattern since they are mostly different.
- */
-
-#pragma once
-#ifndef INCLUDED_BY_EMITTER
-#include <CodeEmitter/Emitter.h>
-namespace ARMEmitter {
-struct EmitterOps : Emitter {
-#endif
-
-public:
-  // Reserved
-  void udf(uint32_t Imm) {
-    LOGMAN_THROW_A_FMT(Imm < 0x1'0000, "Immediate needs to be 16-bit");
-    dc32(Imm);
-  }
-
-  // System with result
-  // TODO: SYSL
-  // System Instruction
-  // TODO: AT
-  // TODO: CFP
-  // TODO: CPP
-  void dc(ARMEmitter::DataCacheOperation DCOp, ARMEmitter::Register rt) {
-    constexpr uint32_t Op = 0b1101'0101'0000'1000'0111 << 12;
-    SystemInstruction(Op, 0, FEXCore::ToUnderlying(DCOp), rt);
-  }
-  // TODO: DVP
-  // TODO: IC
-  // TODO: TLBI
-
-  // Exception generation
-  void svc(uint32_t Imm) {
-    ExceptionGeneration(0b000, 0b000, 0b01, Imm);
-  }
-  void hvc(uint32_t Imm) {
-    ExceptionGeneration(0b000, 0b000, 0b10, Imm);
-  }
-  void smc(uint32_t Imm) {
-    ExceptionGeneration(0b000, 0b000, 0b11, Imm);
-  }
-  void brk(uint32_t Imm) {
-    ExceptionGeneration(0b001, 0b000, 0b00, Imm);
-  }
-  void hlt(uint32_t Imm) {
-    ExceptionGeneration(0b010, 0b000, 0b00, Imm);
-  }
-  void tcancel(uint32_t Imm) {
-    ExceptionGeneration(0b011, 0b000, 0b00, Imm);
-  }
-  void dcps1(uint32_t Imm) {
-    ExceptionGeneration(0b101, 0b000, 0b01, Imm);
-  }
-  void dcps2(uint32_t Imm) {
-    ExceptionGeneration(0b101, 0b000, 0b10, Imm);
-  }
-  void dcps3(uint32_t Imm) {
-    ExceptionGeneration(0b101, 0b000, 0b11, Imm);
-  }
-  // System instructions with register argument
-  void wfet(ARMEmitter::Register rt) {
-    SystemInstructionWithReg(0b0000, 0b000, rt);
-  }
-  void wfit(ARMEmitter::Register rt) {
-    SystemInstructionWithReg(0b0000, 0b001, rt);
-  }
-
-  // Hints
-  void nop() {
-    Hint(ARMEmitter::HintRegister::NOP);
-  }
-  void yield() {
-    Hint(ARMEmitter::HintRegister::YIELD);
-  }
-  void wfe() {
-    Hint(ARMEmitter::HintRegister::WFE);
-  }
-  void wfi() {
-    Hint(ARMEmitter::HintRegister::WFI);
-  }
-  void sev() {
-    Hint(ARMEmitter::HintRegister::SEV);
-  }
-  void sevl() {
-    Hint(ARMEmitter::HintRegister::SEVL);
-  }
-  void dgh() {
-    Hint(ARMEmitter::HintRegister::DGH);
-  }
-  void csdb() {
-    Hint(ARMEmitter::HintRegister::CSDB);
-  }
-
-  // Barriers
-  void clrex(uint32_t imm = 15) {
-    LOGMAN_THROW_A_FMT(imm < 16, "Immediate out of range");
-    Barrier(ARMEmitter::BarrierRegister::CLREX, imm);
-  }
-  void dsb(ARMEmitter::BarrierScope Scope) {
-    Barrier(ARMEmitter::BarrierRegister::DSB, FEXCore::ToUnderlying(Scope));
-  }
-  void dmb(ARMEmitter::BarrierScope Scope) {
-    Barrier(ARMEmitter::BarrierRegister::DMB, FEXCore::ToUnderlying(Scope));
-  }
-  void isb() {
-    Barrier(ARMEmitter::BarrierRegister::ISB, FEXCore::ToUnderlying(ARMEmitter::BarrierScope::SY));
-  }
-  void sb() {
-    Barrier(ARMEmitter::BarrierRegister::SB, 0);
-  }
-  void tcommit() {
-    Barrier(ARMEmitter::BarrierRegister::TCOMMIT, 0);
-  }
-
-  // System register move
-  void msr(ARMEmitter::SystemRegister reg, ARMEmitter::Register rt) {
-    constexpr uint32_t Op = 0b1101'0101'0001 << 20;
-    SystemRegisterMove(Op, rt, reg);
-  }
-
-  void mrs(ARMEmitter::Register rd, ARMEmitter::SystemRegister reg) {
-    constexpr uint32_t Op = 0b1101'0101'0011 << 20;
-    SystemRegisterMove(Op, rd, reg);
-  }
-
-private:
-
-  // Exception Generation
-  void ExceptionGeneration(uint32_t opc, uint32_t op2, uint32_t LL, uint32_t Imm) {
-    LOGMAN_THROW_A_FMT((Imm & 0xFFFF'0000) == 0, "Imm amount too large");
-
-    uint32_t Instr = 0b1101'0100 << 24;
-
-    Instr |= opc << 21;
-    Instr |= Imm << 5;
-    Instr |= op2 << 2;
-    Instr |= LL;
-
-    dc32(Instr);
-  }
-
-  // System instructions with register argument
-  void SystemInstructionWithReg(uint32_t CRm, uint32_t op2, ARMEmitter::Register rt) {
-    uint32_t Instr = 0b1101'0101'0000'0011'0001 << 12;
-
-    Instr |= CRm << 8;
-    Instr |= op2 << 5;
-    Instr |= Encode_rt(rt);
-    dc32(Instr);
-  }
-
-  // Hints
-  void Hint(ARMEmitter::HintRegister Reg) {
-    uint32_t Instr = 0b1101'0101'0000'0011'0010'0000'0001'1111U;
-    Instr |= FEXCore::ToUnderlying(Reg);
-    dc32(Instr);
-  }
-  // Barriers
-  void Barrier(ARMEmitter::BarrierRegister Reg, uint32_t CRm) {
-    uint32_t Instr = 0b1101'0101'0000'0011'0011'0000'0001'1111U;
-    Instr |= CRm << 8;
-    Instr |= FEXCore::ToUnderlying(Reg);
-    dc32(Instr);
-  }
-
-  // System Instruction
-  void SystemInstruction(uint32_t Op, uint32_t L, uint32_t SubOp, ARMEmitter::Register rt) {
-    uint32_t Instr = Op;
-
-    Instr |= L << 21;
-    Instr |= SubOp;
-    Instr |= Encode_rt(rt);
-
-    dc32(Instr);
-  }
-
-  // System register move
-  void SystemRegisterMove(uint32_t Op, ARMEmitter::Register rt, ARMEmitter::SystemRegister reg) {
-    uint32_t Instr = Op;
-
-    Instr |= FEXCore::ToUnderlying(reg);
-    Instr |= Encode_rt(rt);
-
-    dc32(Instr);
-  }
-
-#ifndef INCLUDED_BY_EMITTER
-}; // struct LoadstoreEmitterOps
-} // namespace ARMEmitter
-#endif

CodeEmitter/CodeEmitter/VixlUtils.inl

@@ -1,299 +0,0 @@
-// Collection of utilities from vixl.
-// Following is the vixl license.
-// Copyright 2015, VIXL authors
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are met:
-//
-//   * Redistributions of source code must retain the above copyright notice,
-//     this list of conditions and the following disclaimer.
-//   * Redistributions in binary form must reproduce the above copyright notice,
-//     this list of conditions and the following disclaimer in the documentation
-//     and/or other materials provided with the distribution.
-//   * Neither the name of ARM Limited nor the names of its contributors may be
-//     used to endorse or promote products derived from this software without
-//     specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
-// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
-// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-
-// Test if a given value can be encoded in the immediate field of a logical
-// instruction.
-// If it can be encoded, the function returns true, and values pointed to by n,
-// imm_s and imm_r are updated with immediates encoded in the format required
-// by the corresponding fields in the logical instruction.
-// If it can not be encoded, the function returns false, and the values pointed
-// to by n, imm_s and imm_r are undefined.
-static bool IsImmLogical(uint64_t value, unsigned width, unsigned* n = nullptr, unsigned* imm_s = nullptr, unsigned* imm_r = nullptr) {
-  [[maybe_unused]] constexpr auto kBRegSize = 8;
-  [[maybe_unused]] constexpr auto kHRegSize = 16;
-  [[maybe_unused]] constexpr auto kSRegSize = 32;
-  [[maybe_unused]] constexpr auto kDRegSize = 64;
-
-  constexpr auto kWRegSize = 32;
-
-  LOGMAN_THROW_A_FMT((width == kBRegSize) || (width == kHRegSize) || (width == kSRegSize) || (width == kDRegSize), "Unexpected imm size");
-
-  bool negate = false;
-
-  // Logical immediates are encoded using parameters n, imm_s and imm_r using
-  // the following table:
-  //
-  //    N   imms    immr    size        S             R
-  //    1  ssssss  rrrrrr    64    UInt(ssssss)  UInt(rrrrrr)
-  //    0  0sssss  xrrrrr    32    UInt(sssss)   UInt(rrrrr)
-  //    0  10ssss  xxrrrr    16    UInt(ssss)    UInt(rrrr)
-  //    0  110sss  xxxrrr     8    UInt(sss)     UInt(rrr)
-  //    0  1110ss  xxxxrr     4    UInt(ss)      UInt(rr)
-  //    0  11110s  xxxxxr     2    UInt(s)       UInt(r)
-  // (s bits must not be all set)
-  //
-  // A pattern is constructed of size bits, where the least significant S+1 bits
-  // are set. The pattern is rotated right by R, and repeated across a 32 or
-  // 64-bit value, depending on destination register width.
-  //
-  // Put another way: the basic format of a logical immediate is a single
-  // contiguous stretch of 1 bits, repeated across the whole word at intervals
-  // given by a power of 2. To identify them quickly, we first locate the
-  // lowest stretch of 1 bits, then the next 1 bit above that; that combination
-  // is different for every logical immediate, so it gives us all the
-  // information we need to identify the only logical immediate that our input
-  // could be, and then we simply check if that's the value we actually have.
-  //
-  // (The rotation parameter does give the possibility of the stretch of 1 bits
-  // going 'round the end' of the word. To deal with that, we observe that in
-  // any situation where that happens the bitwise NOT of the value is also a
-  // valid logical immediate. So we simply invert the input whenever its low bit
-  // is set, and then we know that the rotated case can't arise.)
-
-  if (value & 1) {
-    // If the low bit is 1, negate the value, and set a flag to remember that we
-    // did (so that we can adjust the return values appropriately).
-    negate = true;
-    value = ~value;
-  }
-
-  if (width <= kWRegSize) {
-    // To handle 8/16/32-bit logical immediates, the very easiest thing is to repeat
-    // the input value to fill a 64-bit word. The correct encoding of that as a
-    // logical immediate will also be the correct encoding of the value.
-
-    // Avoid making the assumption that the most-significant 56/48/32 bits are zero by
-    // shifting the value left and duplicating it.
-    for (unsigned bits = width; bits <= kWRegSize; bits *= 2) {
-      value <<= bits;
-      uint64_t mask = (UINT64_C(1) << bits) - 1;
-      value |= ((value >> bits) & mask);
-    }
-  }
-
-  // The basic analysis idea: imagine our input word looks like this.
-  //
-  //    0011111000111110001111100011111000111110001111100011111000111110
-  //                                                          c  b    a
-  //                                                          |<--d-->|
-  //
-  // We find the lowest set bit (as an actual power-of-2 value, not its index)
-  // and call it a. Then we add a to our original number, which wipes out the
-  // bottommost stretch of set bits and replaces it with a 1 carried into the
-  // next zero bit. Then we look for the new lowest set bit, which is in
-  // position b, and subtract it, so now our number is just like the original
-  // but with the lowest stretch of set bits completely gone. Now we find the
-  // lowest set bit again, which is position c in the diagram above. Then we'll
-  // measure the distance d between bit positions a and c (using CLZ), and that
-  // tells us that the only valid logical immediate that could possibly be equal
-  // to this number is the one in which a stretch of bits running from a to just
-  // below b is replicated every d bits.
-  uint64_t a = LowestSetBit(value);
-  uint64_t value_plus_a = value + a;
-  uint64_t b = LowestSetBit(value_plus_a);
-  uint64_t value_plus_a_minus_b = value_plus_a - b;
-  uint64_t c = LowestSetBit(value_plus_a_minus_b);
-
-  int d, clz_a, out_n;
-  uint64_t mask;
-
-  if (c != 0) {
-    // The general case, in which there is more than one stretch of set bits.
-    // Compute the repeat distance d, and set up a bitmask covering the basic
-    // unit of repetition (i.e. a word with the bottom d bits set). Also, in all
-    // of these cases the N bit of the output will be zero.
-    clz_a = std::countl_zero(a);
-    int clz_c = std::countl_zero(c);
-    d = clz_a - clz_c;
-    mask = ((UINT64_C(1) << d) - 1);
-    out_n = 0;
-  } else {
-    // Handle degenerate cases.
-    //
-    // If any of those 'find lowest set bit' operations didn't find a set bit at
-    // all, then the word will have been zero thereafter, so in particular the
-    // last lowest_set_bit operation will have returned zero. So we can test for
-    // all the special case conditions in one go by seeing if c is zero.
-    if (a == 0) {
-      // The input was zero (or all 1 bits, which will come to here too after we
-      // inverted it at the start of the function), for which we just return
-      // false.
-      return false;
-    } else {
-      // Otherwise, if c was zero but a was not, then there's just one stretch
-      // of set bits in our word, meaning that we have the trivial case of
-      // d == 64 and only one 'repetition'. Set up all the same variables as in
-      // the general case above, and set the N bit in the output.
-      clz_a = std::countl_zero(a);
-      d = 64;
-      mask = ~UINT64_C(0);
-      out_n = 1;
-    }
-  }
-
-  // If the repeat period d is not a power of two, it can't be encoded.
-  if (!std::has_single_bit(uint32_t(d))) {
-    return false;
-  }
-
-  if (((b - a) & ~mask) != 0) {
-    // If the bit stretch (b - a) does not fit within the mask derived from the
-    // repeat period, then fail.
-    return false;
-  }
-
-  // The only possible option is b - a repeated every d bits. Now we're going to
-  // actually construct the valid logical immediate derived from that
-  // specification, and see if it equals our original input.
-  //
-  // To repeat a value every d bits, we multiply it by a number of the form
-  // (1 + 2^d + 2^(2d) + ...), i.e. 0x0001000100010001 or similar. These can
-  // be derived using a table lookup on CLZ(d).
-  static const uint64_t multipliers[] = {
-    0x0000000000000001UL, 0x0000000100000001UL, 0x0001000100010001UL, 0x0101010101010101UL, 0x1111111111111111UL, 0x5555555555555555UL,
-  };
-  uint64_t multiplier = multipliers[std::countl_zero(uint64_t(d)) - 57];
-  uint64_t candidate = (b - a) * multiplier;
-
-  if (value != candidate) {
-    // The candidate pattern doesn't match our input value, so fail.
-    return false;
-  }
-
-  // We have a match! This is a valid logical immediate, so now we have to
-  // construct the bits and pieces of the instruction encoding that generates
-  // it.
-
-  // Count the set bits in our basic stretch. The special case of clz(0) == -1
-  // makes the answer come out right for stretches that reach the very top of
-  // the word (e.g. numbers like 0xffffc00000000000).
-  int clz_b = (b == 0) ? -1 : std::countl_zero(b);
-  int s = clz_a - clz_b;
-
-  // Decide how many bits to rotate right by, to put the low bit of that basic
-  // stretch in position a.
-  int r;
-  if (negate) {
-    // If we inverted the input right at the start of this function, here's
-    // where we compensate: the number of set bits becomes the number of clear
-    // bits, and the rotation count is based on position b rather than position
-    // a (since b is the location of the 'lowest' 1 bit after inversion).
-    s = d - s;
-    r = (clz_b + 1) & (d - 1);
-  } else {
-    r = (clz_a + 1) & (d - 1);
-  }
-
-  // Now we're done, except for having to encode the S output in such a way that
-  // it gives both the number of set bits and the length of the repeated
-  // segment. The s field is encoded like this:
-  //
-  //     imms    size        S
-  //    ssssss    64    UInt(ssssss)
-  //    0sssss    32    UInt(sssss)
-  //    10ssss    16    UInt(ssss)
-  //    110sss     8    UInt(sss)
-  //    1110ss     4    UInt(ss)
-  //    11110s     2    UInt(s)
-  //
-  // So we 'or' (2 * -d) with our computed s to form imms.
-  if (n != nullptr) {
-    *n = out_n;
-  }
-  if (imm_s != nullptr) {
-    *imm_s = ((2 * -d) | (s - 1)) & 0x3f;
-  }
-  if (imm_r != nullptr) {
-    *imm_r = r;
-  }
-
-  return true;
-}
-
-static inline bool IsIntN(unsigned n, int64_t x) {
-  if (n == 64) {
-    return true;
-  }
-  int64_t limit = INT64_C(1) << (n - 1);
-  return (-limit <= x) && (x < limit);
-}
-
-static inline bool IsUintN(unsigned n, int64_t x) {
-  // Convert to an unsigned integer to avoid implementation-defined behavior.
-  return !(static_cast<uint64_t>(x) >> n);
-}
-
-// clang-format off
-#define INT_1_TO_32_LIST(V)                                                    \
-V(1)  V(2)  V(3)  V(4)  V(5)  V(6)  V(7)  V(8)                                 \
-V(9)  V(10) V(11) V(12) V(13) V(14) V(15) V(16)                                \
-V(17) V(18) V(19) V(20) V(21) V(22) V(23) V(24)                                \
-V(25) V(26) V(27) V(28) V(29) V(30) V(31) V(32)
-
-#define INT_33_TO_63_LIST(V)                                                   \
-V(33) V(34) V(35) V(36) V(37) V(38) V(39) V(40)                                \
-V(41) V(42) V(43) V(44) V(45) V(46) V(47) V(48)                                \
-V(49) V(50) V(51) V(52) V(53) V(54) V(55) V(56)                                \
-V(57) V(58) V(59) V(60) V(61) V(62) V(63)
-
-#define INT_1_TO_63_LIST(V) INT_1_TO_32_LIST(V) INT_33_TO_63_LIST(V)
-
-// clang-format on
-
-#define DECLARE_IS_INT_N(N)                \
-  static inline bool IsInt##N(int64_t x) { \
-    return IsIntN(N, x);                   \
-  }
-
-#define DECLARE_IS_UINT_N(N)                \
-  static inline bool IsUint##N(int64_t x) { \
-    return IsUintN(N, x);                   \
-  }
-
-INT_1_TO_63_LIST(DECLARE_IS_INT_N)
-INT_1_TO_63_LIST(DECLARE_IS_UINT_N)
-
-#undef DECLARE_IS_INT_N
-#undef DECLARE_IS_UINT_N
-
-private:
-
-// Some compilers dislike negating unsigned integers,
-// so we provide an equivalent.
-template<typename T>
-static inline T UnsignedNegate(T value) {
-  static_assert(std::is_unsigned<T>::value);
-  return ~value + 1;
-}
-
-static inline uint64_t LowestSetBit(uint64_t value) {
-  return value & UnsignedNegate(value);
-}
-
-public:

Data/AppConfig/CMakeLists.txt

@@ -4,21 +4,22 @@ file(GLOB GEN_CONFIG_SOURCES CONFIGURE_DEPENDS *.json.in)
 # Any application configuration json file gets installed
 foreach(CONFIG_SRC ${CONFIG_SOURCES})
   install(FILES ${CONFIG_SRC}
-    DESTINATION ${DATA_DIRECTORY}/AppConfig/
-    COMPONENT Runtime)
+    DESTINATION ${DATA_DIRECTORY}/AppConfig/)
 endforeach()
 
 # Any configuration file json file that needs to be generated
 # First generate then install it
 foreach(GEN_CONFIG_SRC ${GEN_CONFIG_SOURCES})
   # Get the filename only component
-  get_filename_component(CONFIG_NAME ${GEN_CONFIG_SRC} NAME_WLE)
+  get_filename_component(CONFIG_NAME ${GEN_CONFIG_SRC} NAME_WE)
 
   # Configure it
-  configure_file(${GEN_CONFIG_SRC} ${CMAKE_BINARY_DIR}/Data/AppConfig/${CONFIG_NAME})
+  configure_file(
+    ${GEN_CONFIG_SRC}
+    ${CMAKE_BINARY_DIR}/Data/AppConfig/${CONFIG_NAME}.json)
 
   # Then install the configured json
-  install(FILES ${CMAKE_BINARY_DIR}/Data/AppConfig/${CONFIG_NAME}
-    DESTINATION ${DATA_DIRECTORY}/AppConfig/
-    COMPONENT Runtime)
+  install(
+    FILES ${CMAKE_BINARY_DIR}/Data/AppConfig/${CONFIG_NAME}.json
+    DESTINATION ${DATA_DIRECTORY}/AppConfig/)
 endforeach()

Data/AppConfig/client.json

@@ -1,5 +0,0 @@
-{
-  "Config": {
-    "HideHypervisorBit": "1"
-  }
-}

Data/AppConfig/steam.json.in

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "Env": "STEAM_GAME_LAUNCH_SHELL=@CMAKE_INSTALL_PREFIX@/bin/FEXBash"
+  }
+}

Data/AppConfig/steamwebhelper.json

@@ -1,6 +0,0 @@
-{
-  "Comment": "Bypasses libGL's glX and instead sends GLX requests directly via xcb",
-  "ThunksDB": {
-    "GL": 0
-  }
-}

Data/CI/FEXLinuxTestsThunks.json

@@ -1,5 +0,0 @@
-{
-  "ThunksDB": {
-    "fex_thunk_test": 1
-  }
-}

Data/CI/GLThunks.json

@@ -1,5 +0,0 @@
-{
-  "ThunksDB": {
-    "GL": 1
-  }
-}

Data/CI/VulkanThunks.json

@@ -1,5 +0,0 @@
-{
-  "ThunksDB": {
-    "Vulkan": 1
-  }
-}

Data/CMake/FindZycore.cmake

@@ -1,23 +0,0 @@
-# SPDX-License-Identifier: MIT
-
-if (CMAKE_CROSSCOMPILING)
-    return()
-endif()
-
-include(FindPackageHandleStandardArgs)
-
-find_package(Zycore QUIET CONFIG)
-
-if (Zycore_CONSIDERED_CONFIGS)
-    find_package_handle_standard_args(Zycore CONFIG_MODE)
-else()
-    find_package(PkgConfig QUIET)
-    pkg_search_module(Zycore QUIET IMPORTED_TARGET zycore)
-    find_package_handle_standard_args(Zycore
-        REQUIRED_VARS zycore_LINK_LIBRARIES
-        VERSION_VAR zycore_VERSION)
-
-    if (TARGET PkgConfig::zycore)
-      add_library(Zycore::Zycore ALIAS PkgConfig::zycore)
-    endif()
-endif()

Data/CMake/FindZydis.cmake

@@ -1,23 +0,0 @@
-# SPDX-License-Identifier: MIT
-
-if (CMAKE_CROSSCOMPILING)
-    return()
-endif()
-
-include(FindPackageHandleStandardArgs)
-
-find_package(Zydis QUIET CONFIG)
-
-if (Zydis_CONSIDERED_CONFIGS)
-    find_package_handle_standard_args(Zydis CONFIG_MODE)
-else()
-    find_package(PkgConfig QUIET)
-    pkg_search_module(Zydis QUIET IMPORTED_TARGET zydis)
-    find_package_handle_standard_args(Zydis
-        REQUIRED_VARS zydis_LINK_LIBRARIES
-        VERSION_VAR zydis_VERSION)
-
-    if (TARGET PkgConfig::zydis)
-      add_library(Zydis::Zydis ALIAS PkgConfig::zydis)
-    endif()
-endif()

Data/CMake/Findxxhash.cmake

@@ -1,18 +0,0 @@
-# SPDX-License-Identifier: MIT
-
-include(FindPackageHandleStandardArgs)
-
-find_package(PkgConfig QUIET)
-pkg_search_module(xxhash QUIET IMPORTED_TARGET xxhash libxxhash)
-find_package_handle_standard_args(xxhash
-    REQUIRED_VARS xxhash_LINK_LIBRARIES
-    VERSION_VAR xxhash_VERSION
-)
-
-if (xxhash_FOUND AND NOT TARGET xxHash::xxhash)
-    if (TARGET PkgConfig::xxhash)
-        add_library(xxHash::xxhash ALIAS PkgConfig::xxhash)
-    else()
-        add_library(xxHash::xxhash ALIAS xxhash)
-    endif()
-endif()

Data/CMake/LinkerGC.cmake

@@ -1,15 +0,0 @@
-# SPDX-License-Identifier: MIT
-
-# This applies some common linker options that reduce code size and linking time in Release mode. Namely:
-# --gc-sections: Linktime garbage collection, discards unused sections from the final output
-# --strip-all  : Similar to running `strip`, discards the symbol table from the final output
-# --as-needed  : Only includes libraries that are actually needed in the final output.
-
-macro(LinkerGC target)
-  if (CMAKE_BUILD_TYPE MATCHES "RELEASE")
-    target_link_options(${target} PRIVATE
-      "LINKER:--gc-sections"
-      "LINKER:--strip-all"
-      "LINKER:--as-needed")
-  endif()
-endmacro()

Data/CMake/cmake_uninstall.cmake.in

@@ -1,21 +0,0 @@
-if(NOT EXISTS "@CMAKE_BINARY_DIR@/install_manifest.txt")
-  message(FATAL_ERROR "Cannot find install manifest: @CMAKE_BINARY_DIR@/install_manifest.txt")
-endif()
-
-file(READ "@CMAKE_BINARY_DIR@/install_manifest.txt" files)
-string(REGEX REPLACE "\n" ";" files "${files}")
-foreach(file ${files})
-  message(STATUS "Uninstalling $ENV{DESTDIR}${file}")
-  if(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}")
-    exec_program(
-      "@CMAKE_COMMAND@" ARGS "-E remove \"$ENV{DESTDIR}${file}\""
-      OUTPUT_VARIABLE rm_out
-      RETURN_VALUE rm_retval
-      )
-    if(NOT "${rm_retval}" STREQUAL 0)
-      message(FATAL_ERROR "Problem when removing $ENV{DESTDIR}${file}")
-    endif()
-  else(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}")
-    message(STATUS "File $ENV{DESTDIR}${file} does not exist.")
-  endif()
-endforeach()

Data/CMake/toolchain_aarch64.cmake

@@ -1,35 +0,0 @@
-# This is a reference AArch64 cross compile script
-# Pass in to cmake when building:
-# eg: cmake --toolchain ../Data/CMake/toolchain_aarch64.cmake ..
-if (NOT DEFINED ENV{SYSROOT})
-  message(FATAL_ERROR "Need to have SYSROOT environment variable set")
-endif()
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-set(CMAKE_CROSSCOMPILING TRUE)
-
-# Target triple needs to match the binutils exactly
-set(TARGET_TRIPLE aarch64-linux-gnu)
-set(CMAKE_C_COMPILER "clang")
-set(CMAKE_CXX_COMPILER "clang++")
-set(CMAKE_C_COMPILER_AR "llvm-ar")
-set(CMAKE_CXX_COMPILER_AR "llvm-ar")
-set(CMAKE_C_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_CXX_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_LINKER "ld.lld")
-
-set(CMAKE_C_COMPILER_TARGET ${TARGET_TRIPLE})
-set(CMAKE_CXX_COMPILER_TARGET ${TARGET_TRIPLE})
-
-# Set the environment variable SYSROOT to the aarch64 rootfs
-set(CMAKE_FIND_ROOT_PATH "$ENV{SYSROOT}")
-set(CMAKE_SYSROOT "$ENV{SYSROOT}")
-
-list(APPEND CMAKE_PREFIX_PATH "$ENV{SYSROOT}/usr/lib/${TARGET_TRIPLE}/cmake/")
-
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)

Data/CMake/toolchain_mingw.cmake

@@ -1,20 +0,0 @@
-set(MINGW_TRIPLE "" CACHE STRING "MinGW compiler target architecture triple")
-
-set(CMAKE_RC_COMPILER ${MINGW_TRIPLE}-windres)
-set(CMAKE_C_COMPILER ${MINGW_TRIPLE}-clang)
-set(CMAKE_CXX_COMPILER ${MINGW_TRIPLE}-clang++)
-set(CMAKE_DLLTOOL ${MINGW_TRIPLE}-dlltool)
-set(CMAKE_AR ${MINGW_TRIPLE}-ar)
-
-# Compile everything as static to avoid requiring the MinGW runtime libraries, force page aligned sections so that
-# debug symbols work correctly, and disable loop alignment to workaround an LLVM bug
-# (https://github.com/llvm/llvm-project/issues/47432)
-set(CMAKE_SHARED_LINKER_FLAGS_INIT "-static -static-libgcc -static-libstdc++ -Wl,--file-alignment=4096,/mllvm:-align-loops=1")
-set(CMAKE_EXE_LINKER_FLAGS_INIT "-static -static-libgcc -static-libstdc++ -Wl,--file-alignment=4096,/mllvm:-align-loops=1")
-set(CMAKE_C_STANDARD_LIBRARIES "" CACHE STRING "" FORCE)
-set(CMAKE_CXX_STANDARD_LIBRARIES "" CACHE STRING "" FORCE)
-set(CMAKE_STANDARD_LIBRARIES "" CACHE STRING "" FORCE)
-set(CMAKE_SYSTEM_NAME Windows)
-set(CMAKE_SYSTEM_PROCESSOR ${MINGW_TRIPLE})
-
-set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)

Data/CMake/toolchain_x86_32.cmake

@@ -1,20 +0,0 @@
-option(ENABLE_CLANG_THUNKS "Enable building thunks with clang" FALSE)
-
-set(CMAKE_SYSTEM_PROCESSOR i686)
-
-if (ENABLE_CLANG_THUNKS)
-  message(STATUS "Enabling thunk clang building. Force enabling LLD as well")
-
-  set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_C_COMPILER clang)
-  set(CMAKE_CXX_COMPILER clang++)
-  set(CLANG_FLAGS "-target i686-linux-gnu -msse2 -mfpmath=sse")
-
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${CLANG_FLAGS}")
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${CLANG_FLAGS}")
-else()
-  set(CMAKE_C_COMPILER x86_64-linux-gnu-gcc -m32)
-  set(CMAKE_CXX_COMPILER x86_64-linux-gnu-g++ -m32)
-endif()

Data/CMake/toolchain_x86_64.cmake

@@ -1,20 +0,0 @@
-option(ENABLE_CLANG_THUNKS "Enable building thunks with clang" FALSE)
-
-set(CMAKE_SYSTEM_PROCESSOR x86_64)
-
-if (ENABLE_CLANG_THUNKS)
-  message(STATUS "Enabling thunk clang building. Force enabling LLD as well")
-
-  set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
-  set(CMAKE_C_COMPILER clang)
-  set(CMAKE_CXX_COMPILER clang++)
-  set(CLANG_FLAGS "-target x86_64-linux-gnu")
-
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${CLANG_FLAGS}")
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${CLANG_FLAGS}")
-else()
-  set(CMAKE_C_COMPILER x86_64-linux-gnu-gcc)
-  set(CMAKE_CXX_COMPILER x86_64-linux-gnu-g++)
-endif()

Data/CMake/version_to_variables.cmake

@@ -1,30 +0,0 @@
-# Extracts a version from the passed in version string in the form of "<Major>.<Minor>.<Patch>".
-# If a part of the version is missing then it gets set as zero.
-# Version variables returned in:
-# ${Package}_VERSION_MAJOR
-# ${Package}_VERSION_MINOR
-# ${Package}_VERSION_PATCH
-function(version_to_variables VERSION _Package)
-  string(REPLACE "." ";" VERSION_LIST "${VERSION}")
-  list (LENGTH VERSION_LIST VERSION_LEN)
-  if (${VERSION_LEN} GREATER 0)
-    list(GET VERSION_LIST 0 VERSION_MAJOR)
-    set(${_Package}_VERSION_MAJOR ${VERSION_MAJOR} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_MAJOR 0 PARENT_SCOPE)
-  endif()
-
-  if (${VERSION_LEN} GREATER 1)
-    list(GET VERSION_LIST 1 VERSION_MINOR)
-    set(${_Package}_VERSION_MINOR ${VERSION_MINOR} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_MINOR 0 PARENT_SCOPE)
-  endif()
-
-  if (${VERSION_LEN} GREATER 2)
-    list(GET VERSION_LIST 2 VERSION_PATCH)
-    set(${_Package}_VERSION_PATCH ${VERSION_PATCH} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_PATCH 0 PARENT_SCOPE)
-  endif()
-endfunction()

Data/Dockerfile

@@ -1,31 +0,0 @@
-# --- Stage 1: Builder ---
-FROM ubuntu:22.04 as builder
-
-RUN DEBIAN_FRONTEND="noninteractive" apt-get update
-RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
-clang-13 llvm-13 nasm ninja-build pkg-config \
-libcap-dev libglfw3-dev libepoxy-dev python3-dev libsdl2-dev \
-python3 linux-headers-generic  \
-git  qtbase5-dev qtdeclarative5-dev lld
-
-RUN git clone --recurse-submodules https://github.com/FEX-Emu/FEX.git
-WORKDIR /FEX
-RUN mkdir build
-
-ARG CC=clang-13
-ARG CXX=clang++-13
-RUN cmake -DCMAKE_INSTALL_PREFIX=/usr -DCMAKE_BUILD_TYPE=Release -DUSE_LINKER=lld -DENABLE_LTO=True -DBUILD_TESTING=False -DENABLE_ASSERTIONS=False -G Ninja .
-RUN ninja
-
-WORKDIR /FEX/build
-
-# --- Stage 2: Runner ---
-FROM builder as runner
-
-RUN DEBIAN_FRONTEND="noninteractive" apt-get update
-RUN DEBIAN_FRONTEND="noninteractive" apt install -y \
-libcap-dev libglfw3-dev libepoxy-dev
-
-COPY --from=builder /FEX/Bin/* /usr/bin/
-
-WORKDIR /

Data/ThunksDB.json

@@ -1,51 +0,0 @@
-{
-  "DB": {
-    "GL": {
-      "Library" : "libGL-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libGL.so",
-        "@PREFIX_LIB@/libGL.so.1",
-        "@PREFIX_LIB@/libGL.so.1.2.0",
-        "@PREFIX_LIB@/libGL.so.1.7.0"
-      ]
-    },
-    "Vulkan": {
-      "Library": "libvulkan-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libvulkan.so",
-        "@PREFIX_LIB@/libvulkan.so.1",
-        "@HOME@/.local/share/Steam/ubuntu12_32/steam-runtime/pinned_libs_64/libvulkan.so.1"
-      ]
-    },
-    "drm": {
-      "Library": "libdrm-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libdrm.so",
-        "@PREFIX_LIB@/libdrm.so.2",
-        "@PREFIX_LIB@/libdrm.so.2.4.0"
-      ]
-    },
-    "asound": {
-      "Library": "libasound-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libasound.so",
-        "@PREFIX_LIB@/libasound.so.2",
-        "@PREFIX_LIB@/libasound.so.2.0.0"
-      ]
-    },
-    "fex_thunk_test": {
-      "Library": "libfex_thunk_test-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libfex_thunk_test.so"
-      ]
-    },
-    "WaylandClient": {
-      "Library" : "libwayland-client-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libwayland-client.so",
-        "@PREFIX_LIB@/libwayland-client.so.0",
-        "@PREFIX_LIB@/libwayland-client.so.0.20.0"
-      ]
-    }
-  }
-}

Data/binfmts/CMakeLists.txt

@@ -1,24 +0,0 @@
-function(GenBinFmt Name)
-  # Get the filename only component
-  get_filename_component(FMT_NAME ${Name} NAME_WE)
-
-  # Configure it
-  configure_file(${Name} ${CMAKE_BINARY_DIR}/Data/binfmts/${FMT_NAME})
-
-  # Then install the configured binfmt
-  install(FILES ${CMAKE_BINARY_DIR}/Data/binfmts/${FMT_NAME}
-    DESTINATION ${CMAKE_INSTALL_PREFIX}/share/binfmts/
-    COMPONENT Runtime)
-endfunction()
-
-if (NOT USE_LEGACY_BINFMTMISC)
-  configure_file(FEX-x86.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf)
-  configure_file(FEX-x86_64.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf)
-
-  install(FILES ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf
-    DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/binfmt.d/
-    COMPONENT Runtime)
-else()
-  GenBinFmt(FEX-x86.in)
-  GenBinFmt(FEX-x86_64.in)
-endif()

Data/binfmts/FEX-x86.conf.in

@@ -1 +0,0 @@
-:FEX-x86:M:0:\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEX:POCF

Data/binfmts/FEX-x86.in

@@ -1,8 +0,0 @@
-package fex
-interpreter @CMAKE_INSTALL_PREFIX@/bin/FEX
-magic \x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00
-offset 0
-mask \xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff
-credentials yes
-fix_binary yes
-preserve yes

Data/binfmts/FEX-x86_64.conf.in

@@ -1 +0,0 @@
-:FEX-x86_64:M:0:\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEX:POCF

Data/binfmts/FEX-x86_64.in

@@ -1,8 +0,0 @@
-package fex
-interpreter @CMAKE_INSTALL_PREFIX@/bin/FEX
-magic \x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00
-offset 0
-mask \xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff
-credentials yes
-fix_binary yes
-preserve yes

Data/nix/FEXLinuxTests/shell.nix

@@ -1,35 +0,0 @@
-{ pkgs ? import <nixpkgs> { } }:
-
-let
-  pkgsCross32 = pkgs.pkgsCross.gnu32;
-  pkgsCross64 = pkgs.pkgsCross.gnu64;
-
-  gcc32 = pkgs.writeText "toolchain_nix_gcc_x86_32.txt" ''
-    set(CMAKE_SYSTEM_PROCESSOR i686)
-    set(CMAKE_C_COMPILER ${pkgsCross32.buildPackages.gcc}/bin/i686-unknown-linux-gnu-gcc)
-    set(CMAKE_CXX_COMPILER ${pkgsCross32.buildPackages.gcc}/bin/i686-unknown-linux-gnu-g++)
-  '';
-
-  gcc64 = pkgs.writeText "toolchain_nix_gcc_x86_64.txt" ''
-    set(CMAKE_SYSTEM_PROCESSOR x86_64)
-    set(CMAKE_C_COMPILER ${pkgsCross64.buildPackages.gcc}/bin/x86_64-unknown-linux-gnu-gcc)
-    set(CMAKE_CXX_COMPILER ${pkgsCross64.buildPackages.gcc}/bin/x86_64-unknown-linux-gnu-g++)
-  '';
-in
-pkgs.mkShell {
-  buildInputs = [
-    pkgsCross64.buildPackages.clang
-    pkgsCross32.buildPackages.clang
-  ];
-
-  shellHook = ''
-    if [[ $- == *i* ]]; then
-      echo "toolchain32: ${gcc32}"
-      echo "toolchain64: ${gcc64}"
-      echo ""
-      echo "Use \$FEX_CMAKE_TOOLCHAINS to configure CMake."
-    fi
-  '';
-
-  FEX_CMAKE_TOOLCHAINS = "-DX86_32_TOOLCHAIN_FILE=${gcc32} -DX86_64_TOOLCHAIN_FILE=${gcc64}";
-}

Data/nix/LibraryForwarding/shell.nix

@@ -1,83 +0,0 @@
-{ pkgs ? import <nixpkgs> { } }:
-
-let
-  pkgsCross32 = pkgs.pkgsCross.gnu32;
-  pkgsCross64 = pkgs.pkgsCross.gnu64;
-
-  devRootFS = pkgs.buildEnv {
-    name = "fex-dev-rootfs";
-    paths = [
-      pkgsCross64.stdenv.cc.libc_dev
-      pkgsCross32.stdenv.cc.libc_dev
-      pkgsCross64.stdenv.cc.cc
-      pkgsCross32.stdenv.cc.cc
-
-      pkgs.alsa-lib.dev
-      pkgs.libdrm.dev
-      pkgs.libGL.dev
-      pkgs.wayland.dev
-      pkgs.xorg.libX11.dev
-      pkgs.xorg.libxcb.dev
-      pkgs.xorg.libXrandr.dev
-      pkgs.xorg.libXrender.dev
-      pkgs.xorg.xorgproto
-    ];
-    ignoreCollisions = true;
-    pathsToLink = [
-      "/include"
-      "/lib"
-    ];
-
-    postBuild = ''
-      mkdir -p $out/usr
-      ln -s $out/include $out/usr/
-    '';
-  };
-
-  toolchain32 = pkgs.writeText "toolchain_nix_x86_32.txt" ''
-    set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_SYSTEM_PROCESSOR i686)
-    set(CMAKE_C_COMPILER clang)
-    set(CMAKE_CXX_COMPILER clang++)
-    set(CMAKE_C_COMPILER ${pkgsCross32.buildPackages.clang}/bin/i686-unknown-linux-gnu-clang)
-    set(CMAKE_CXX_COMPILER ${pkgsCross32.buildPackages.clang}/bin/i686-unknown-linux-gnu-clang++)
-    set(CLANG_FLAGS "-nodefaultlibs -nostartfiles -lstdc++ -target i686-linux-gnu -msse2 -mfpmath=sse --sysroot=${devRootFS} -iwithsysroot/include")
-    set(CMAKE_C_FLAGS "''${CMAKE_C_FLAGS} ''${CLANG_FLAGS}")
-    set(CMAKE_CXX_FLAGS "''${CMAKE_CXX_FLAGS} ''${CLANG_FLAGS}")
-  '';
-
-  toolchain64 = pkgs.writeText "toolchain_nix_x86_64.txt" ''
-    set(CMAKE_EXE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_MODULE_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_SHARED_LINKER_FLAGS_INIT "-fuse-ld=lld")
-    set(CMAKE_SYSTEM_PROCESSOR x86_64)
-    set(CMAKE_C_COMPILER clang)
-    set(CMAKE_CXX_COMPILER clang++)
-    set(CMAKE_C_COMPILER ${pkgsCross64.buildPackages.clang}/bin/x86_64-unknown-linux-gnu-clang)
-    set(CMAKE_CXX_COMPILER ${pkgsCross64.buildPackages.clang}/bin/x86_64-unknown-linux-gnu-clang++)
-    set(CLANG_FLAGS "-nodefaultlibs -nostartfiles -lstdc++ -target x86_64-linux-gnu --sysroot=${devRootFS} -iwithsysroot/usr/include")
-    set(CMAKE_C_FLAGS "''${CMAKE_C_FLAGS} ''${CLANG_FLAGS}")
-    set(CMAKE_CXX_FLAGS "''${CMAKE_CXX_FLAGS} ''${CLANG_FLAGS}")
-  '';
-in
-pkgs.mkShell {
-  buildInputs = [
-    pkgsCross64.buildPackages.clang
-    pkgsCross32.buildPackages.clang
-  ];
-
-  shellHook = ''
-    if [[ $- == *i* ]]; then
-      echo "Set up dev RootFS at ${devRootFS}"
-      echo "toolchain32: ${toolchain32}"
-      echo "toolchain64: ${toolchain64}"
-      echo ""
-      echo "Use \$FEX_CMAKE_TOOLCHAINS to configure CMake."
-    fi
-  '';
-
-  FEX_CMAKE_TOOLCHAINS = "-DX86_32_TOOLCHAIN_FILE=${toolchain32} -DX86_64_TOOLCHAIN_FILE=${toolchain64} -DX86_DEV_ROOTFS=${devRootFS}";
-  ROOTFS = "${devRootFS}";
-}

Data/nix/WineOnArm/shell.nix

@@ -1,52 +0,0 @@
-{ pkgs ? import <nixpkgs> { } }:
-
-let
-  toolchain = pkgs.fetchzip {
-    url = "https://github.com/bylaws/llvm-mingw/releases/download/20250920/llvm-mingw-20250920-ucrt-ubuntu-22.04-aarch64.tar.xz";
-    sha256 = "sha256-LaojKjC8KzY+soW5u6eoDoXE3qtYk9Ejr7M3enTqRAE=";
-  };
-
-  cmakeToolchainFile = pkgs.substitute {
-    # Use absolute paths that are discoverable outside of the nix shell
-    src = ../../CMake/toolchain_mingw.cmake;
-    substitutions = ["--replace-fail" "\${MINGW_TRIPLE}-" "${toolchain}/bin/\${MINGW_TRIPLE}-"];
-  };
-
-  mesonCrossFile = pkgs.writeText "crossfile_llvm_mingw.txt" ''
-    [binaries]
-    ar = '${toolchain}/bin/arm64ec-w64-mingw32-ar'
-    c = '${toolchain}/bin/arm64ec-w64-mingw32-gcc'
-    cpp = '${toolchain}/bin/arm64ec-w64-mingw32-g++'
-    ld = '${toolchain}/bin/arm64ec-w64-mingw32-ld'
-    windres = '${toolchain}/bin/arm64ec-w64-mingw32-windres'
-    strip = '${toolchain}/bin/strip'
-    widl = '${toolchain}/bin/arm64ec-w64-mingw32-widl'
-    pkgconfig = 'aarch64-linux-gnu-pkg-config'
-    [host_machine]
-    system = 'windows'
-    cpu_family = 'aarch64'
-    cpu = 'aarch64'
-    endian = 'little'
-  '';
-in
-pkgs.mkShell {
-  buildInputs = [
-    toolchain
-  ];
-
-  shellHook = ''
-    if [[ $- == *i* ]]; then
-      echo "llvm-mingw set up at ${toolchain}."
-      echo ""
-      echo "To configure DXVK/vkd3d-proton: meson setup \$FEX_MESON_CROSSFILE"
-      echo ""
-      echo "To configure 32-bit FEX build: cmake \$FEX_CMAKE_TOOLCHAIN_WOW64"
-      echo "To configure 64-bit FEX build: cmake \$FEX_CMAKE_TOOLCHAIN_ARM64EC"
-    fi
-  '';
-
-  # E.g. cmake $FEX_CMAKE_TOOLCHAIN_ARM64EC -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTING=False
-  FEX_CMAKE_TOOLCHAIN_ARM64EC = "--toolchain ${cmakeToolchainFile} -DMINGW_TRIPLE=arm64ec-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows";
-  FEX_CMAKE_TOOLCHAIN_WOW64 = "--toolchain ${cmakeToolchainFile} -DMINGW_TRIPLE=aarch64-w64-mingw32 -DCMAKE_INSTALL_LIBDIR=/usr/lib/wine/aarch64-windows";
-  FEX_MESON_CROSSFILE = "--cross-file ${mesonCrossFile}";
-}

Data/nix/cmake_configure_woa32.sh

@@ -1,21 +0,0 @@
-#! /usr/bin/env nix-shell
-#! nix-shell -i bash WineOnArm/shell.nix
-
-# Helper script to configure CMake for building FEX as library for emulation
-# of 32-bit applications in Wine/Proton.
-# The required cross-toolchains will be set up and managed by nix.
-
-if [ $# -eq 0 ]
-then
-  echo "Expected CMake argument list"
-  exit 1
-fi
-
-if [ -f CMakeCache.txt ]
-then
-  echo "Expected empty build folder"
-  exit 1
-fi
-
-set -o xtrace
-cmake $FEX_CMAKE_TOOLCHAIN_WOW64 -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTING=False $@

Data/nix/cmake_configure_woa64.sh

@@ -1,21 +0,0 @@
-#! /usr/bin/env nix-shell
-#! nix-shell -i bash WineOnArm/shell.nix
-
-# Helper script to configure CMake for building FEX as library for emulation
-# of 64-bit applications in Wine/Proton
-# Nix is used to install and manage the required cross-toolchains.
-
-if [ $# -eq 0 ]
-then
-  echo "Expected CMake argument list"
-  exit 1
-fi
-
-if [ -f CMakeCache.txt ]
-then
-  echo "Expected empty build folder"
-  exit 1
-fi
-
-set -o xtrace
-cmake $FEX_CMAKE_TOOLCHAIN_ARM64EC -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_LTO=False -DBUILD_TESTING=False $@

Data/nix/cmake_enable_flt.sh

@@ -1,17 +0,0 @@
-#! /usr/bin/env nix-shell
-#! nix-shell -i bash FEXLinuxTests/shell.nix
-
-# Helper script to configure CMake for building FEXLinuxTests.
-# Nix is used to install and manage the required cross-toolchains.
-
-if [ ! -f CMakeCache.txt ]
-then
-  echo "Must be run from a pre-configured CMake build folder"
-  exit 1
-fi
-
-# Remove previous build to ensure the new toolchain is applied
-rm -rf unittests/FEXLinuxTests
-
-set -o xtrace
-cmake . $FEX_CMAKE_TOOLCHAINS -DBUILD_TESTING=ON -DBUILD_FEX_LINUX_TESTS=ON

Data/nix/cmake_enable_libfwd.sh

@@ -1,22 +0,0 @@
-# Helper script to configure CMake for library forwarding in FEX.
-# Nix is used to install and manage the required cross-toolchains.
-
-if [ ! -f CMakeCache.txt ]
-then
-  echo "Must be run from a pre-configured CMake build folder"
-  exit 1
-fi
-
-# Remove previous build to ensure the new toolchain is applied
-rm -rf guest-libs guest-libs-32 Guest Guest_32
-
-# Set clang executable path manually since the one from the nix store
-# will be picked up otherwise
-CLANG_EXEC_PATH=""
-if ! grep -q CLANG_EXEC_PATH CMakeCache.txt
-then
-  CLANG_EXEC_PATH="-DCLANG_EXEC_PATH=`which clang`"
-fi
-
-nix-shell `dirname -- "$0"`/LibraryForwarding/shell.nix \
-  --run "set -o xtrace; cmake . \$FEX_CMAKE_TOOLCHAINS -DBUILD_THUNKS=ON $CLANG_EXEC_PATH; set +o xtrace"

Dockerfile

@@ -0,0 +1,30 @@
+# --- Stage 1: Builder ---
+FROM ubuntu:20.04 as builder
+
+RUN DEBIAN_FRONTEND="noninteractive" apt-get update
+RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
+clang-10 llvm-10 nasm ninja-build libnuma-dev \
+libcap-dev libglfw3-dev libepoxy-dev python3-dev \
+python3 linux-headers-generic
+
+COPY . /opt/FEX
+
+CMD [ "mkdir /opt/FEX/build" ]
+
+WORKDIR /opt/FEX/build
+
+ARG CC=clang-10
+ARG CXX=clang++-10
+RUN cmake -G Ninja .. -DCMAKE_BUILD_TYPE=Release
+RUN ninja
+
+# --- Stage 2: Runner ---
+FROM ubuntu:20.04
+
+RUN DEBIAN_FRONTEND="noninteractive" apt-get update
+RUN DEBIAN_FRONTEND="noninteractive" apt install -y \
+libnuma-dev libcap-dev libglfw3-dev libepoxy-dev
+
+COPY --from=builder /opt/FEX/build/Bin/* /usr/bin/
+
+WORKDIR /root

External/.clang-format

@@ -1 +0,0 @@
-DisableFormat: true

External/FEXCore/CMakeLists.txt

@@ -0,0 +1,74 @@
+cmake_minimum_required(VERSION 3.14)
+set (PROJECT_NAME FEXCore)
+project(${PROJECT_NAME}
+  VERSION 0.01
+  LANGUAGES CXX)
+
+if (CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64")
+  set(_M_X86_64 1)
+  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcx16")
+endif()
+
+if (CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
+  set(_M_ARM_64 1)
+endif()
+
+set(ENABLE_JIT_X86_64 ${_M_X86_64} CACHE BOOL "Enable the x86_64 JIT")
+set(ENABLE_JIT_ARM64 ${_M_ARM_64} CACHE BOOL "Enable the ARM64 JIT")
+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
+option(ENABLE_JITSYMBOLS "Enable visibility of JITSymbols in profiling tools" FALSE)
+
+set(CMAKE_POSITION_INDEPENDENT_CODE ON)
+cmake_policy(SET CMP0083 NEW) # Follow new PIE policy
+include(CheckPIESupported)
+check_pie_supported()
+
+set(CMAKE_INCLUDE_CURRENT_DIR ON)
+
+include(CheckCXXCompilerFlag)
+include(CheckIncludeFileCXX)
+
+
+if (EXISTS ${CMAKE_CURRENT_DIR}/External/vixl/)
+    # Useful to have for freestanding libFEXCore
+    add_subdirectory(External/vixl/)
+    include_directories(External/vixl/src/)
+endif()
+
+set(CMAKE_CXX_STANDARD 20)
+set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
+
+# Find our git hash
+find_package(Git)
+
+set(GIT_SHORT_HASH "Unknown")
+set(GIT_DESCRIBE_STRING "FEX-Unknown")
+
+if (GIT_FOUND)
+  execute_process(
+    COMMAND ${GIT_EXECUTABLE} rev-parse --short HEAD
+    WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
+    OUTPUT_VARIABLE GIT_SHORT_HASH
+    ERROR_QUIET
+    OUTPUT_STRIP_TRAILING_WHITESPACE
+  )
+  execute_process(
+    COMMAND ${GIT_EXECUTABLE} describe
+    WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
+    OUTPUT_VARIABLE GIT_DESCRIBE_STRING
+    ERROR_QUIET
+    OUTPUT_STRIP_TRAILING_WHITESPACE
+  )
+endif()
+
+configure_file(
+  ${CMAKE_CURRENT_SOURCE_DIR}/include/git_version.h.in
+  ${CMAKE_BINARY_DIR}/generated/git_version.h)
+
+include_directories(${CMAKE_BINARY_DIR}/generated)
+
+add_subdirectory(Source/)
+
+install (DIRECTORY include/FEXCore ${CMAKE_BINARY_DIR}/include/FEXCore
+  DESTINATION include
+  COMPONENT Development)

External/FEXCore/Readme.md

@@ -18,8 +18,14 @@ This project aims to provide a fast and functional x86-64 emulation library that
 * Portable library implementation in order to support easy integration in to applications
 ### Target Host Architecture
 The target host architecture for this library is AArch64. Specifically the ARMv8.1 version or newer.
-The CPU IR is designed with AArch64 in mind but should allow for other architectures as well.
-x86-64 host support is available for ease of development, but is not a priority.
+The CPU IR is designed with AArch64 in mind but there is a desire to run the recompiled code on other architectures as well.
+Multiple architecture support is desired for easier bringup and debugging, performance isn't as much of a priority there (ex. x86-64(guest) translated to x86-64(host))
+### Not currently goals but will be in the future
+* 32bit x86 support
+  * This will be a desire in the future, but to lower the amount of work required, decided to push this off for now.
+* Integration in to WINE
+* Later generation of x86-64 instruction sets
+  * Including AVX, F16C, XOP, FMA, AVX2, etc
 ### Not desired
 * Kernel space emulation
 * CPL0-2 emulation
@@ -27,3 +33,7 @@ x86-64 host support is available for ease of development, but is not a priority.
 * IRQs
 * SVM
 * "Cycle Accurate" emulation
+### Dependencies
+ * clang-tidy if you want to ensure the code stays tidy
+ * cmake
+ * A C++17 compliant compiler (There are assumptions made about using Clang and LTO)

External/FEXCore/Scripts/config_generator.py

@@ -22,14 +22,12 @@ def print_header():
 #define OPT_UINT64(group, enum, json, default) OPT_BASE(uint64_t, group, enum, json, default)
 #endif
 #ifndef OPT_STR
-#define OPT_STR(group, enum, json, default) OPT_BASE(fextl::string, group, enum, json, default)
+#define OPT_STR(group, enum, json, default) OPT_BASE(std::string, group, enum, json, default)
 #endif
 #ifndef OPT_STRARRAY
-#define OPT_STRARRAY(group, enum, json, default) OPT_BASE(fextl::string, group, enum, json, default)
-#endif
-#ifndef OPT_STRENUM
-#define OPT_STRENUM(group, enum, json, default) OPT_BASE(uint64_t, group, enum, json, default)
+#define OPT_STRARRAY(group, enum, json, default) OPT_BASE(std::string, group, enum, json, default)
 #endif
+
 '''
     output_file.write(header)
 
@@ -42,7 +40,6 @@ def print_tail():
 #undef OPT_UINT64
 #undef OPT_STR
 #undef OPT_STRARRAY
-#undef OPT_STRENUM
 '''
     output_file.write(tail)
 
@@ -101,125 +98,87 @@ def print_man_option(short, long, desc, default):
     output_man.write("\\fBdefault:\\fR {0}\n".format(default))
     output_man.write(".Pp\n\n")
 
-def print_man_env_option(name, desc, default, no_json_key):
-    output_man.write("\\fBFEX_{0}\\fR\n".format(name.upper()))
+def print_man_env_option(name, desc, default):
+    output_man.write("\\fBFEX_{0}\\fR\n".format(name))
 
     # Print description
     for line in desc:
         output_man.write(".Pp\n")
         output_man.write("{0}\n".format(line))
 
-    if (not no_json_key):
-        output_man.write(".Pp\n")
-        output_man.write("\\fBJSON key:\\fR '{0}'\n".format(name))
-        output_man.write(".Pp\n\n")
-
     output_man.write(".Pp\n")
     output_man.write("\\fBdefault:\\fR {0}\n".format(default))
     output_man.write(".Pp\n\n")
 
+def print_man_options(options):
+    output_man.write(".Sh OPTIONS\n")
+    output_man.write(".Bl -tag -width -indent\n")
+    for op_group, group_vals in options.items():
+        for op_key, op_vals in group_vals.items():
+            short = None
+            long = op_key.lower()
+
+            if ("ShortArg" in op_vals):
+                short = op_vals["ShortArg"]
+
+            default = op_vals["Default"]
+
+            # Textual default rather than enum based
+            if ("TextDefault" in op_vals):
+                default = op_vals["TextDefault"]
+
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
+                # Wrap the string argument in quotes
+                default = "'" + default + "'"
+            print_man_option(
+                short,
+                long,
+                op_vals["Desc"],
+                default
+            )
+
+    output_man.write(".El\n")
+
 def print_man_environment(options):
     output_man.write(".Sh ENVIRONMENT\n")
     output_man.write(".Bl -tag -width -indent\n")
     for op_group, group_vals in options.items():
         for op_key, op_vals in group_vals.items():
             default = op_vals["Default"]
-            value_type = op_vals["Type"]
 
             # Textual default rather than enum based
             if ("TextDefault" in op_vals):
                 default = op_vals["TextDefault"]
 
-            if (value_type == "str" or value_type == "strarray" or value_type == "strenum"):
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
                 # Wrap the string argument in quotes
                 default = "'" + default + "'"
             print_man_env_option(
-                op_key,
+                op_key.upper(),
                 op_vals["Desc"],
-                default,
-                False
+                default
             )
 
-            if (value_type == "strenum"):
-                Enums = op_vals["Enums"]
-                output_man.write("\\fBAvailable Options:\\fR\n")
-                output_man.write(", ".join(f"{enum_op_val}" for [_, enum_op_val] in Enums.items()))
-                output_man.write("\n.sp\n")
-
-    print_man_environment_tail()
     output_man.write(".El\n")
-
-def print_man_environment_tail():
-
-    # Additional environment variables that live outside of the normal loop
-    print_man_env_option(
-    "APP_CONFIG_LOCATION",
-    [
-    "Allows the user to override where FEX looks for configuration files",
-    "By default FEX will look in ${XDG_CONFIG_HOME, $HOME/.config}/fex-emu/",
-    "This will override the full path",
-    "If FEX_PORTABLE is declared then relative paths are also supported",
-    "For FEX: Relative to the FEX binary",
-    "For WINE: Relative to %LOCALAPPDATA%"
-    ],
-    "''", True)
-
-    print_man_env_option(
-    "APP_CONFIG",
-    [
-    "Allows the user to override where FEX looks for only the application config file",
-    "By default FEX will look in ${XDG_CONFIG_HOME, $HOME/.config}/fex-emu/Config.json",
-    "This will override this file location",
-    "One must be careful with this option as it will override any applications that load with execve as well"
-    "If you need to support applications that execve then use FEX_APP_CONFIG_LOCATION instead"
-    "If FEX_PORTABLE is declared then relative paths are also supported",
-    "For FEX: Relative to the FEX binary",
-    "For WINE: Relative to %LOCALAPPDATA%"
-    ],
-    "''", True)
-
-    print_man_env_option(
-    "APP_DATA_LOCATION",
-    [
-    "Allows the user to override where FEX looks for data files",
-    "By default FEX will look in {$XDG_DATA_HOME, $HOME/.local/share}/fex-emu/",
-    "This will override the full path",
-    "This is the folder where FEX stores generated files like IR cache"
-    ],
-    "''", True)
-
-    print_man_env_option(
-    "PORTABLE",
-    [
-    "Allows FEX to run without installation. Global locations for configuration and binfmt_misc are ignored.",
-    "For FEX on Linux:",
-    "These files are instead read from <FEXPath>/fex-emu/ by default.",
-    "For Arm64ec/Wow64 WINE builds:",
-    "These files are instead read from $LOCALAPPDATA/fex-emu/ by default.",
-    "For further customization, see FEX_APP_CONFIG_LOCATION and FEX_APP_DATA_LOCATION."
-    ],
-    "''", True)
-
-    print_man_env_option(
-    "APP_CACHE_LOCATION",
-    [
-    "Allows the user to override where FEX stores and loads cache files",
-    "By default FEX will look in ${XDG_CACHE_HOME, $HOME/.cache}/fex-emu/",
-    "This will override the full path, trailing forward-slash is expected to exist",
-    ],
-    "''", True)
-
 def print_man_header():
     header ='''.Dd {0}
 .Dt FEX
 .Os Linux
 .Sh NAME
-.Nm FEX
+.Nm FEXLoader
+.Nm FEXInterpreter
 .Nm FEXBash
 .Nd Fast x86-64 and x86 emulation.
 .Sh SYNOPSIS
 .Nm
-.Ar <args> ...
+.Op options
+.Op Ar --
+.Ar Application
+<args> ...
+.Pp
+.Nm FEXInterpreter
+.Ar Application
+<args> ...
 .Pp
 .Nm FEXBash
 .Ar <args> ...
@@ -234,7 +193,7 @@ FEX is very much work in progress, so expect things to change.
 def print_man_tail():
     tail ='''.Sh FILES
 .Bl -tag -width "$prefix/share/fex-emu/GuestThunks" -compact
-.It Pa $XDG_CONFIG_DIR/fex-emu
+.It Pa $XDG_HOME_DIR/.fex-emu
 Default FEX user configuration directory
 .It Pa $prefix/share/fex-emu/AppConfig
 System level application configuration files
@@ -327,85 +286,109 @@ def print_config_option(type, group_name, json_name, default_value, short, choic
 
     output_argloader.write("\n");
 
-def print_parse_envloader_options(options):
-    output_argloader.write("#ifdef ENVLOADER\n")
-    output_argloader.write("#undef ENVLOADER\n")
-    output_argloader.write("if (false) {}\n")
-
+def print_argloader_options(options):
+    output_argloader.write("#ifdef BEFORE_PARSE\n")
+    output_argloader.write("#undef BEFORE_PARSE\n")
     for op_group, group_vals in options.items():
         for op_key, op_vals in group_vals.items():
-            value_type = op_vals["Type"]
-            if (value_type == "strenum"):
-                output_argloader.write("else if (Key == \"FEX_{0}\") {{\n".format(op_key.upper()))
-                output_argloader.write("\tValue = FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, Value_View);\n".format(op_key, op_key))
-                output_argloader.write("}\n")
+            default = op_vals["Default"]
 
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
+                # Wrap the string argument in quotes
+                default = "\"" + default + "\""
+
+            # Textual default rather than enum based
+            if ("TextDefault" in op_vals):
+                default = "\"" + op_vals["TextDefault"] + "\""
+
+            short = None
+            choices = None
+
+            if ("ShortArg" in op_vals):
+                short = op_vals["ShortArg"]
+            if ("Choices" in op_vals):
+                choices = op_vals["Choices"]
+
+            print_config_option(
+                op_vals["Type"],
+                op_group,
+                op_key,
+                default,
+                short,
+                choices,
+                op_vals["Desc"])
+
+        output_argloader.write("\n")
+    output_argloader.write("#endif\n")
+
+def print_parse_argloader_options(options):
+    output_argloader.write("#ifdef AFTER_PARSE\n")
+    output_argloader.write("#undef AFTER_PARSE\n")
+    for op_group, group_vals in options.items():
+        for op_key, op_vals in group_vals.items():
+            output_argloader.write("if (Options.is_set_by_user(\"{0}\")) {{\n".format(op_key))
+
+            value_type = op_vals["Type"]
+            NeedsString = False
+            conversion_func = "std::to_string"
             if ("ArgumentHandler" in op_vals):
-                conversion_func = "FEXCore::Config::Handler::{0}".format(op_vals["ArgumentHandler"])
-                output_argloader.write("else if (Key == \"FEX_{0}\") {{\n".format(op_key.upper()))
-                output_argloader.write("\tValue = {0}(Value_View);\n".format(conversion_func))
-                output_argloader.write("}\n")
-    output_argloader.write("#endif\n")
+                NeedsString = True
+                conversion_func = "FEX::Handler::{0}".format(op_vals["ArgumentHandler"])
+            if (value_type == "str"):
+                NeedsString = True
+                conversion_func = ""
 
-def print_parse_jsonloader_options(options):
-    output_argloader.write("#ifdef JSONLOADER\n")
-    output_argloader.write("#undef JSONLOADER\n")
-    output_argloader.write("if (false) {}\n")
-    op_key = None
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            value_type = op_vals["Type"]
-            if (value_type == "strenum"):
-                output_argloader.write("else if (KeyName == \"{0}\") {{\n".format(op_key))
-                output_argloader.write("\tSet(KeyOption, FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, Value_View));\n".format(op_key, op_key))
-                output_argloader.write("}\n")
-            elif (value_type == "strarray"):
-                output_argloader.write("else if (KeyName == \"{0}\") {{\n".format(op_key))
-                output_argloader.write("\tAppendStrArrayValue(KeyOption, ConfigString);\n")
-                output_argloader.write("}\n")
-    assert op_key is not None, "No options found in JSONLOADER"
-    output_argloader.write("else {\n")
-    output_argloader.write("\tSet(KeyOption, ConfigString);\n")
-    output_argloader.write("}\n")
+            if (value_type == "strarray"):
+                # these need a bit more help
+                output_argloader.write("\tauto Array = Options.all(\"{0}\");\n".format(op_key))
+                output_argloader.write("\tfor (auto iter = Array.begin(); iter != Array.end(); ++iter) {\n")
+                output_argloader.write("\t\tSet(FEXCore::Config::ConfigOption::CONFIG_{0}, *iter);\n".format(op_key.upper()))
+                output_argloader.write("\t}\n")
+            else:
+                if (NeedsString):
+                    output_argloader.write("\tstd::string UserValue = Options[\"{0}\"];\n".format(op_key))
+                else:
+                    output_argloader.write("\t{0} UserValue = Options.get(\"{1}\");\n".format(value_type, op_key))
+
+                output_argloader.write("\tSet(FEXCore::Config::ConfigOption::CONFIG_{0}, {1}(UserValue));\n".format(op_key.upper(), conversion_func))
+            output_argloader.write("}\n")
 
     output_argloader.write("#endif\n")
 
-def print_parse_enum_options(options):
-    output_argloader.write("#ifdef ENUMDEFINES\n")
-    output_argloader.write("#undef ENUMDEFINES\n")
+def check_for_duplicate_options(options):
+    short_map = []
+    long_map = []
+
+    # Spin through all the items and see if we have a duplicate option
     for op_group, group_vals in options.items():
         for op_key, op_vals in group_vals.items():
-            if (op_vals["Type"] == "strenum"):
-                output_argloader.write("enum class {} : uint64_t {{\n".format(op_key))
-                Enums = op_vals["Enums"]
-                i = 0
-                # Always have an OFF.
-                output_argloader.write("\tOFF = 0,\n")
-                for enum_op_key, enum_op_vals in Enums.items():
-                    output_argloader.write("\t{} = 1ULL << {},\n".format(enum_op_key.upper(), i))
-                    i += 1
+            short = None
+            long = op_key.lower()
+            long_invert = None
+            if ("ShortArg" in op_vals):
+                short = op_vals["ShortArg"]
+            if (op_vals["Type"] == "bool"):
+                long_invert = "no-" + long
 
-                output_argloader.write("};\n")
-                output_argloader.write("FEX_DEF_NUM_OPS({})\n".format(op_key))
+            # Check for short key duplication
+            if (short != None):
+                if (short in short_map):
+                    raise Exception("Short config '{0}' for option '{1}' has duplicate entry!".format(short, op_key))
+                else:
+                    short_map.append(short)
 
+            # Check for long key duplication
+            if (long in long_map):
+                raise Exception("Long config '{0}' has duplicate entry!".format(long))
+            else:
+                long_map.append(long)
 
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            if (op_vals["Type"] == "strenum"):
-                Enums = op_vals["Enums"]
-
-                output_argloader.write("using {}ConfigPair = std::pair<std::string_view, FEXCore::Config::{}>;\n".format(op_key, op_key))
-                output_argloader.write("constexpr static std::array<{}ConfigPair, {}> {}_EnumPairs = {{{{\n".format(op_key, len(Enums) + 1, op_key))
-                i = 0
-                # Always have an OFF.
-                output_argloader.write("\t{{ \"off\", FEXCore::Config::{}::OFF }},\n".format(op_key))
-                for enum_op_key, enum_op_vals in Enums.items():
-                    output_argloader.write("\t{{ \"{}\", FEXCore::Config::{}::{} }},\n".format(enum_op_vals, op_key, enum_op_key.upper()))
-                    i += 1
-
-                output_argloader.write("}};\n")
-
-    output_argloader.write("#endif\n")
+            # Check for long key duplication
+            if (long_invert != None):
+                if (long_invert in long_map):
+                    raise Exception("Long config '{0}' has duplicate entry!".format(long_invert))
+                else:
+                    long_map.append(long_invert)
 
 if (len(sys.argv) < 5):
     sys.exit()
@@ -423,6 +406,8 @@ json_object = json.loads(json_text)
 options = json_object["Options"]
 unnamed_options = json_object["UnnamedOptions"]
 
+check_for_duplicate_options(options)
+
 # Generate config include file
 output_file = open(output_filename, "w")
 print_header()
@@ -434,6 +419,7 @@ output_file.close()
 # Generate man file
 output_man = open(output_man_page, "w")
 print_man_header()
+print_man_options(options)
 print_man_environment(options)
 print_man_tail()
 
@@ -441,14 +427,6 @@ output_man.close()
 
 # Generate argument loader code
 output_argloader = open(output_argumentloader_filename, "w")
-
-# Generate environment loader code
-print_parse_envloader_options(options);
-
-# Generate json loader code
-print_parse_jsonloader_options(options);
-
-# Generate enum variable options
-print_parse_enum_options(options);
-
+print_argloader_options(options);
+print_parse_argloader_options(options);
 output_argloader.close()

External/FEXCore/Scripts/json_ir_doc_generator.py

@@ -7,12 +7,17 @@ OpClasses = collections.OrderedDict()
 def get_ir_classes(ops, defines):
     global OpClasses
 
-    for op_class, opslist in ops.items():
-        if not (op_class in OpClasses):
-            OpClasses[op_class] = []
+    for op_key, op_vals in ops.items():
+        if not ("Last" in op_vals):
+            OpClass = "#Unknown"
 
-        for op, op_val in opslist.items():
-            OpClasses[op_class].append([op, op_val])
+            if ("OpClass" in op_vals):
+                OpClass = op_vals["OpClass"]
+
+            if not (OpClass in OpClasses):
+                OpClasses[OpClass] = []
+
+            OpClasses[OpClass].append([op_key, op_vals])
 
     # Sort the dictionary after we are done parsing it
     OpClasses = collections.OrderedDict(sorted(OpClasses.items()))
@@ -33,9 +38,41 @@ def print_ir_ops():
             op_key = op[0]
             op_vals = op[1]
             output_file.write("## %s\n" % (op_key))
+            HasDest = ("HasDest" in op_vals and op_vals["HasDest"] == True)
+            HasSSAArgs = ("SSAArgs" in op_vals and len(op_vals["SSAArgs"]) > 0)
+            HasSSAArgNames = "SSANames" in op_vals
+            HasArgs = "Args" in op_vals
+            SSAArgsCount = 0
+            ArgCount = 0
+            if (HasSSAArgs):
+                SSAArgsCount = int(op_vals["SSAArgs"])
+            if (HasArgs):
+                ArgCount = len(op_vals["Args"])
+
+            TotalArgsCount = SSAArgsCount + (ArgCount / 2)
 
             output_file.write(">")
-            output_file.write(op_key)
+            if (HasDest):
+                output_file.write("%dest = ")
+
+            output_file.write("%s " % op_key)
+
+            ArgComma = (", ", "")
+            if (HasSSAArgs):
+                for i in range(0, SSAArgsCount):
+                    FinalArg = (i + 1) == TotalArgsCount
+                    if (HasSSAArgNames):
+                        output_file.write("%%%s%s" % (op_vals["SSANames"][i], ArgComma[FinalArg]))
+                    else:
+                        output_file.write("%%ssa%d%s" % (i, ArgComma[FinalArg]))
+
+            if (HasArgs):
+                Args = op_vals["Args"]
+                for i in range(0, ArgCount, 2):
+                    FinalArg = ((i / 2) + SSAArgsCount + 1) == TotalArgsCount
+                    data_type = Args[i]
+                    data_name = Args[i + 1]
+                    output_file.write("\<%s %s\>%s" % (data_type, data_name, ArgComma[FinalArg]))
 
             output_file.write("\n\n")
 

External/FEXCore/Scripts/json_ir_generator.py

@@ -0,0 +1,643 @@
+import json
+import sys
+
+# Print out enum values
+def print_enums(ops, defines):
+    output_file.write("#ifdef IROP_ENUM\n")
+    output_file.write("enum IROps : uint8_t {\n")
+
+    for op_key, op_vals in ops.items():
+        output_file.write("\t\tOP_%s,\n" % op_key.upper())
+
+    output_file.write("};\n")
+
+    output_file.write("#undef IROP_ENUM\n")
+    output_file.write("#endif\n\n")
+
+# Print out struct definitions
+def print_ir_structs(ops, defines):
+    output_file.write("#ifdef IROP_STRUCTS\n")
+
+    # Print out defines here
+    for op_val in defines:
+        output_file.write("\t%s;\n" % op_val)
+
+    output_file.write("// Default structs\n")
+    output_file.write("struct __attribute__((packed)) IROp_Header {\n")
+    output_file.write("\tvoid* Data[0];\n")
+    output_file.write("\tIROps Op;\n\n")
+    output_file.write("\tuint8_t Size;\n")
+    output_file.write("\tuint8_t NumArgs;\n")
+    output_file.write("\tuint8_t ElementSize : 7;\n")
+    output_file.write("\tbool HasDest : 1;\n")
+
+    output_file.write("\ttemplate<typename T>\n")
+    output_file.write("\tT const* C() const { return reinterpret_cast<T const*>(Data); }\n")
+    output_file.write("\ttemplate<typename T>\n")
+    output_file.write("\tT* CW() { return reinterpret_cast<T*>(Data); }\n")
+
+    output_file.write("\tOrderedNodeWrapper Args[0];\n")
+
+    output_file.write("};\n\n");
+
+    output_file.write("// User defined IR Op structs\n")
+    for op_key, op_vals in ops.items():
+        SSAArgs = 0
+        HasArgs = False
+        HasSSANames = False
+
+        if ("SSAArgs" in op_vals):
+            SSAArgs = int(op_vals["SSAArgs"])
+
+        if ("Args" in op_vals and len(op_vals["Args"]) != 0):
+            HasArgs = True
+
+        if ("SSANames" in op_vals and len(op_vals["SSANames"]) != 0):
+            HasSSANames = True
+
+        output_file.write("struct __attribute__((packed)) IROp_%s {\n" % op_key)
+        output_file.write("\tIROp_Header Header;\n\n")
+
+        # SSA arguments have a hard requirement to appear after the header
+        if (SSAArgs != 0):
+            if (HasSSANames):
+                for i in range(0, SSAArgs):
+                    output_file.write("\tOrderedNodeWrapper %s;\n" % (op_vals["SSANames"][i]));
+
+            else:
+                output_file.write("private:\n")
+                for i in range(0, SSAArgs):
+                    output_file.write("\tuint64_t : (sizeof(OrderedNodeWrapper) * 8);\n");
+                output_file.write("public:\n")
+
+        if (HasArgs):
+            output_file.write("\t// User defined data\n")
+
+            # Print out arguments in IR Op
+            for i in range(0, len(op_vals["Args"]), 2):
+                data_type = op_vals["Args"][i]
+                data_name = op_vals["Args"][i+1]
+                output_file.write("\t%s %s;\n" % (data_type, data_name))
+
+        output_file.write("\tstatic constexpr IROps OPCODE = OP_%s;\n" % op_key.upper())
+
+        output_file.write("};\n")
+
+        # Add a static assert that the IR ops must be pod
+        output_file.write("static_assert(std::is_trivial<IROp_%s>::value);\n\n" % op_key)
+        output_file.write("static_assert(std::is_standard_layout<IROp_%s>::value);\n\n" % op_key)
+
+    output_file.write("#undef IROP_STRUCTS\n")
+    output_file.write("#endif\n\n")
+
+# Print out const expression to calculate IR Op sizes
+def print_ir_sizes(ops, defines):
+    output_file.write("#ifdef IROP_SIZES\n")
+
+    output_file.write("constexpr std::array<size_t, IROps::OP_LAST + 1> IRSizes = {\n")
+    for op_key, op_vals in ops.items():
+        if ("Last" in op_vals):
+            output_file.write("\t-1ULL,\n")
+        else:
+            output_file.write("\tsizeof(IROp_%s),\n" % op_key)
+
+    output_file.write("};\n\n")
+
+    output_file.write("// Make sure our array maps directly to the IROps enum\n")
+    output_file.write("static_assert(IRSizes[IROps::OP_LAST] == -1ULL);\n\n")
+
+    output_file.write("[[maybe_unused]] static size_t GetSize(IROps Op) { return IRSizes[Op]; }\n\n")
+
+    output_file.write("std::string_view const& GetName(IROps Op);\n")
+    output_file.write("uint8_t GetArgs(IROps Op);\n")
+    output_file.write("FEXCore::IR::RegisterClassType GetRegClass(IROps Op);\n\n")
+    output_file.write("bool HasSideEffects(IROps Op);\n")
+
+    output_file.write("#undef IROP_SIZES\n")
+    output_file.write("#endif\n\n")
+
+def print_ir_reg_classes(ops, defines):
+    output_file.write("#ifdef IROP_REG_CLASSES_IMPL\n")
+
+    output_file.write("constexpr std::array<FEXCore::IR::RegisterClassType, IROps::OP_LAST + 1> IRRegClasses = {\n")
+    for op_key, op_vals in ops.items():
+        if ("Last" in op_vals):
+            output_file.write("\tFEXCore::IR::InvalidClass,\n")
+        else:
+            Class = "Invalid"
+            if ("HasDest" in op_vals and not ("DestClass" in op_vals)):
+                sys.exit("IR op %s has destination with no destination class" % (op_key))
+
+            if ("DestClass" in op_vals):
+                Class = op_vals["DestClass"]
+            output_file.write("\tFEXCore::IR::%sClass,\n" % Class)
+
+    output_file.write("};\n\n")
+
+    output_file.write("// Make sure our array maps directly to the IROps enum\n")
+    output_file.write("static_assert(IRRegClasses[IROps::OP_LAST] == FEXCore::IR::InvalidClass);\n\n")
+
+    output_file.write("FEXCore::IR::RegisterClassType GetRegClass(IROps Op) { return IRRegClasses[Op]; }\n\n")
+
+    output_file.write("#undef IROP_REG_CLASSES_IMPL\n")
+    output_file.write("#endif\n\n")
+
+# Print out the name printer implementation
+def print_ir_getname(ops, defines):
+    output_file.write("#ifdef IROP_GETNAME_IMPL\n")
+    output_file.write("constexpr std::array<std::string_view const, OP_LAST + 1> IRNames = {\n")
+    for op_key, op_vals in ops.items():
+        output_file.write("\t\"%s\",\n" % op_key)
+
+    output_file.write("};\n\n")
+
+    output_file.write("static_assert(IRNames[OP_LAST] == \"Last\");\n\n")
+
+    output_file.write("std::string_view const& GetName(IROps Op) {\n")
+    output_file.write("  return IRNames[Op];\n")
+    output_file.write("}\n")
+
+    output_file.write("#undef IROP_GETNAME_IMPL\n")
+    output_file.write("#endif\n\n")
+
+# Print out the number of SSA args that need to be RA'd
+def print_ir_getraargs(ops, defines):
+    output_file.write("#ifdef IROP_GETRAARGS_IMPL\n")
+
+    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> IRArgs = {\n")
+    for op_key, op_vals in ops.items():
+        SSAArgs = 0
+        if ("SSAArgs" in op_vals):
+            SSAArgs = int(op_vals["SSAArgs"])
+
+        if ("RAOverride" in op_vals):
+            SSAArgs = int(op_vals["RAOverride"])
+
+        output_file.write("\t%d,\n" % SSAArgs)
+
+    output_file.write("};\n\n")
+
+    output_file.write("uint8_t GetArgs(IROps Op) {\n")
+    output_file.write("  return IRArgs[Op];\n")
+    output_file.write("}\n")
+
+    output_file.write("#undef IROP_GETRAARGS_IMPL\n")
+    output_file.write("#endif\n\n")
+
+def print_ir_hassideeffects(ops, defines):
+    output_file.write("#ifdef IROP_HASSIDEEFFECTS_IMPL\n")
+
+    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> SideEffects = {\n")
+    for op_key, op_vals in ops.items():
+        HasSideEffects = False
+        if ("HasSideEffects" in op_vals):
+            HasSideEffects = op_vals["HasSideEffects"]
+
+        output_file.write("\t%s,\n" % ("true" if HasSideEffects else "false"))
+
+    output_file.write("};\n\n")
+
+    output_file.write("bool HasSideEffects(IROps Op) {\n")
+    output_file.write("  return SideEffects[Op];\n")
+    output_file.write("}\n")
+
+    output_file.write("#undef IROP_HASSIDEEFFECTS_IMPL\n")
+    output_file.write("#endif\n\n")
+
+# Print out IR argument printing
+def print_ir_arg_printer(ops, defines):
+    output_file.write("#ifdef IROP_ARGPRINTER_HELPER\n")
+    output_file.write("switch (IROp->Op) {\n")
+    for op_key, op_vals in ops.items():
+        if not ("Last" in op_vals):
+            SSAArgs = 0
+            HasArgs = False
+            HasHelperArgs = False
+
+            # Does this not want a printer?
+            if ("ArgPrinter" in op_vals and op_vals["ArgPrinter"] == False):
+                continue
+
+            if ("SSAArgs" in op_vals):
+                SSAArgs = int(op_vals["SSAArgs"])
+
+            if ("Args" in op_vals and len(op_vals["Args"]) != 0):
+                HasArgs = True
+
+            if ("HelperArgs" in op_vals and len(op_vals["HelperArgs"]) != 0):
+                HasHelperArgs = True
+
+            output_file.write("case IROps::OP_%s: {\n" % op_key.upper())
+            if (HasArgs or SSAArgs != 0):
+                output_file.write("\tauto Op = IROp->C<IR::IROp_%s>();\n" % op_key)
+                output_file.write("\t*out << \" \";\n")
+
+                # Print SSA args first
+                if (SSAArgs != 0):
+                    for i in range(0, SSAArgs):
+                        LastArg = (SSAArgs - i - 1) == 0 and not HasArgs
+                        output_file.write("\tPrintArg(out, IR, Op->Header.Args[%d], RAData);\n" % i)
+                        if not (LastArg):
+                            output_file.write("\t*out << \", \";\n")
+
+                # Now print user defined arguments
+                if (HasArgs):
+                    ArgCount = len(op_vals["Args"])
+
+                    for i in range(0, len(op_vals["Args"]), 2):
+                        data_name = op_vals["Args"][i+1]
+                        LastArg = (ArgCount - i - 2) == 0
+                        CondArg2 = (", ", "")
+                        output_file.write("\tPrintArg(out, IR, Op->%s);\n" % data_name)
+                        if not (LastArg):
+                            output_file.write("\t*out << \", \";\n")
+
+            output_file.write("break;\n")
+            output_file.write("}\n")
+
+
+    output_file.write("#undef IROP_ARGPRINTER_HELPER\n")
+    output_file.write("#endif\n")
+
+# Print out IR allocator helpers
+def print_ir_allocator_helpers(ops, defines):
+    output_file.write("#ifdef IROP_ALLOCATE_HELPERS\n")
+
+    output_file.write("\ttemplate <class T>\n")
+    output_file.write("\tstruct Wrapper final {\n")
+    output_file.write("\t\tT *first;\n")
+    output_file.write("\t\tOrderedNode *Node; ///< Actual offset of this IR in ths list\n")
+    output_file.write("\t\t\n")
+    output_file.write("\t\toperator Wrapper<IROp_Header>() const { return Wrapper<IROp_Header> {reinterpret_cast<IROp_Header*>(first), Node}; }\n")
+    output_file.write("\t\toperator OrderedNode *() { return Node; }\n")
+    output_file.write("\t\toperator OpNodeWrapper () { return Node->Header.Value; }\n")
+    output_file.write("\t};\n")
+
+    output_file.write("\ttemplate <class T>\n")
+    output_file.write("\tusing IRPair = Wrapper<T>;\n\n")
+
+    output_file.write("\tIRPair<IROp_Header> AllocateRawOp(size_t HeaderSize) {\n")
+    output_file.write("\t\tauto Op = reinterpret_cast<IROp_Header*>(Data.Allocate(HeaderSize));\n")
+    output_file.write("\t\tmemset(Op, 0, HeaderSize);\n")
+    output_file.write("\t\tOp->Op = IROps::OP_DUMMY;\n")
+    output_file.write("\t\treturn IRPair<IROp_Header>{Op, CreateNode(Op)};\n")
+    output_file.write("\t}\n\n")
+
+    output_file.write("\ttemplate<class T, IROps T2>\n")
+    output_file.write("\tT *AllocateOrphanOp() {\n")
+    output_file.write("\t\tsize_t Size = FEXCore::IR::GetSize(T2);\n")
+    output_file.write("\t\tauto Op = reinterpret_cast<T*>(Data.Allocate(Size));\n")
+    output_file.write("\t\tmemset(Op, 0, Size);\n")
+    output_file.write("\t\tOp->Header.Op = T2;\n")
+    output_file.write("\t\treturn Op;\n")
+    output_file.write("\t}\n\n")
+
+    output_file.write("\ttemplate<class T, IROps T2>\n")
+    output_file.write("\tIRPair<T> AllocateOp() {\n")
+    output_file.write("\t\tsize_t Size = FEXCore::IR::GetSize(T2);\n")
+    output_file.write("\t\tauto Op = reinterpret_cast<T*>(Data.Allocate(Size));\n")
+    output_file.write("\t\tmemset(Op, 0, Size);\n")
+    output_file.write("\t\tOp->Header.Op = T2;\n")
+    output_file.write("\t\treturn IRPair<T>{Op, CreateNode(&Op->Header)};\n")
+    output_file.write("\t}\n\n")
+
+    output_file.write("\tuint8_t GetOpSize(OrderedNode *Op) const {\n")
+    output_file.write("\t\tauto HeaderOp = Op->Header.Value.GetNode(Data.Begin());\n")
+    output_file.write("\t\treturn HeaderOp->Size;\n")
+    output_file.write("\t}\n\n")
+
+    output_file.write("\tuint8_t GetOpElements(OrderedNode *Op) const {\n")
+    output_file.write("\t\tauto HeaderOp = Op->Header.Value.GetNode(Data.Begin());\n")
+    output_file.write("\t\tLogMan::Throw::A(HeaderOp->HasDest, \"Op %s has no dest\\n\", GetName(HeaderOp->Op));\n")
+    output_file.write("\t\treturn HeaderOp->Size / HeaderOp->ElementSize;\n")
+    output_file.write("\t}\n\n")
+
+    output_file.write("\tbool OpHasDest(OrderedNode *Op) const {\n")
+    output_file.write("\t\tauto HeaderOp = Op->Header.Value.GetNode(Data.Begin());\n")
+    output_file.write("\t\treturn HeaderOp->HasDest;\n")
+    output_file.write("\t}\n\n")
+
+    # Generate helpers with operands
+    for op_key, op_vals in ops.items():
+        if not ("Last" in op_vals):
+            SSAArgs = 0
+            HasArgs = False
+            HasHelperArgs = False
+            HasDest = False
+            HasFixedDestSize = False
+            FixedDestSize = 0
+            HasDestSize = False;
+            NumElements = "1"
+            DestSize = ""
+
+            if ("SSAArgs" in op_vals):
+                SSAArgs = int(op_vals["SSAArgs"])
+
+            if ("Args" in op_vals and len(op_vals["Args"]) != 0):
+                HasArgs = True
+
+            if ("HelperArgs" in op_vals and len(op_vals["HelperArgs"]) != 0):
+                HasHelperArgs = True
+
+            if ("HelperGen" in op_vals and op_vals["HelperGen"] == False):
+                continue;
+
+            if ("HasDest" in op_vals and op_vals["HasDest"] == True):
+                HasDest = True
+
+            if ("FixedDestSize" in op_vals):
+                HasFixedDestSize = True
+                FixedDestSize = int(op_vals["FixedDestSize"])
+
+            if ("DestSize" in op_vals):
+                HasDestSize = True
+                DestSize = op_vals["DestSize"]
+
+            if ("NumElements" in op_vals):
+                NumElements = op_vals["NumElements"]
+
+            output_file.write("\tIRPair<IROp_%s> _%s(" % (op_key, op_key))
+
+            # Output SSA args first
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    LastArg = (SSAArgs - i - 1) == 0 and not (HasArgs or HasHelperArgs)
+                    CondArg2 = (", ", "")
+                    output_file.write("OrderedNode *ssa%d%s" % (i, CondArg2[LastArg]))
+
+            if (HasArgs or HasHelperArgs):
+                ArgCount = 0
+                Args = []
+                if (HasArgs):
+                    ArgCount += len(op_vals["Args"])
+                    Args += op_vals["Args"]
+
+                if (HasHelperArgs):
+                    ArgCount += len(op_vals["HelperArgs"])
+                    Args += op_vals["HelperArgs"]
+
+                for i in range(0, ArgCount, 2):
+                    data_type = Args[i]
+                    data_name = Args[i+1]
+                    LastArg = (ArgCount - i - 2) == 0
+                    CondArg2 = (", ", "")
+
+                    output_file.write("%s %s%s" % (data_type, data_name, CondArg2[LastArg]))
+
+            output_file.write(") {\n")
+
+            output_file.write("\t\tauto Op = AllocateOp<IROp_%s, IROps::OP_%s>();\n" % (op_key, op_key.upper()))
+            output_file.write("\t\tOp.first->Header.NumArgs = %d;\n" % (SSAArgs))
+
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    output_file.write("\t\tOp.first->Header.Args[%d] = ssa%d->Wrapped(ListData.Begin());\n" % (i, i))
+                    output_file.write("\t\tssa%d->AddUse();\n" % (i))
+
+            if (HasArgs):
+                for i in range(1, len(op_vals["Args"]), 2):
+                    data_name = op_vals["Args"][i]
+                    output_file.write("\t\tOp.first->%s = %s;\n" % (data_name, data_name))
+
+            if (HasFixedDestSize):
+                output_file.write("\t\tOp.first->Header.Size = %d;\n" % FixedDestSize)
+            if (HasDestSize):
+                output_file.write("\t\tOp.first->Header.Size = %s;\n" % DestSize)
+
+            if (HasDest):
+                # We can only infer a size if we have arguments
+                if not (HasFixedDestSize or HasDestSize):
+                    # We need to infer destination size
+                    output_file.write("\t\tuint8_t InferSize = 0;\n")
+                    if (SSAArgs != 0):
+                        for i in range(0, SSAArgs):
+                            output_file.write("\t\tuint8_t Size%d = GetOpSize(ssa%s);\n" % (i, i))
+                            output_file.write("\t\tInferSize = std::max(InferSize, Size%d);\n" % (i))
+
+                    output_file.write("\t\tOp.first->Header.Size = InferSize;\n")
+
+            output_file.write("\t\tOp.first->Header.ElementSize = Op.first->Header.Size / (%s);\n" % NumElements)
+
+            if (HasDest):
+                output_file.write("\t\tOp.first->Header.HasDest = true;\n")
+
+            output_file.write("\t\treturn Op;\n")
+            output_file.write("\t}\n\n")
+
+    output_file.write("#undef IROP_ALLOCATE_HELPERS\n")
+    output_file.write("#endif\n")
+
+
+# IR parser allocators
+def print_ir_parser_allocator_helpers(ops, defines):
+    output_file.write("#ifdef IROP_PARSER_ALLOCATE_HELPERS\n")
+
+    # Generate helpers with operands
+    for op_key, op_vals in ops.items():
+        if not ("Last" in op_vals):
+            SSAArgs = 0
+            HasArgs = False
+            HasDest = False
+            HasFixedDestSize = False
+            FixedDestSize = 0
+            HasDestSize = False;
+            NumElements = "1"
+            DestSize = ""
+
+            if ("SSAArgs" in op_vals):
+                SSAArgs = int(op_vals["SSAArgs"])
+
+            if ("Args" in op_vals and len(op_vals["Args"]) != 0):
+                HasArgs = True
+
+            if ("HelperGen" in op_vals and op_vals["HelperGen"] == False):
+                continue;
+
+            if ("HasDest" in op_vals and op_vals["HasDest"] == True):
+                HasDest = True
+
+            if ("FixedDestSize" in op_vals):
+                HasFixedDestSize = True
+                FixedDestSize = int(op_vals["FixedDestSize"])
+
+            if ("DestSize" in op_vals):
+                HasDestSize = True
+                DestSize = op_vals["DestSize"]
+
+            if ("NumElements" in op_vals):
+                NumElements = op_vals["NumElements"]
+
+            CondArg2 = (", ", "")
+
+            output_file.write("\tIRPair<IROp_%s> _Parser_%s(FEXCore::IR::TypeDefinition _ParsedSize%s" %
+                (op_key, op_key, CondArg2[(0 if (HasArgs or SSAArgs != 0) else 1)]))
+
+            # Output SSA args first
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    LastArg = (SSAArgs - i - 1) == 0 and not (HasArgs)
+                    output_file.write("OrderedNode *ssa%d%s" % (i, CondArg2[LastArg]))
+
+            if (HasArgs):
+                ArgCount = 0
+                Args = []
+                if (HasArgs):
+                    ArgCount += len(op_vals["Args"])
+                    Args += op_vals["Args"]
+
+                for i in range(0, ArgCount, 2):
+                    data_type = Args[i]
+                    data_name = Args[i+1]
+                    LastArg = (ArgCount - i - 2) == 0
+
+                    output_file.write("%s %s%s" % (data_type, data_name, CondArg2[LastArg]))
+
+            output_file.write(") {\n")
+
+            output_file.write("\t\tauto Op = AllocateOp<IROp_%s, IROps::OP_%s>();\n" % (op_key, op_key.upper()))
+            output_file.write("\t\tOp.first->Header.NumArgs = %d;\n" % (SSAArgs))
+
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    output_file.write("\t\tOp.first->Header.Args[%d] = ssa%d->Wrapped(ListData.Begin());\n" % (i, i))
+                    output_file.write("\t\tssa%d->AddUse();\n" % (i))
+
+            if (HasArgs):
+                for i in range(1, len(op_vals["Args"]), 2):
+                    data_name = op_vals["Args"][i]
+                    output_file.write("\t\tOp.first->%s = %s;\n" % (data_name, data_name))
+
+            output_file.write("\t\tOp.first->Header.Size = _ParsedSize.Bytes() * _ParsedSize.Elements();\n")
+            output_file.write("\t\tOp.first->Header.ElementSize = _ParsedSize.Bytes();\n")
+
+            if (HasDest):
+                output_file.write("\t\tOp.first->Header.HasDest = true;\n")
+
+            output_file.write("\t\treturn Op;\n")
+            output_file.write("\t}\n\n")
+
+    output_file.write("#undef IROP_PARSER_ALLOCATE_HELPERS\n")
+    output_file.write("#endif\n")
+
+# IR parser switch statement generation
+def print_ir_parser_switch_helper(ops, defines):
+    output_file.write("#ifdef IROP_PARSER_SWITCH_HELPERS\n")
+
+    # Generate helpers with operands
+    for op_key, op_vals in ops.items():
+        if not ("Last" in op_vals):
+            SSAArgs = 0
+            HasArgs = False
+            HasDest = False
+            HasFixedDestSize = False
+            FixedDestSize = 0
+            HasDestSize = False;
+            NumElements = "1"
+            DestSize = ""
+
+            if ("SSAArgs" in op_vals):
+                SSAArgs = int(op_vals["SSAArgs"])
+
+            if ("Args" in op_vals and len(op_vals["Args"]) != 0):
+                HasArgs = True
+
+            if ("SwitchGen" in op_vals and op_vals["SwitchGen"] == False):
+                continue;
+
+            if ("HasDest" in op_vals and op_vals["HasDest"] == True):
+                HasDest = True
+
+            if ("FixedDestSize" in op_vals):
+                HasFixedDestSize = True
+                FixedDestSize = int(op_vals["FixedDestSize"])
+
+            if ("DestSize" in op_vals):
+                HasDestSize = True
+                DestSize = op_vals["DestSize"]
+
+            if ("NumElements" in op_vals):
+                NumElements = op_vals["NumElements"]
+
+            CondArg2 = (", ", "")
+
+            output_file.write("\tcase FEXCore::IR::IROps::OP_%s: {\n" % (op_key.upper()))
+
+            # Output SSA args first
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    output_file.write("\t\tauto ssa_arg%d = DecodeValue<OrderedNode*>(Def.Args[%d]);\n" % (i, i))
+                    output_file.write("\t\tif (!CheckPrintError(Def, ssa_arg%d.first)) return false;\n" % (i))
+
+            if (HasArgs):
+                ArgCount = 0
+                Args = []
+                if (HasArgs):
+                    ArgCount += len(op_vals["Args"])
+                    Args += op_vals["Args"]
+
+                for i in range(0, ArgCount, 2):
+                    data_type = Args[i]
+                    data_name = Args[i+1]
+                    LastArg = (ArgCount - i - 2) == 0
+
+                    output_file.write("\t\tauto arg%d = DecodeValue<%s>(Def.Args[%d]);\n" % (SSAArgs + (i / 2), data_type, SSAArgs + (i / 2)))
+                    output_file.write("\t\tif (!CheckPrintError(Def, arg%d.first)) return false;\n" % (SSAArgs + (i / 2)))
+
+            output_file.write("\t\tDef.Node = _Parser_%s(Def.Size\n" % (op_key))
+
+            if (SSAArgs != 0):
+                for i in range(0, SSAArgs):
+                    output_file.write("\t\t, ssa_arg%d.second\n" % (i))
+
+            if (HasArgs):
+                ArgCount = 0
+                Args = []
+                if (HasArgs):
+                    ArgCount += len(op_vals["Args"])
+                    Args += op_vals["Args"]
+
+                for i in range(0, ArgCount, 2):
+                    data_type = Args[i]
+                    data_name = Args[i+1]
+                    LastArg = (ArgCount - i - 2) == 0
+
+                    output_file.write("\t\t, arg%d.second\n" % (SSAArgs + (i / 2)))
+
+            output_file.write("\t\t);\n")
+
+            output_file.write("\t\tSSANameMapper[Def.Definition] = Def.Node;\n")
+
+            output_file.write("\t\tbreak;\n")
+            output_file.write("\t}\n")
+
+    output_file.write("#undef IROP_PARSER_SWITCH_HELPERS\n")
+    output_file.write("#endif\n")
+if (len(sys.argv) < 3):
+    sys.exit()
+
+output_filename = sys.argv[2]
+json_file = open(sys.argv[1], "r")
+json_text = json_file.read()
+json_file.close()
+
+json_object = json.loads(json_text)
+json_object = {k.upper(): v for k, v in json_object.items()}
+
+ops = json_object["OPS"]
+defines = json_object["DEFINES"]
+
+output_file = open(output_filename, "w")
+
+print_enums(ops, defines)
+print_ir_structs(ops, defines)
+print_ir_sizes(ops, defines)
+print_ir_reg_classes(ops, defines)
+print_ir_getname(ops, defines)
+print_ir_getraargs(ops, defines)
+print_ir_hassideeffects(ops, defines)
+print_ir_arg_printer(ops, defines)
+print_ir_allocator_helpers(ops, defines)
+print_ir_parser_allocator_helpers(ops, defines)
+print_ir_parser_switch_helper(ops, defines)
+
+output_file.close()

External/FEXCore/Source/CMakeLists.txt

@@ -0,0 +1,320 @@
+set (MAN_DIR ${CMAKE_INSTALL_PREFIX}/share/man CACHE PATH "MAN_DIR")
+
+set (SRCS
+  Common/Paths.cpp
+  Common/JitSymbols.cpp
+  Common/NetStream.cpp
+  Common/SoftFloat-3e/extF80_add.c
+  Common/SoftFloat-3e/extF80_div.c
+  Common/SoftFloat-3e/extF80_sub.c
+  Common/SoftFloat-3e/extF80_mul.c
+  Common/SoftFloat-3e/extF80_rem.c
+  Common/SoftFloat-3e/extF80_sqrt.c
+  Common/SoftFloat-3e/s_add128.c
+  Common/SoftFloat-3e/s_sub128.c
+  Common/SoftFloat-3e/s_le128.c
+  Common/SoftFloat-3e/extF80_to_i32.c
+  Common/SoftFloat-3e/extF80_to_i64.c
+  Common/SoftFloat-3e/extF80_to_ui64.c
+  Common/SoftFloat-3e/extF80_to_f32.c
+  Common/SoftFloat-3e/extF80_to_f64.c
+  Common/SoftFloat-3e/i32_to_extF80.c
+  Common/SoftFloat-3e/ui64_to_extF80.c
+  Common/SoftFloat-3e/extF80_to_f128.c
+  Common/SoftFloat-3e/f128_to_extF80.c
+  Common/SoftFloat-3e/s_roundToUI64.c
+  Common/SoftFloat-3e/s_f128UIToCommonNaN.c
+  Common/SoftFloat-3e/s_commonNaNToF128UI.c
+  Common/SoftFloat-3e/s_shortShiftRight128.c
+  Common/SoftFloat-3e/s_normSubnormalF128Sig.c
+  Common/SoftFloat-3e/s_roundToI32.c
+  Common/SoftFloat-3e/s_roundToI64.c
+  Common/SoftFloat-3e/s_roundPackToF32.c
+  Common/SoftFloat-3e/s_addMagsExtF80.c
+  Common/SoftFloat-3e/s_extF80UIToCommonNaN.c
+  Common/SoftFloat-3e/s_commonNaNToF32UI.c
+  Common/SoftFloat-3e/s_commonNaNToF64UI.c
+  Common/SoftFloat-3e/s_shortShiftRightJam64.c
+  Common/SoftFloat-3e/s_shortShiftRightJam64Extra.c
+  Common/SoftFloat-3e/s_shiftRightJam64Extra.c
+  Common/SoftFloat-3e/s_shortShiftRightJam64Extra.c
+  Common/SoftFloat-3e/s_roundPackToF64.c
+  Common/SoftFloat-3e/s_propagateNaNExtF80UI.c
+  Common/SoftFloat-3e/s_roundPackToExtF80.c
+  Common/SoftFloat-3e/s_normSubnormalExtF80Sig.c
+  Common/SoftFloat-3e/s_shiftRightJam64.c
+  Common/SoftFloat-3e/s_subMagsExtF80.c
+  Common/SoftFloat-3e/s_shiftRightJam32.c
+  Common/SoftFloat-3e/s_shiftRightJam128.c
+  Common/SoftFloat-3e/s_shiftRightJam128Extra.c
+  Common/SoftFloat-3e/s_normRoundPackToExtF80.c
+  Common/SoftFloat-3e/s_shortShiftLeft128.c
+  Common/SoftFloat-3e/s_approxRecip32_1.c
+  Common/SoftFloat-3e/s_approxRecip_1Ks.c
+  Common/SoftFloat-3e/s_approxRecipSqrt32_1.c
+  Common/SoftFloat-3e/s_approxRecipSqrt_1Ks.c
+  Common/SoftFloat-3e/softfloat_raiseFlags.c
+  Common/SoftFloat-3e/softfloat_state.c
+  Common/SoftFloat-3e/f64_to_extF80.c
+  Common/SoftFloat-3e/s_commonNaNToExtF80UI.c
+  Common/SoftFloat-3e/s_normSubnormalF64Sig.c
+  Common/SoftFloat-3e/s_f64UIToCommonNaN.c
+  Common/SoftFloat-3e/extF80_roundToInt.c
+  Common/SoftFloat-3e/extF80_eq.c
+  Common/SoftFloat-3e/extF80_lt.c
+  Common/SoftFloat-3e/s_lt128.c
+  Common/SoftFloat-3e/s_mul64ByShifted32To128.c
+  Common/SoftFloat-3e/s_mul64To128.c
+  Common/SoftFloat-3e/s_countLeadingZeros8.c
+  Common/SoftFloat-3e/s_countLeadingZeros32.c
+  Common/SoftFloat-3e/s_countLeadingZeros64.c
+  Common/SoftFloat-3e/f32_to_extF80.c
+  Common/SoftFloat-3e/s_normSubnormalF32Sig.c
+  Common/SoftFloat-3e/s_f32UIToCommonNaN.c
+  Interface/Config/Config.cpp
+  Interface/Context/Context.cpp
+  Interface/Core/LookupCache.cpp
+  Interface/Core/BlockSamplingData.cpp
+  Interface/Core/CompileService.cpp
+  Interface/Core/Core.cpp
+  Interface/Core/CPUID.cpp
+  Interface/Core/Frontend.cpp
+  Interface/Core/GdbServer.cpp
+  Interface/Core/HostFeatures.cpp
+  Interface/Core/OpcodeDispatcher.cpp
+  Interface/Core/X86Tables.cpp
+  Interface/Core/X86DebugInfo.cpp
+  Interface/Core/X86HelperGen.cpp
+  Interface/Core/ArchHelpers/Arm64_stubs.cpp
+  Interface/Core/ArchHelpers/Arm64Emitter.cpp
+  Interface/Core/Dispatcher/Dispatcher.cpp
+  Interface/Core/Dispatcher/X86Dispatcher.cpp
+  Interface/Core/Dispatcher/Arm64Dispatcher.cpp
+  Interface/Core/Interpreter/InterpreterCore.cpp
+  Interface/Core/Interpreter/InterpreterOps.cpp
+  Interface/Core/X86Tables/BaseTables.cpp
+  Interface/Core/X86Tables/DDDTables.cpp
+  Interface/Core/X86Tables/EVEXTables.cpp
+  Interface/Core/X86Tables/H0F38Tables.cpp
+  Interface/Core/X86Tables/H0F3ATables.cpp
+  Interface/Core/X86Tables/PrimaryGroupTables.cpp
+  Interface/Core/X86Tables/SecondaryGroupTables.cpp
+  Interface/Core/X86Tables/SecondaryModRMTables.cpp
+  Interface/Core/X86Tables/SecondaryTables.cpp
+  Interface/Core/X86Tables/VEXTables.cpp
+  Interface/Core/X86Tables/X87Tables.cpp
+  Interface/Core/X86Tables/XOPTables.cpp
+  Interface/HLE/Thunks/Thunks.cpp
+  Interface/IR/IRDumper.cpp
+  Interface/IR/IRParser.cpp
+  Interface/IR/IREmitter.cpp
+  Interface/IR/PassManager.cpp
+  Interface/IR/Passes/ConstProp.cpp
+  Interface/IR/Passes/DeadCodeElimination.cpp
+  Interface/IR/Passes/DeadContextStoreElimination.cpp
+  Interface/IR/Passes/IRCompaction.cpp
+  Interface/IR/Passes/IRValidation.cpp
+  Interface/IR/Passes/ValueDominanceValidation.cpp
+  Interface/IR/Passes/PhiValidation.cpp
+  Interface/IR/Passes/RedundantFlagCalculationElimination.cpp
+  Interface/IR/Passes/DeadStoreElimination.cpp
+  Interface/IR/Passes/StaticRegisterAllocationPass.cpp
+  Interface/IR/Passes/RegisterAllocationPass.cpp
+  Interface/IR/Passes/SyscallOptimization.cpp
+  Utils/ELFLoader.cpp
+  Utils/ELFSymbolDatabase.cpp
+  Utils/LogManager.cpp
+  Utils/Threads.cpp
+  )
+
+if(_M_ARM_64)
+  list(APPEND SRCS
+    Interface/Core/ArchHelpers/Arm64.cpp)
+endif()
+
+set(DEFINES )
+
+if (_M_X86_64)
+  list(APPEND DEFINES -D_M_X86_64=1)
+endif()
+
+if (_M_ARM_64)
+  list(APPEND DEFINES -D_M_ARM_64=1)
+endif()
+
+if (ENABLE_JIT_X86_64)
+  list(APPEND SRCS
+    Interface/Core/JIT/x86_64/JIT.cpp
+    Interface/Core/JIT/x86_64/ALUOps.cpp
+    Interface/Core/JIT/x86_64/AtomicOps.cpp
+    Interface/Core/JIT/x86_64/BranchOps.cpp
+    Interface/Core/JIT/x86_64/ConversionOps.cpp
+    Interface/Core/JIT/x86_64/EncryptionOps.cpp
+    Interface/Core/JIT/x86_64/FlagOps.cpp
+    Interface/Core/JIT/x86_64/MemoryOps.cpp
+    Interface/Core/JIT/x86_64/MiscOps.cpp
+    Interface/Core/JIT/x86_64/MoveOps.cpp
+    Interface/Core/JIT/x86_64/VectorOps.cpp)
+  list(APPEND DEFINES -DJIT_X86_64)
+endif()
+
+if (ENABLE_JIT_ARM64)
+  list(APPEND DEFINES -DJIT_ARM64)
+  list(APPEND SRCS
+    Interface/Core/JIT/Arm64/JIT.cpp
+    Interface/Core/JIT/Arm64/ALUOps.cpp
+    Interface/Core/JIT/Arm64/AtomicOps.cpp
+    Interface/Core/JIT/Arm64/BranchOps.cpp
+    Interface/Core/JIT/Arm64/ConversionOps.cpp
+    Interface/Core/JIT/Arm64/EncryptionOps.cpp
+    Interface/Core/JIT/Arm64/FlagOps.cpp
+    Interface/Core/JIT/Arm64/MemoryOps.cpp
+    Interface/Core/JIT/Arm64/MiscOps.cpp
+    Interface/Core/JIT/Arm64/MoveOps.cpp
+    Interface/Core/JIT/Arm64/VectorOps.cpp)
+endif()
+
+if (ENABLE_JITSYMBOLS)
+  list(APPEND DEFINES -DENABLE_JITSYMBOLS=1)
+endif()
+
+# Generate IR include file
+set(OUTPUT_IR_FOLDER "${CMAKE_BINARY_DIR}/include/FEXCore/IR")
+set(OUTPUT_NAME "${OUTPUT_IR_FOLDER}/IRDefines.inc")
+set(INPUT_NAME "${CMAKE_CURRENT_SOURCE_DIR}/Interface/IR/IR.json")
+
+add_custom_target(CREATE_IR_FOLDER ALL
+  COMMAND ${CMAKE_COMMAND} -E make_directory "${OUTPUT_IR_FOLDER}")
+
+add_custom_command(
+  OUTPUT "${OUTPUT_NAME}"
+  DEPENDS "${INPUT_NAME}"
+  DEPENDS CREATE_IR_FOLDER
+  DEPENDS "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_generator.py"
+  COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_generator.py" "${INPUT_NAME}" "${OUTPUT_NAME}"
+  )
+
+set_source_files_properties(${OUTPUT_NAME} PROPERTIES
+  GENERATED TRUE)
+
+# Generate IR documentation
+set(OUTPUT_IR_DOC "${CMAKE_BINARY_DIR}/IR.md")
+
+add_custom_command(
+  OUTPUT "${OUTPUT_IR_DOC}"
+  DEPENDS "${INPUT_NAME}"
+  DEPENDS CREATE_IR_FOLDER
+  DEPENDS "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_doc_generator.py"
+  COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_doc_generator.py" "${INPUT_NAME}" "${OUTPUT_IR_DOC}"
+  )
+
+set_source_files_properties(${OUTPUT_IR_NAME} PROPERTIES
+  GENERATED TRUE)
+
+# Create the target
+add_custom_target(IR_INC
+  DEPENDS "${OUTPUT_NAME}"
+  DEPENDS "${OUTPUT_IR_DOC}")
+
+# Generate the configuration include file
+set(OUTPUT_CONFIG_FOLDER "${CMAKE_BINARY_DIR}/include/FEXCore/Config")
+set(OUTPUT_CONFIG_NAME "${OUTPUT_CONFIG_FOLDER}/ConfigValues.inl")
+set(OUTPUT_CONFIG_OPTION_NAME "${OUTPUT_CONFIG_FOLDER}/ConfigOptions.inl")
+set(INPUT_CONFIG_NAME "${CMAKE_CURRENT_SOURCE_DIR}/Interface/Config/Config.json")
+set(OUTPUT_MAN_NAME "${CMAKE_BINARY_DIR}/generated/FEX.1")
+
+add_custom_target(CREATE_CONFIG_FOLDER ALL
+  COMMAND ${CMAKE_COMMAND} -E make_directory "${OUTPUT_CONFIG_FOLDER}")
+
+add_custom_command(
+  OUTPUT "${OUTPUT_CONFIG_NAME}"
+  OUTPUT "${OUTPUT_CONFIG_OPTION_NAME}"
+  OUTPUT "${OUTPUT_MAN_NAME}"
+  DEPENDS "${INPUT_CONFIG_NAME}"
+  DEPENDS CREATE_CONFIG_FOLDER
+  DEPENDS "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/config_generator.py"
+  COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/config_generator.py" "${INPUT_CONFIG_NAME}" "${OUTPUT_CONFIG_NAME}" "${OUTPUT_MAN_NAME}"
+  "${OUTPUT_CONFIG_OPTION_NAME}"
+  )
+
+set_source_files_properties(${OUTPUT_CONFIG_NAME} PROPERTIES
+  GENERATED TRUE)
+set_source_files_properties(${OUTPUT_CONFIG_OPTION_NAME} PROPERTIES
+  GENERATED TRUE)
+
+set_source_files_properties(${OUTPUT_MAN_NAME} PROPERTIES
+  GENERATED TRUE)
+
+# Create the target
+add_custom_target(CONFIG_INC
+  DEPENDS "${OUTPUT_CONFIG_NAME}"
+  DEPENDS "${OUTPUT_CONFIG_OPTION_NAME}"
+  DEPENDS "${OUTPUT_MAN_NAME}")
+
+# Install the man page
+install(FILES ${OUTPUT_MAN_NAME} DESTINATION ${MAN_DIR}/man1)
+
+# Add in diagnostic colours if the option is available.
+# Ninja code generator will kill colours if this isn't here
+check_cxx_compiler_flag(-fdiagnostics-color=always GCC_COLOR)
+check_cxx_compiler_flag(-fcolor-diagnostics CLANG_COLOR)
+
+function(AddObject Name Type)
+  add_library(${Name} ${Type} ${SRCS})
+  add_dependencies(${Name} IR_INC)
+  add_dependencies(${Name} CONFIG_INC)
+
+  target_link_libraries(${Name} pthread rt vixl ${LINUX_LIBS} dl)
+  set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore)
+
+  target_include_directories(${Name} PUBLIC "${CMAKE_CURRENT_BINARY_DIR}")
+
+  target_include_directories(${Name} PRIVATE IncludePrivate/)
+  target_include_directories(${Name} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/)
+
+  target_include_directories(${Name} PUBLIC "${PROJECT_SOURCE_DIR}/include/")
+  target_include_directories(${Name} PUBLIC "${CMAKE_BINARY_DIR}/include/")
+
+  target_compile_definitions(${Name} PRIVATE ${DEFINES})
+
+  target_compile_options(${Name}
+    PRIVATE
+    -Wall
+    -Werror=implicit-fallthrough
+
+    -Wno-trigraphs
+  )
+
+  if (GCC_COLOR)
+    target_compile_options(${Name}
+      PRIVATE
+      "-fdiagnostics-color=always")
+  endif()
+  if (CLANG_COLOR)
+    target_compile_options(${Name}
+      PRIVATE
+      "-fcolor-diagnostics")
+  endif()
+endfunction()
+
+function(AddLibrary Name Type)
+  add_library(${Name} ${Type} $<TARGET_OBJECTS:${PROJECT_NAME}_object>)
+  target_link_libraries(${Name} pthread rt vixl ${LINUX_LIBS} dl)
+  set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore)
+
+  target_include_directories(${Name} PUBLIC "${CMAKE_CURRENT_BINARY_DIR}")
+  target_include_directories(${Name} PUBLIC "${PROJECT_SOURCE_DIR}/include/")
+  target_include_directories(${Name} PUBLIC "${CMAKE_BINARY_DIR}/include/")
+endfunction()
+
+AddObject(${PROJECT_NAME}_object OBJECT)
+AddLibrary(${PROJECT_NAME} STATIC)
+AddLibrary(${PROJECT_NAME}_shared SHARED)
+
+install(TARGETS ${PROJECT_NAME} ${PROJECT_NAME}_shared
+  LIBRARY
+    DESTINATION lib
+    COMPONENT Libraries
+  ARCHIVE
+    DESTINATION lib
+    COMPONENT Libraries)

External/FEXCore/Source/Common/BitSet.h

@@ -1,36 +1,31 @@
-// SPDX-License-Identifier: MIT
 #pragma once
-
-#include <FEXCore/Utils/Allocator.h>
-#include <FEXCore/Utils/MathUtils.h>
+#include "Common/MathUtils.h"
 #include <FEXCore/Utils/LogManager.h>
 
-#include <cstdint>
-#include <cstdlib>
 #include <cstring>
+#include <stdint.h>
+#include <stdlib.h>
 #include <type_traits>
 
-namespace FEXCore {
-
 template<typename T>
 struct BitSet final {
   using ElementType = T;
   constexpr static size_t MinimumSize = sizeof(ElementType);
   constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;
 
-  ElementType* Memory;
+  ElementType *Memory;
   void Allocate(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
-    LOGMAN_THROW_A_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
-    Memory = static_cast<ElementType*>(FEXCore::Allocator::malloc(AllocateSize));
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
+    LogMan::Throw::A((AllocateSize * MinimumSize) >= Elements, "Fail");
+    Memory = static_cast<ElementType*>(malloc(AllocateSize));
   }
   void Realloc(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
-    LOGMAN_THROW_A_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
-    Memory = static_cast<ElementType*>(FEXCore::Allocator::realloc(Memory, AllocateSize));
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
+    LogMan::Throw::A((AllocateSize * MinimumSize) >= Elements, "Fail");
+    Memory = static_cast<ElementType*>(realloc(Memory, AllocateSize));
   }
   void Free() {
-    FEXCore::Allocator::free(Memory);
+    free(Memory);
     Memory = nullptr;
   }
   bool Get(T Element) {
@@ -43,13 +38,10 @@ struct BitSet final {
     Memory[Element / MinimumSizeBits] &= (1ULL << (Element % MinimumSizeBits));
   }
   void MemClear(size_t Elements) {
-    memset(Memory, 0, ToBytes(Elements));
+    memset(Memory, 0, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
   }
   void MemSet(size_t Elements) {
-    memset(Memory, 0xFF, ToBytes(Elements));
-  }
-  uint32_t ToBytes(size_t Elements) {
-    return AlignUp(Elements, MinimumSizeBits) / MinimumSize;
+    memset(Memory, 0xFF, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
   }
 
   // This very explicitly doesn't let you take an address
@@ -65,10 +57,11 @@ struct BitSetView final {
   constexpr static size_t MinimumSize = sizeof(ElementType);
   constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;
 
-  ElementType* Memory;
+  ElementType *Memory;
 
-  void GetView(BitSet<T>& Set, uint64_t ElementOffset) {
-    LOGMAN_THROW_A_FMT((ElementOffset % MinimumSize) == 0, "Bitset view offset needs to be aligned to size of backing element");
+  void GetView(BitSet<T> &Set, uint64_t ElementOffset) {
+    LogMan::Throw::A((ElementOffset % MinimumSize) == 0,
+        "Bitset view offset needs to be aligned to size of backing element");
     Memory = &Set.Memory[ElementOffset / MinimumSizeBits];
   }
 
@@ -93,12 +86,11 @@ struct BitSetView final {
   bool operator[](T Element) {
     return Get(Element);
   }
+
 };
 
 static_assert(sizeof(BitSet<uint32_t>) == sizeof(uintptr_t), "Needs to just be a pointer");
-static_assert(std::is_trivially_copyable_v<BitSet<uint32_t>>, "Needs to trivially copyable");
+static_assert(std::is_trivially_copyable<BitSet<uint32_t>>::value, "Needs to trivially copyable");
 
 static_assert(sizeof(BitSetView<uint32_t>) == sizeof(uintptr_t), "Needs to just be a pointer");
-static_assert(std::is_trivially_copyable_v<BitSetView<uint32_t>>, "Needs to trivially copyable");
-
-} // namespace FEXCore
+static_assert(std::is_trivially_copyable<BitSetView<uint32_t>>::value, "Needs to trivially copyable");

External/FEXCore/Source/Common/JitSymbols.cpp

@@ -0,0 +1,45 @@
+#include "Common/JitSymbols.h"
+
+#include <string>
+#include <sstream>
+#include <unistd.h>
+
+namespace FEXCore {
+  JITSymbols::JITSymbols() {
+    std::stringstream PerfMap;
+    PerfMap << "/tmp/perf-" << getpid() << ".map";
+
+    fp = fopen(PerfMap.str().c_str(), "wb");
+    if (fp) {
+      // Disable buffering on this file
+      setvbuf(fp, nullptr, _IONBF, 0);
+    }
+  }
+
+  JITSymbols::~JITSymbols() {
+    if (fp) {
+      fclose(fp);
+    }
+  }
+
+  void JITSymbols::Register(void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    std::stringstream String;
+    String << std::hex << HostAddr << " " << CodeSize << " " << "JIT_0x" << GuestAddr << "_" << HostAddr << std::endl;
+    fwrite(String.str().c_str(), 1, String.str().size(), fp);
+  }
+
+  void JITSymbols::Register(void *HostAddr, uint32_t CodeSize, std::string const &Name) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    std::stringstream String;
+    String << std::hex << HostAddr << " " << CodeSize << " " << Name << "_" << HostAddr << std::endl;
+    fwrite(String.str().c_str(), 1, String.str().size(), fp);
+  }
+}
+

External/FEXCore/Source/Common/JitSymbols.h

@@ -0,0 +1,17 @@
+#pragma once
+#include <cstdint>
+#include <cstdio>
+#include <string>
+
+namespace FEXCore {
+class JITSymbols final {
+public:
+  JITSymbols();
+  ~JITSymbols();
+  void Register(void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize);
+  void Register(void *HostAddr, uint32_t CodeSize, std::string const &Name);
+
+private:
+  FILE* fp{};
+};
+}

External/FEXCore/Source/Common/MathUtils.h

@@ -0,0 +1,13 @@
+#pragma once
+
+#include <stdint.h>
+
+static inline uint64_t AlignUp(uint64_t value, uint64_t size) {
+  return value + (size - value % size) % size;
+};
+
+static inline uint64_t AlignDown(uint64_t value, uint64_t size) {
+  return value - value % size;
+};
+
+

External/FEXCore/Source/Common/NetStream.cpp

@@ -0,0 +1,86 @@
+#include "NetStream.h"
+
+#include <cstring>
+
+#include <sys/types.h>
+#include <sys/socket.h>
+
+#include <stdio.h>
+#include <unistd.h>
+
+int NetStream::NetBuf::flushBuffer(const char *buffer, size_t size) {
+    size_t total = 0;
+
+    // Send data
+    while (total < size) {
+        size_t sent = send(socket, (const void*)(buffer + total), size - total, 0);
+        if (sent == -1) {
+            // lets just assume all errors are end of file.
+            return -1;
+        }
+        total += sent;
+    }
+
+    return 0;
+}
+
+std::streamsize NetStream::NetBuf::xsputn(const char* buffer, std::streamsize size) {
+    size_t buf_remaining = epptr() - pptr();
+
+    // Check if the string fits neatly in our buffer
+    if (size <= buf_remaining) {
+        std::memcpy(pptr(), buffer, size);
+        pbump(size);
+        return size;
+    }
+
+    // Otherwise, flush the buffer first
+    if (sync() < 0) {
+        return traits_type::eof();
+    }
+
+    if (size > sizeof(output_buffer) / 2) {
+        // If we have a large string, bypass the buffer
+        flushBuffer(buffer, size);
+        return size;
+    } else {
+        return xsputn(buffer, size);
+    }
+}
+
+std::streambuf::int_type NetStream::NetBuf::overflow(std::streambuf::int_type ch) {
+    // we always leave room for one extra char
+    *pptr() = (char) ch;
+    pbump(1);
+    return sync();
+}
+
+int NetStream::NetBuf::sync() {
+    // Flush and reset output buffer to zero
+    if(flushBuffer(pbase(), pptr() - pbase()) < 0) {
+        return -1;
+    }
+    reset_output_buffer();
+    return 0;
+}
+
+std::streambuf::int_type NetStream::NetBuf::underflow() {
+    ssize_t size = recv(socket, (void *)std::begin(input_buffer), sizeof(input_buffer), 0);
+
+    if (size <= 0) {
+        setg(nullptr, nullptr, nullptr);
+        return traits_type::eof();
+    }
+
+    setg(&input_buffer[0], &input_buffer[0], &input_buffer[size]);
+
+    return traits_type::to_int_type(*gptr());
+}
+
+NetStream::~NetStream() {
+    delete rdbuf();
+}
+
+NetStream::NetBuf::~NetBuf() {
+  close(socket);
+}

External/FEXCore/Source/Common/NetStream.h

@@ -0,0 +1,41 @@
+#pragma once
+
+#include <array>
+#include <iostream>
+#include <string.h>
+
+class NetStream : public std::iostream {
+public:
+    NetStream(int socketfd) : std::iostream(new NetBuf(socketfd)) {}
+    virtual ~NetStream();
+
+private:
+    class NetBuf : public std::streambuf {
+
+    public:
+        NetBuf(int socketfd) {
+            socket = socketfd;
+            reset_output_buffer();
+        }
+        virtual ~NetBuf();
+
+    protected:
+        virtual std::streamsize xsputn(const char* buffer, std::streamsize size);
+
+        virtual std::streambuf::int_type underflow();
+        virtual std::streambuf::int_type overflow(std::streambuf::int_type ch);
+        virtual int sync();
+
+    private:
+        void reset_output_buffer() {
+            // we always leave room for one extra char
+            setp(std::begin(output_buffer), std::end(output_buffer) -1);
+        }
+
+        int flushBuffer(const char *buffer, size_t size);
+
+        int socket;
+        std::array<char, 1400> output_buffer;
+        std::array<char, 1500> input_buffer; // enough for a typical packet
+    };
+};

External/FEXCore/Source/Common/Paths.cpp

@@ -0,0 +1,50 @@
+#include "Common/Paths.h"
+#include <FEXCore/Utils/LogManager.h>
+
+#include <cstdlib>
+#include <filesystem>
+#include <sys/stat.h>
+
+namespace FEXCore::Paths {
+  std::string CachePath;
+  std::string EntryCache;
+
+  void InitializePaths() {
+    char const *HomeDir = getenv("HOME");
+
+    if (!HomeDir) {
+      HomeDir = getenv("PWD");
+    }
+
+    if (!HomeDir) {
+      HomeDir = ".";
+    }
+
+    char *XDGDataDir = getenv("XDG_DATA_DIR");
+    if (XDGDataDir) {
+      CachePath = XDGDataDir;
+    }
+    else {
+      if (HomeDir) {
+        CachePath = HomeDir;
+      }
+    }
+
+    CachePath += "/.fex-emu/";
+    EntryCache = CachePath + "/EntryCache/";
+
+    // Ensure the folder structure is created for our Data
+    if (!std::filesystem::exists(EntryCache) &&
+        !std::filesystem::create_directories(EntryCache)) {
+      LogMan::Msg::D("Couldn't create EntryCache directory: '%s'", EntryCache.c_str());
+    }
+  }
+
+  std::string GetCachePath() {
+    return CachePath;
+  }
+
+  std::string GetEntryCachePath() {
+    return EntryCache;
+  }
+}

External/FEXCore/Source/Common/Paths.h

@@ -0,0 +1,8 @@
+#pragma once
+#include <string>
+
+namespace FEXCore::Paths {
+  void InitializePaths();
+  std::string GetCachePath();
+  std::string GetEntryCachePath();
+}

External/FEXCore/Source/Common/SoftFloat-3e/extF80_add.c

@@ -40,8 +40,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "internals.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -53,7 +52,7 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
     bool signB;
     extFloat80_t
         (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 
     uA.f = a;
     uiA64 = uA.s.signExp;
@@ -65,6 +64,6 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
     signB = signExtF80UI64( uiB64 );
     magsFuncPtr =
         (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_div.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -107,7 +106,7 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
     if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
         if ( ! sigB ) {
             if ( ! sigA ) goto invalid;
-            softfloat_raiseFlags( state, softfloat_flag_infinite );
+            softfloat_raiseFlags( softfloat_flag_infinite );
             goto infinity;
         }
         normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
@@ -169,18 +168,18 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
     sigZExtra = (uint64_t) ((uint_fast64_t) q<<41);
     return
         softfloat_roundPackToExtF80(
-            state, signZ, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_eq.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_eq( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -62,7 +61,7 @@ bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
                softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
             || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
         ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
         }
         return false;
     }

External/FEXCore/Source/Common/SoftFloat-3e/extF80_lt.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_lt( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -59,7 +58,7 @@ bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
     uiB64 = uB.s.signExp;
     uiB0  = uB.s.signif;
     if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return false;
     }
     signA = signExtF80UI64( uiA64 );

External/FEXCore/Source/Common/SoftFloat-3e/extF80_mul.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -125,11 +124,11 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
     }
     return
         softfloat_roundPackToExtF80(
-            state, signZ, expZ, sig128Z.v64, sig128Z.v0, state->roundingPrecision );
+            signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
@@ -137,7 +136,7 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
     *------------------------------------------------------------------------*/
  infArg:
     if ( ! magBits ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         uiZ64 = defaultNaNExtF80UI64;
         uiZ0  = defaultNaNExtF80UI0;
     } else {

External/FEXCore/Source/Common/SoftFloat-3e/extF80_rem.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -193,18 +192,18 @@ extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat
     }
     return
         softfloat_normRoundPackToExtF80(
-            state, signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
+            signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_roundToInt.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
- extF80_roundToInt( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64, signUI64;
@@ -80,7 +79,7 @@ extFloat80_t
     if ( 0x403E <= exp ) {
         if ( exp == 0x7FFF ) {
             if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-                uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, sigA, 0, 0 );
+                uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 );
                 uiZ64 = uiZ.v64;
                 sigZ  = uiZ.v0;
                 goto uiZ;
@@ -93,7 +92,7 @@ extFloat80_t
         goto uiZ;
     }
     if ( exp <= 0x3FFE ) {
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
         switch ( roundingMode ) {
          case softfloat_round_near_even:
             if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;
@@ -145,7 +144,7 @@ extFloat80_t
 #ifdef SOFTFLOAT_ROUND_ODD
         if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
     }
  uiZ:
     uZ.s.signExp = uiZ64;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_sqrt.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
+extFloat80_t extF80_sqrt( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -74,7 +73,7 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( expA == 0x7FFF ) {
         if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, 0, 0 );
+            uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;
             goto uiZ;
@@ -155,11 +154,11 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
     }
     return
         softfloat_roundPackToExtF80(
-            state, 0, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            0, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_sub.c

@@ -40,8 +40,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "internals.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -54,7 +53,7 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
 #if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
     extFloat80_t
         (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 #endif
 
     uA.f = a;
@@ -67,14 +66,14 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
     signB = signExtF80UI64( uiB64 );
 #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
     if ( signA == signB ) {
-        return softfloat_subMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
     } else {
-        return softfloat_addMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
     }
 #else
     magsFuncPtr =
         (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 #endif
 
 }

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f128.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
+float128_t extF80_to_f128( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -61,7 +60,7 @@ float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
     exp = expExtF80UI64( uiA64 );
     frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
     if ( (exp == 0x7FFF) && frac ) {
-        softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+        softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
         uiZ = softfloat_commonNaNToF128UI( &commonNaN );
     } else {
         sign = signExtF80UI64( uiA64 );

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f32.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
+float32_t extF80_to_f32( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -66,7 +65,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToF32UI( &commonNaN );
         } else {
             uiZ = packToF32UI( sign, 0xFF, 0 );
@@ -86,7 +85,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
     if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
         if ( exp < -0x1000 ) exp = -0x1000;
     }
-    return softfloat_roundPackToF32( state, sign, exp, sig32 );
+    return softfloat_roundPackToF32( sign, exp, sig32 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f64.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
+float64_t extF80_to_f64( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -72,7 +71,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToF64UI( &commonNaN );
         } else {
             uiZ = packToF64UI( sign, 0x7FF, 0 );
@@ -86,7 +85,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
     if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
         if ( exp < -0x1000 ) exp = -0x1000;
     }
-    return softfloat_roundPackToF64( state, sign, exp, sig );
+    return softfloat_roundPackToF64( sign, exp, sig );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_i32.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 int_fast32_t
- extF80_to_i32( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -68,7 +67,7 @@ int_fast32_t
 #elif (i32_fromNaN == i32_fromNegOverflow)
         sign = 1;
 #else
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return i32_fromNaN;
 #endif
     }
@@ -78,7 +77,7 @@ int_fast32_t
     shiftDist = 0x4032 - exp;
     if ( shiftDist <= 0 ) shiftDist = 1;
     sig = softfloat_shiftRightJam64( sig, shiftDist );
-    return softfloat_roundToI32( state, sign, sig, roundingMode, exact );
+    return softfloat_roundToI32( sign, sig, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_i64.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
- extF80_to_i64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -68,7 +67,7 @@ int_fast64_t
         /*--------------------------------------------------------------------
         *--------------------------------------------------------------------*/
         if ( shiftDist ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
             return
                 (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                     ? i64_fromNaN
@@ -84,7 +83,7 @@ int_fast64_t
         sig = sig64Extra.v;
         sigExtra = sig64Extra.extra;
     }
-    return softfloat_roundToI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_ui64.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast64_t
- extF80_to_ui64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -65,7 +64,7 @@ uint_fast64_t
     *------------------------------------------------------------------------*/
     shiftDist = 0x403E - exp;
     if ( shiftDist < 0 ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return
             (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                 ? ui64_fromNaN
@@ -79,7 +78,7 @@ uint_fast64_t
         sig = sig64Extra.v;
         sigExtra = sig64Extra.extra;
     }
-    return softfloat_roundToUI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/f128_to_extF80.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
+extFloat80_t f128_to_extF80( float128_t a )
 {
     union ui128_f128 uA;
     uint_fast64_t uiA64, uiA0;
@@ -70,7 +69,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( frac64 | frac0 ) {
-            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;
@@ -98,7 +97,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
     sig128 =
         softfloat_shortShiftLeft128(
             frac64 | UINT64_C( 0x0001000000000000 ), frac0, 15 );
-    return softfloat_roundPackToExtF80( state, sign, exp, sig128.v64, sig128.v0, 80 );
+    return softfloat_roundPackToExtF80( sign, exp, sig128.v64, sig128.v0, 80 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/f32_to_extF80.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
+extFloat80_t f32_to_extF80( float32_t a )
 {
     union ui32_f32 uA;
     uint_fast32_t uiA;
@@ -67,7 +66,7 @@ extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0xFF ) {
         if ( frac ) {
-            softfloat_f32UIToCommonNaN( state, uiA, &commonNaN );
+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );
             uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;