Emitter: Remove unused header

.clang-format

@@ -1,109 +0,0 @@
-Language: Cpp
-BasedOnStyle: WebKit
-AccessModifierOffset: -2
-AlignAfterOpenBracket: Align
-AlignArrayOfStructures: None
-AlignConsecutiveAssignments: None
-AlignConsecutiveBitFields: Consecutive
-AlignConsecutiveDeclarations: None
-AlignConsecutiveMacros: None
-AlignEscapedNewlines: Left
-AlignOperands: Align
-AlignTrailingComments: true
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortCaseLabelsOnASingleLine: true
-AllowShortEnumsOnASingleLine: true
-AllowShortFunctionsOnASingleLine: Empty
-AllowShortIfStatementsOnASingleLine: WithoutElse
-AllowShortLambdasOnASingleLine: Inline
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: true
-AttributeMacros:
-  - JEMALLOC_NOTHROW
-  - FEX_ALIGNED
-  - FEX_ANNOTATE
-  - FEX_DEFAULT_VISIBILITY
-  - FEX_NAKED
-  - FEX_PACKED
-  - FEXCORE_PRESERVE_ALL_ATTR
-  - GLIBC_ALIAS_FUNCTION
-BinPackArguments: true
-BinPackParameters: true
-BitFieldColonSpacing: Both
-BreakAfterAttributes: Always # clang 16 required
-BreakBeforeBraces: Attach
-BreakBeforeBinaryOperators: None
-BreakBeforeInlineASMColon: OnlyMultiline # clang 16 required
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializers: BeforeComma
-BreakInheritanceList: BeforeColon
-ColumnLimit: 140
-CompactNamespaces: false
-ConstructorInitializerIndentWidth: 2
-ContinuationIndentWidth: 2
-Cpp11BracedListStyle: true
-DerivePointerAlignment: false
-EmptyLineAfterAccessModifier: Leave
-EmptyLineBeforeAccessModifier: Leave
-ExperimentalAutoDetectBinPacking: false
-FixNamespaceComments: true
-IncludeBlocks: Preserve
-IndentAccessModifiers: false
-IndentCaseBlocks: false
-IndentCaseLabels: false
-IndentExternBlock: AfterExternBlock
-IndentGotoLabels: false
-IndentPPDirectives: None
-IndentRequires: false
-IndentWidth: 2
-InsertBraces: true
-KeepEmptyLinesAtTheStartOfBlocks: true
-LambdaBodyIndentation: OuterScope
-LineEnding: LF # clang 16 required
-MaxEmptyLinesToKeep: 2
-NamespaceIndentation: Inner
-QualifierAlignment: Left
-PackConstructorInitializers: Never
-PenaltyBreakAssignment: 2
-PenaltyBreakBeforeFirstCallParameter: 2
-PenaltyBreakOpenParenthesis: 2
-PenaltyBreakString: 10
-PenaltyBreakTemplateDeclaration: 8
-PenaltyExcessCharacter: 2
-PenaltyReturnTypeOnItsOwnLine: 16
-PointerAlignment: Left
-RemoveBracesLLVM: false
-ReferenceAlignment: Left
-ReflowComments: true
-RequiresClausePosition: WithPreceding
-SeparateDefinitionBlocks: Leave
-SortIncludes: Never
-SpaceAfterCStyleCast: false
-SpaceAfterLogicalNot: false
-SpaceAfterTemplateKeyword: false
-SpaceAroundPointerQualifiers: Default
-SpaceBeforeAssignmentOperators: true
-SpaceBeforeCaseColon: false
-SpaceBeforeCpp11BracedList: true
-SpaceBeforeInheritanceColon: true
-SpaceBeforeParens: Custom
-SpaceBeforeParensOptions:
-  AfterControlStatements: true
-  AfterFunctionDeclarationName: false
-  AfterFunctionDefinitionName: false
-  AfterOverloadedOperator: false
-  AfterRequiresInClause: true
-  BeforeNonEmptyParentheses: false
-SpaceBeforeRangeBasedForLoopColon: true
-SpaceBeforeSquareBrackets: false
-SpaceInEmptyBlock: false
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: Leave
-SpacesInCStyleCastParentheses: false
-SpacesInConditionalStatement: false
-SpacesInParentheses: false
-Standard: c++20
-UseTab: Never

.clang-format-ignore

@@ -1,12 +0,0 @@
-# This file is used to ignore files and directories from clang-format
-
-# Ignore all files in the External directory
-External/*
-
-# SoftFloat-3e code doesn't belong to us 
-FEXCore/Source/Common/SoftFloat-3e/*
-Source/Common/cpp-optparse/*
-
-# Files with human-indented tables for readability - don't mess with these
-FEXCore/Source/Interface/Core/X86Tables/*
-

.git-blame-ignore-revs

@@ -1,15 +0,0 @@
-# Since version 2.23 (released in August 2019), git-blame has a feature
-# to ignore or bypass certain commits.
-#
-# This file contains a list of commits that are not likely what you
-# are looking for in a blame, such as mass reformatting or renaming.
-# You can set this file as a default ignore file for blame by running
-# the following command.
-#
-# $ git config blame.ignoreRevsFile .git-blame-ignore-revs
-
-# Whole tree reformat PR#3571
-2b4ec88daebd35fefb5bf5c73d7fc2b4155771ed
-
-# Second reformat to find fixed point PR#3577
-905aa935f5ce344a48ef4d5edab3c31efa8d793e

.github/ISSUE_TEMPLATE/potential-game-bug.md

@@ -37,6 +37,7 @@ If applicable, add screenshots and video to help explain your problem.
 
 **Additional context**
  - Is this an x86 or x86-64 game: [x86/x86-64/Both]
+ - Does this reproduce on x86-64 host with FEX: [Yes/No/Untested]
  - Does this reproduce on AArch64 with Radeon/Intel/Nvidia: [Yes/No/Untested]
  - Is this a Vulkan game: [Yes/No/Unknown]
    - If Yes, What is your Vulkan driver:

.github/workflows/ccpp.yml

@@ -13,17 +13,18 @@ env:
   BUILD_TYPE: Release
   CC: clang
   CXX: clang++
+  FEX_FORCE32BITALLOCATOR: 1
 
 jobs:
-  build_plus_test:
+  build:
     runs-on: ${{ matrix.arch }}
     strategy:
       matrix:
-        arch: [[self-hosted, ARMv8.0], [self-hosted, ARMv8.2], [self-hosted, ARMv8.4]]
+        arch: [[self-hosted, x64], [self-hosted, ARMv8.0], [self-hosted, ARMv8.2], [self-hosted, ARMv8.4]]
       fail-fast: false
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v2
 
     - name: Set runner label
       run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
@@ -63,7 +64,7 @@ jobs:
       # Note the current convention is to use the -S and -B options here to specify source
       # and build directories, but this is only available with CMake 3.13 and higher.
       # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_FEX_LINUX_TESTS=True -DBUILD_THUNKS=True -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DENABLE_INTERPRETER=True -DBUILD_FEX_LINUX_TESTS=True -DBUILD_THUNKS=True -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
 
     - name: Build
       working-directory: ${{runner.workspace}}/build
@@ -71,10 +72,53 @@ jobs:
       # Execute the build.  You can specify a specific target with "--target <NAME>"
       run: cmake --build . --config $BUILD_TYPE
 
-    - name: Install
+    - name: ASM Tests
       working-directory: ${{runner.workspace}}/build
       shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target install
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target asm_tests
+
+    - name: ASM Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
+
+    - name: IR Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests
+
+    - name: IR Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
+
+    - name: Posix Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the posixtest
+      run: cmake --build . --config $BUILD_TYPE --target posix_tests
+
+    - name: Posix Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_Posix.log || true
+
+    - name: gvisor tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the gvisor tests
+      run: cmake --build . --config $BUILD_TYPE --target gvisor_tests
+
+    - name: GVisor Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GVisor.log || true
 
     - name: gcc target tests 64
       working-directory: ${{runner.workspace}}/build
@@ -100,6 +144,17 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GCC32.log || true
 
+    - name: Struct verifier tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      run: cmake --build . --config $BUILD_TYPE --target struct_verifier
+
+    - name: Struct verifier Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_StructVerifier.log || true
+
     - name: APITest tests
       working-directory: ${{runner.workspace}}/build
       shell: bash
@@ -111,28 +166,6 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_APITests.log || true
 
-    - name: FEXCore APITest tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target fexcore_apitests
-
-    - name: FEXCore APITest Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_FEXCoreAPITests.log || true
-
-    - name: ARMEmitter tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target emitter_tests
-
-    - name: ARMEmitter Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ARMEmitterTests.log || true
-
     - name: FEXLinuxTests
       working-directory: ${{runner.workspace}}/build
       shell: bash
@@ -155,6 +188,12 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ThunkgenTests.log || true
 
+    - name: Install
+      if: matrix.arch[1] == 'x64'
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      run: cmake --build . --config $BUILD_TYPE --target install
+
     - name: Test GL No-Thunks
       if: matrix.arch[1] == 'x64'
       working-directory: ${{runner.workspace}}/build
@@ -183,66 +222,13 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ThunkResults.log || true
 
-    - name: ASM Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
-
-    - name: ASM Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
-
-    - name: Posix Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the posixtest
-      run: cmake --build . --config $BUILD_TYPE --target posix_tests
-
-    - name: Posix Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_Posix.log || true
-
-    - name: gvisor tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the gvisor tests
-      run: cmake --build . --config $BUILD_TYPE --target gvisor_tests
-
-    - name: GVisor Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GVisor.log || true
-
-    - name: Struct verifier tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target struct_verifier
-
-    - name: Struct verifier Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_StructVerifier.log || true
-
     - name: Truncate test results
       if: ${{ always() }}
       shell: bash
       working-directory: ${{runner.workspace}}/build
       # Cap out the log files at 20M in case something crash spins and dumps fault text
       # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
-
-    - name: Remove old SHM regions
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: cmake --build . --config $BUILD_TYPE --target remove_old_shm_regions
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
 
     - name: Set runner name
       if: ${{ always() }}
@@ -250,8 +236,7 @@ jobs:
 
     - name: Upload results
       if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
+      uses: 'actions/upload-artifact@v2'
       with:
         name: Results-${{ env.runner_name }}
         path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log

.github/workflows/glibc_fault.yml

@@ -1,193 +0,0 @@
-name: GLIBC fault test
-# This workflow file is the same as the `Build + Test` with some key differences
-# - Runs on any x86 and ARM64 runner
-# - Disables the glibc jemalloc compile option
-# - Enables the glibc allocator fault option
-# - Disables gvisor tests to reduce stress on CI machines (tmp/shm tests overwhelm them)
-# - Disables thunk tests since they are incompatible with glibc fault allocator
-# - Disables ARMEmitter tests (We don't want to fault test vixl's disassembler)
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-
-jobs:
-  glibc_fault_test:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v3
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Set rootfs paths
-      run: |
-        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS_PATH=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-
-    - name: Update RootFS cache
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      run: $GITHUB_WORKSPACE/Scripts/CI_FetchRootFS.py
-
-    - name : submodule checkout
-      # Need to update submodules
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean Build Environment
-      run: rm -Rf ${{runner.workspace}}/build
-
-    - name: Create Build Environment
-      # Some projects don't allow in-source building, so create a separate build directory
-      # We'll use this as our working directory for all subsequent commands
-      run: cmake -E make_directory ${{runner.workspace}}/build
-
-    - name: Configure CMake
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Note the current convention is to use the -S and -B options here to specify source
-      # and build directories, but this is only available with CMake 3.13 and higher.
-      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_FEX_LINUX_TESTS=True -DENABLE_GLIBC_ALLOCATOR_HOOK_FAULT=True -DENABLE_JEMALLOC_GLIBC_ALLOC=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
-
-    - name: Build
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the build.  You can specify a specific target with "--target <NAME>"
-      run: cmake --build . --config $BUILD_TYPE
-
-    - name: Install
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target install
-
-    - name: gcc target tests 64
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the gvisor tests
-      run: cmake --build . --config $BUILD_TYPE --target gcc_target_tests_64
-
-    - name: GCC64 Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GCC64.log || true
-
-    - name: gcc target tests 32
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the gvisor tests
-      run: cmake --build . --config $BUILD_TYPE --target gcc_target_tests_32
-
-    - name: GCC32 Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_GCC32.log || true
-
-    - name: APITest tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target api_tests
-
-    - name: APITest Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_APITests.log || true
-
-    - name: FEXCore APITest tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target fexcore_apitests
-
-    - name: FEXCore APITest Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_FEXCoreAPITests.log || true
-
-    - name: FEXLinuxTests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      run: cmake --build . --config $BUILD_TYPE --target fex_linux_tests_all
-
-    - name: FEXLinuxTests Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_FEXLinuxTests.log || true
-
-    - name: ASM Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
-
-    - name: ASM Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
-
-    - name: Posix Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the posixtest
-      run: cmake --build . --config $BUILD_TYPE --target posix_tests
-
-    - name: Posix Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_Posix.log || true
-
-    - name: Truncate test results
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Cap out the log files at 20M in case something crash spins and dumps fault text
-      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
-
-    - name: Remove old SHM regions
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: cmake --build . --config $BUILD_TYPE --target remove_old_shm_regions
-
-    - name: Set runner name
-      if: ${{ always() }}
-      run: echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}
-        path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log
-        retention-days: 3
-

.github/workflows/hostrunner.yml

@@ -1,106 +0,0 @@
-name: Hostrunner tests
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-
-jobs:
-  hostrunner_tests:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, x64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v3
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Set rootfs paths
-      run: |
-        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS_PATH=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-
-    - name: Update RootFS cache
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      run: $GITHUB_WORKSPACE/Scripts/CI_FetchRootFS.py
-
-    - name : submodule checkout
-      # Need to update submodules
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean Build Environment
-      run: rm -Rf ${{runner.workspace}}/build
-
-    - name: Create Build Environment
-      # Some projects don't allow in-source building, so create a separate build directory
-      # We'll use this as our working directory for all subsequent commands
-      run: cmake -E make_directory ${{runner.workspace}}/build
-
-    - name: Configure CMake
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Note the current convention is to use the -S and -B options here to specify source
-      # and build directories, but this is only available with CMake 3.13 and higher.
-      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
-
-    - name: Build
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the build.  You can specify a specific target with "--target <NAME>"
-      run: cmake --build . --config $BUILD_TYPE
-
-    - name: ASM Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
-
-    - name: ASM Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
-
-    - name: Truncate test results
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Cap out the log files at 20M in case something crash spins and dumps fault text
-      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
-
-    - name: Set runner name
-      if: ${{ always() }}
-      run: echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}
-        path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log
-        retention-days: 3
-

.github/workflows/instcountci.yml

@@ -1,146 +0,0 @@
-name: Instruction Count CI run
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
-  BUILD_TYPE: Release
-  CC: clang
-  CXX: clang++
-
-jobs:
-  instcountci_tests:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, x64], [self-hosted, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v3
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Set rootfs paths
-      run: |
-        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS_PATH=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-
-    - name: Update RootFS cache
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      run: $GITHUB_WORKSPACE/Scripts/CI_FetchRootFS.py
-
-    - name : submodule checkout
-      # Need to update submodules
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean Build Environment
-      run: rm -Rf ${{runner.workspace}}/build
-
-    - name: Create Build Environment
-      # Some projects don't allow in-source building, so create a separate build directory
-      # We'll use this as our working directory for all subsequent commands
-      run: cmake -E make_directory ${{runner.workspace}}/build
-
-    - name: Set vixl_sim x86
-      if: matrix.arch[1] == 'x64'
-      run: |
-        echo "VIXL_SIM_ENABLED=True" >> $GITHUB_ENV
-
-    - name: Set vixl_sim Arm64
-      if: matrix.arch[1] == 'ARM64'
-      run: |
-        echo "VIXL_SIM_ENABLED=False" >> $GITHUB_ENV
-
-    - name: Configure CMake
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Note the current convention is to use the -S and -B options here to specify source
-      # and build directories, but this is only available with CMake 3.13 and higher.
-      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_VIXL_SIMULATOR=$VIXL_SIM_ENABLED -DENABLE_VIXL_DISASSEMBLER=True -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
-
-    - name: Build
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      env:
-        FEX_DISABLETELEMETRY: 1
-      # Execute the build.  You can specify a specific target with "--target <NAME>"
-      run: cmake --build . --config $BUILD_TYPE --target CodeSizeValidation instcountci_test_files
-
-    - name: Instruction Count Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target instcountci_tests
-
-    - name: Instruction Count Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_InstCountCI.log || true
-
-    - name: Update local repo instcount
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: cmake --build . --config $BUILD_TYPE --target instcountci_update_tests
-
-    - name: Get instcountCI diff
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{github.workspace}}/
-      run: git diff --output=${{runner.workspace}}/build/InstCountCI.diff
-
-    - name: Check if InstCountCI Diff exists
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{github.workspace}}/
-      # Check if the file is empty
-      run: sh -c "! test -s ${{runner.workspace}}/build/InstCountCI.diff"
-
-    - name: Truncate test results
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Cap out the log files at 20M in case something crash spins and dumps fault text
-      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
-
-    - name: Set runner name
-      if: ${{ always() }}
-      run: echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}
-        path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log
-        retention-days: 3
-
-    - name: Upload results InstCountCI
-      if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}-instcountci
-        path: ${{runner.workspace}}/build/InstCountCI.diff
-        retention-days: 3
-

.github/workflows/mingw_build.yml

@@ -1,101 +0,0 @@
-name: Mingw build
-
-on:
-  push:
-    branches:
-      - main
-  pull_request:
-    branches:
-      - main
-
-env:
-  BUILD_TYPE: Debug
-
-jobs:
-  mingw_build:
-    runs-on: ${{ matrix.arch }}
-    strategy:
-      matrix:
-        arch: [[self-hosted, ARM64, mingw], [self-hosted, ARM64EC, mingw, ARM64]]
-      fail-fast: false
-
-    steps:
-    - uses: actions/checkout@v3
-
-    - name: Set runner label
-      run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
-
-    - name: Add MingGW to PATH
-      run: echo "$HOME/llvm-mingw/build/bin/" >> $GITHUB_PATH
-
-    - name: Set CC x86
-      if: matrix.arch[1] == 'x64'
-      run: |
-        echo "MINGW_TRIPLE=x86_64-w64-mingw32" >> $GITHUB_ENV
-
-    - name: Set CC Arm64
-      if: matrix.arch[1] == 'ARM64'
-      run: |
-        echo "MINGW_TRIPLE=aarch64-w64-mingw32" >> $GITHUB_ENV
-
-    - name: Set CC Arm64EC
-      if: matrix.arch[1] == 'ARM64EC'
-      run: |
-        echo "MINGW_TRIPLE=arm64ec-w64-mingw32" >> $GITHUB_ENV
-
-    - name: Set rootfs paths
-      run: |
-        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS_PATH=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "FEX_ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-        echo "ROOTFS=$HOME/Rootfs/" >> $GITHUB_ENV
-
-    - name: Update RootFS cache
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      run: $GITHUB_WORKSPACE/Scripts/CI_FetchRootFS.py
-
-    - name : submodule checkout
-      # Need to update submodules
-      run: |
-        git submodule sync --recursive
-        git submodule update --init --depth 1
-
-    - name: Clean Build Environment
-      run: rm -Rf ${{runner.workspace}}/build
-
-    - name: Create Build Environment
-      # Some projects don't allow in-source building, so create a separate build directory
-      # We'll use this as our working directory for all subsequent commands
-      run: cmake -E make_directory ${{runner.workspace}}/build
-
-    - name: Configure CMake
-      # Use a bash shell so we can use the same syntax for environment variable
-      # access regardless of the host operating system
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      # Note the current convention is to use the -S and -B options here to specify source
-      # and build directories, but this is only available with CMake 3.13 and higher.
-      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/toolchain_mingw.cmake -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
-
-    - name: Build
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the build.  You can specify a specific target with "--target <NAME>"
-      run: cmake --build . --config $BUILD_TYPE
-
-    - name: Set runner name
-      if: ${{ always() }}
-      run: echo "runner_name=$(hostname)" >> $GITHUB_ENV
-
-    - name: Upload results
-      if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
-      with:
-        name: Results-${{ env.runner_name }}
-        path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log
-        retention-days: 3
-

.github/workflows/pr-code-format.yml

@@ -1,76 +0,0 @@
-# Inspired by LLVM's pr-code-format.yml at 
-# https://github.com/llvm/llvm-project/blob/main/.github/workflows/pr-code-format.yml
-
-name: "Check code formatting"
-on:
-  pull_request:
-    branches:
-      - main
-
-jobs:
-  code_formatter:
-    runs-on: [self-hosted, X64]
-    if: github.repository == 'FEX-Emu/FEX'
-
-    steps:
-      - name: Fetch FEX sources
-        uses: actions/checkout@v4
-        with:
-          ref: ${{ github.event.pull_request.head.sha }}
-
-      - name: Checkout through merge base
-        uses: rmacklin/fetch-through-merge-base@v0
-        timeout-minutes: 3
-        with:
-          base_ref: ${{ github.event.pull_request.base.ref }}
-          head_ref: ${{ github.event.pull_request.head.sha }}
-          deepen_length: 500
-
-      - name: Get changed files
-        id: changed-files
-        uses: tj-actions/changed-files@v39
-        with:
-          separator: ","
-          skip_initial_fetch: true
-
-      - name: "Listed files"
-        env:
-          CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
-        run: |
-          echo "Formatting files:"
-          echo "$CHANGED_FILES"
-
-      - name: Check for correct clang-format version
-        run: clang-format --version | grep -qF '16.0.6'
-
-      - name: Check git-clang-format-16 exists
-        run: which git-clang-format-16
-
-      - name: Setup Python env
-        uses: actions/setup-python@v4
-        with:
-          python-version: '3.11'
-          cache: 'pip'
-          cache-dependency-path: './External/code-format-helper/requirements_formatting.txt'
-
-      - name: Install python dependencies
-        run: pip install -r ./External/code-format-helper/requirements_formatting.txt
-
-      - name: Run code formatter
-        env:
-          CLANG_FORMAT_PATH: 'git-clang-format-16'
-          GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
-          START_REV: ${{ github.event.pull_request.base.sha }}
-          END_REV: ${{ github.event.pull_request.head.sha }}
-          CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
-        # TODO(pmatos): Once we adopt v18, we should be able
-        # to take advantage of the new --diff_from_common_commit option
-        # explicitly in code-format-helper.py and not have to diff starting at
-        # the merge base.
-        run: |
-          python ./External/code-format-helper/code-format-helper.py \
-            --repo "FEX-emu/FEX" \
-            --issue-number $GITHUB_PR_NUMBER \
-            --start-rev $(git merge-base $START_REV $END_REV) \
-            --end-rev $END_REV \
-            --changed-files "$CHANGED_FILES"

.github/workflows/vixl_simulator.yml

@@ -15,7 +15,7 @@ env:
   CXX: clang++
 
 jobs:
-  vixl_simulator:
+  build:
     runs-on: ${{ matrix.arch }}
     strategy:
       matrix:
@@ -24,7 +24,7 @@ jobs:
       fail-fast: false
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v2
 
     - name: Set runner label
       run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV
@@ -64,7 +64,7 @@ jobs:
       # Note the current convention is to use the -S and -B options here to specify source
       # and build directories, but this is only available with CMake 3.13 and higher.
       # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_VIXL_SIMULATOR=True -DENABLE_VIXL_DISASSEMBLER=True -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -G Ninja -DENABLE_VIXL_SIMULATOR=True -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True
 
     - name: Build
       working-directory: ${{runner.workspace}}/build
@@ -72,45 +72,29 @@ jobs:
       # Execute the build.  You can specify a specific target with "--target <NAME>"
       run: cmake --build . --config $BUILD_TYPE
 
-    - name: ASM Tests - SVE256
+    - name: ASM Tests
       working-directory: ${{runner.workspace}}/build
       shell: bash
       # Execute the unit tests
       run: cmake --build . --config $BUILD_TYPE --target asm_tests
 
-    - name: ASM Test SVE256 Results move
+    - name: ASM Test Results move
       if: ${{ always() }}
       shell: bash
       working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_SVE256Bit.log || true
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true
 
-    - name: ASM Tests - SVE128
+    - name: IR Tests
       working-directory: ${{runner.workspace}}/build
       shell: bash
-      env:
-        FEX_FORCESVEWIDTH: "128"
       # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests
 
-    - name: ASM Test 128-bit Results move
+    - name: IR Test Results move
       if: ${{ always() }}
       shell: bash
       working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_SVE128Bit.log || true
-
-    - name: ASM Tests - ASIMD
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      env:
-        FEX_HOSTFEATURES: "disablesve"
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
-
-    - name: ASM Test ASIMD Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_ASIMD.log || true
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
 
     - name: Truncate test results
       if: ${{ always() }}
@@ -118,7 +102,7 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       # Cap out the log files at 20M in case something crash spins and dumps fault text
       # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
 
     - name: Set runner name
       if: ${{ always() }}
@@ -126,8 +110,7 @@ jobs:
 
     - name: Upload results
       if: ${{ always() }}
-      uses: 'actions/upload-artifact@v3'
-      timeout-minutes: 1
+      uses: 'actions/upload-artifact@v2'
       with:
         name: Results-${{ env.runner_name }}
         path: ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log

.gitignore

@@ -4,7 +4,7 @@ compile_commands.json
 vim_rc
 Config.json
 
-[Bb]uild*
+[Bb]uild*/
 [Bb]in/
 out/
 .vscode/

.gitmodules

@@ -3,22 +3,31 @@
 	path = External/vixl
 	url = https://github.com/FEX-Emu/vixl.git
 [submodule "External/cpp-optparse"]
-	path = Source/Common/cpp-optparse
+	path = External/cpp-optparse
 	url = https://github.com/Sonicadvance1/cpp-optparse
+[submodule "External/imgui"]
+	path = External/imgui
+	url = https://github.com/Sonicadvance1/imgui.git
+[submodule "External/json-maker"]
+	path = External/json-maker
+	url = https://github.com/Sonicadvance1/json-maker.git
+[submodule "External/tiny-json"]
+	path = External/tiny-json
+	url = https://github.com/Sonicadvance1/tiny-json.git
 [submodule "External/xbyak"]
-  shallow = true
+        shallow = true
 	path = External/xbyak
-	url = https://github.com/herumi/xbyak.git
+	url = https://github.com/FEX-Emu/xbyak.git
 [submodule "External/fex-posixtest-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-posixtest-bins
 	url = https://github.com/FEX-Emu/fex-posixtest-bins.git
 [submodule "External/fex-gvisor-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gvisor-tests-bins
 	url = https://github.com/FEX-Emu/fex-gvisor-tests-bins.git
 [submodule "External/fex-gcc-target-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gcc-target-tests-bins
 	url = https://github.com/FEX-Emu/fex-gcc-target-tests-bins.git
 [submodule "External/jemalloc"]
@@ -32,18 +41,15 @@
 	url = https://github.com/FEX-Emu/drm-headers.git
 [submodule "External/xxhash"]
 	path = External/xxhash
-	url = https://github.com/Cyan4973/xxHash.git
+	url = https://github.com/FEX-Emu/xxHash.git
 [submodule "External/Catch2"]
 	path = External/Catch2
 	url = https://github.com/catchorg/Catch2.git
 [submodule "External/robin-map"]
 	shallow = true
 	path = External/robin-map
-	url = https://github.com/FEX-Emu/robin-map.git
+	url = https://github.com/Tessil/robin-map.git
 [submodule "External/Vulkan-Headers"]
 	shallow = true
 	path = External/Vulkan-Headers
 	url = https://github.com/KhronosGroup/Vulkan-Headers.git
-[submodule "External/jemalloc_glibc"]
-	path = External/jemalloc_glibc
-	url = https://github.com/FEX-Emu/jemalloc.git

CI/FEXLinuxTestsThunks.json

@@ -1,5 +0,0 @@
-{
-  "ThunksDB": {
-    "fex_thunk_test": 1
-  }
-}

CMakeFiles/version_to_variables.cmake

@@ -1,30 +0,0 @@
-# Extracts a version from the passed in version string in the form of "<Major>.<Minor>.<Patch>".
-# If a part of the version is missing then it gets set as zero.
-# Version variables returned in:
-# ${Package}_VERSION_MAJOR
-# ${Package}_VERSION_MINOR
-# ${Package}_VERSION_PATCH
-function(version_to_variables VERSION _Package)
-  string(REPLACE "." ";" VERSION_LIST "${VERSION}")
-  list (LENGTH VERSION_LIST VERSION_LEN)
-  if (${VERSION_LEN} GREATER 0)
-    list(GET VERSION_LIST 0 VERSION_MAJOR)
-    set(${_Package}_VERSION_MAJOR ${VERSION_MAJOR} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_MAJOR 0 PARENT_SCOPE)
-  endif()
-
-  if (${VERSION_LEN} GREATER 1)
-    list(GET VERSION_LIST 1 VERSION_MINOR)
-    set(${_Package}_VERSION_MINOR ${VERSION_MINOR} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_MINOR 0 PARENT_SCOPE)
-  endif()
-
-  if (${VERSION_LEN} GREATER 2)
-    list(GET VERSION_LIST 2 VERSION_PATCH)
-    set(${_Package}_VERSION_PATCH ${VERSION_PATCH} PARENT_SCOPE)
-  else()
-    set(${_Package}_VERSION_PATCH 0 PARENT_SCOPE)
-  endif()
-endfunction()

CMakeLists.txt

@@ -1,5 +1,5 @@
 cmake_minimum_required(VERSION 3.14)
-project(FEX C CXX ASM)
+project(FEX)
 
 INCLUDE (CheckIncludeFiles)
 CHECK_INCLUDE_FILES ("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H)
@@ -7,54 +7,36 @@ CHECK_INCLUDE_FILES ("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H)
 option(BUILD_TESTS "Build unit tests to ensure sanity" TRUE)
 option(BUILD_FEX_LINUX_TESTS "Build FEXLinuxTests, requires x86 compiler" FALSE)
 option(BUILD_THUNKS "Build thunks" FALSE)
-option(BUILD_FEXCONFIG "Build FEXConfig" TRUE)
 option(ENABLE_CLANG_THUNKS "Build thunks with clang" FALSE)
+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
 option(ENABLE_IWYU "Enables include what you use program" FALSE)
 option(ENABLE_LTO "Enable LTO with compilation" TRUE)
 option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE)
-set(USE_LINKER "" CACHE STRING "Allow overriding the linker path directly")
+option(ENABLE_LLD "Enable linking with lld" FALSE)
+option(ENABLE_MOLD "Enable linking with mold" FALSE)
 option(ENABLE_ASAN "Enables Clang ASAN" FALSE)
 option(ENABLE_TSAN "Enables Clang TSAN" FALSE)
-option(ENABLE_COVERAGE "Enables Coverage" FALSE)
 option(ENABLE_ASSERTIONS "Enables assertions in build" FALSE)
 option(ENABLE_GDB_SYMBOLS "Enables GDBSymbols integration support" ${HAVE_GDB_JIT_READER_H})
+option(ENABLE_VISUAL_DEBUGGER "Enables the visual debugger for compiling" FALSE)
 option(ENABLE_STRICT_WERROR "Enables stricter -Werror for CI" FALSE)
 option(ENABLE_WERROR "Enables -Werror" FALSE)
 option(ENABLE_JEMALLOC "Enables jemalloc allocator" TRUE)
-option(ENABLE_JEMALLOC_GLIBC_ALLOC "Enables jemalloc glibc allocator" TRUE)
 option(ENABLE_OFFLINE_TELEMETRY "Enables FEX offline telemetry" TRUE)
 option(ENABLE_COMPILE_TIME_TRACE "Enables time trace compile option" FALSE)
 option(ENABLE_LIBCXX "Enables LLVM libc++" FALSE)
+option(ENABLE_INTERPRETER "Enables FEX's Interpreter" FALSE)
 option(ENABLE_CCACHE "Enables ccache for compile caching" TRUE)
+option(ENABLE_TERMUX_BUILD "Forces building for Termux on a non-Termux build machine" FALSE)
 option(ENABLE_VIXL_SIMULATOR "Forces the FEX JIT to use the VIXL simulator" FALSE)
 option(ENABLE_VIXL_DISASSEMBLER "Enables debug disassembler output with VIXL" FALSE)
-option(USE_LEGACY_BINFMTMISC "Uses legacy method of setting up binfmt_misc" FALSE)
-option(COMPILE_VIXL_DISASSEMBLER "Compiles the vixl disassembler in to vixl" FALSE)
 option(ENABLE_FEXCORE_PROFILER "Enables use of the FEXCore timeline profiling capabilities" FALSE)
 set (FEXCORE_PROFILER_BACKEND "gpuvis" CACHE STRING "Set which backend you want to use for the FEXCore profiler")
-option(ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT "Enables glibc memory allocation hooking with fault for CI testing")
-option(USE_PDB_DEBUGINFO "Builds debug info in PDB format" FALSE)
 
 set (X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686")
 set (X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64")
 set (DATA_DIRECTORY "${CMAKE_INSTALL_PREFIX}/share/fex-emu" CACHE PATH "global data directory")
 
-string(FIND ${CMAKE_BASE_NAME} mingw CONTAINS_MINGW)
-if (NOT CONTAINS_MINGW EQUAL -1)
-  message (STATUS "Mingw build")
-  set (MINGW_BUILD TRUE)
-  set (ENABLE_JEMALLOC TRUE)
-  set (ENABLE_JEMALLOC_GLIBC_ALLOC FALSE)
-endif()
-
-if (NOT MINGW_BUILD)
-  message (STATUS "Clang version ${CMAKE_CXX_COMPILER_VERSION}")
-  set (CLANG_MINIMUM_VERSION 13.0)
-  if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${CLANG_MINIMUM_VERSION})
-    message (FATAL_ERROR "Clang version too old for FEX. Need at least ${CLANG_MINIMUM_VERSION} but has ${CMAKE_CXX_COMPILER_VERSION}")
-  endif()
-endif()
-
 if (ENABLE_FEXCORE_PROFILER)
   add_definitions(-DENABLE_FEXCORE_PROFILER=1)
   string(TOUPPER "${FEXCORE_PROFILER_BACKEND}" FEXCORE_PROFILER_BACKEND)
@@ -66,14 +48,6 @@ if (ENABLE_FEXCORE_PROFILER)
   endif()
 endif()
 
-if (ENABLE_JEMALLOC_GLIBC_ALLOC AND ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
-  message(FATAL_ERROR "Can't have both glibc fault allocator and jemalloc glibc allocator enabled at the same time")
-endif()
-
-if (ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
-  add_definitions(-DGLIBC_ALLOCATOR_FAULT=1)
-endif()
-
 # uninstall target
 if(NOT TARGET uninstall)
   configure_file(
@@ -106,6 +80,11 @@ if (ENABLE_GDB_SYMBOLS)
 endif()
 
 
+if (ENABLE_INTERPRETER)
+  message(STATUS "Interpreter enabled")
+  add_definitions(-DINTERPRETER_ENABLED=1)
+endif()
+
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/Bin)
@@ -125,8 +104,10 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64")
   option(ENABLE_X86_HOST_DEBUG "Enables compiling on x86_64 host" FALSE)
   if (NOT ENABLE_X86_HOST_DEBUG)
     message(FATAL_ERROR
-    " FEX-Emu doesn't support compiling for x86-64 hosts!"
-    " This is /only/ a supported configuration for FEX CI and nothing else!")
+      " Be warned: FEX isn't optimized for x86_64 hosts!\n"
+      " Support for x86_64 hosts is only for debugging and convenience!\n"
+      " Don't expect amazing performance or optimal code generation!\n"
+      " Pass -DENABLE_X86_HOST_DEBUG=True to bypass this message!")
   endif()
   set(_M_X86_64 1)
   add_definitions(-D_M_X86_64=1)
@@ -138,44 +119,6 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^aarch64|^arm64|^armv8\.*")
   add_definitions(-D_M_ARM_64=1)
 endif()
 
-if (CMAKE_SYSTEM_PROCESSOR MATCHES "^arm64ec")
-  set(_M_ARM_64EC 1)
-  add_definitions(-D_M_ARM_64EC=1)
-endif()
-
-include(CheckCXXSourceCompiles)
-set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
-check_cxx_source_compiles(
-  "
-  __attribute__((preserve_all))
-  int Testy(int a, int b, int c, int d, int e, int f) {
-  return a + b + c + d + e + f;
-  }
-  int main() {
-  return Testy(0, 1, 2, 3, 4, 5);
-  }"
-  HAS_CLANG_PRESERVE_ALL)
-unset(CMAKE_REQUIRED_FLAGS)
-if (HAS_CLANG_PRESERVE_ALL)
-  if (MINGW_BUILD)
-    message(STATUS "Ignoring broken clang::preserve_all support")
-    set(HAS_CLANG_PRESERVE_ALL FALSE)
-  else()
-    message(STATUS "Has clang::preserve_all")
-  endif()
-endif ()
-
-if (_M_ARM_64 AND HAS_CLANG_PRESERVE_ALL)
-  add_definitions("-DFEX_PRESERVE_ALL_ATTR=__attribute__((preserve_all))" "-DFEX_HAS_PRESERVE_ALL_ATTR=1")
-else()
-  add_definitions("-DFEX_PRESERVE_ALL_ATTR=" "-DFEX_HAS_PRESERVE_ALL_ATTR=0")
-endif()
-
-if (ENABLE_VIXL_SIMULATOR)
-  # We can run the simulator on both x86-64 or AArch64 hosts
-  add_definitions(-DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
-endif()
-
 if (ENABLE_CCACHE)
   find_program(CCACHE_PROGRAM ccache)
   if(CCACHE_PROGRAM)
@@ -196,9 +139,13 @@ endif()
 
 set (PTHREAD_LIB pthread)
 
-if (USE_LINKER)
-  message(STATUS "Overriding linker to: ${USE_LINKER}")
-  add_link_options("-fuse-ld=${USE_LINKER}")
+if (ENABLE_LLD AND ENABLE_MOLD)
+  message (FATAL_ERROR "Cannot enable both lld and mold")
+elseif (ENABLE_LLD)
+  set (LD_OVERRIDE "-fuse-ld=lld")
+  add_link_options(${LD_OVERRIDE})
+elseif (ENABLE_MOLD)
+  add_link_options("-fuse-ld=mold")
 endif()
 
 if (ENABLE_LIBCXX)
@@ -212,6 +159,13 @@ if (NOT ENABLE_OFFLINE_TELEMETRY)
   add_definitions(-DFEX_DISABLE_TELEMETRY=1)
 endif()
 
+if(DEFINED ENV{TERMUX_VERSION} OR ENABLE_TERMUX_BUILD)
+  add_definitions(-DTERMUX_BUILD=1)
+  set(TERMUX_BUILD 1)
+  # Termux doesn't support Jemalloc due to bad interactions between emutls, jemalloc, and scudo
+  set(ENABLE_JEMALLOC FALSE)
+endif()
+
 if (ENABLE_ASAN)
   add_definitions(-DENABLE_ASAN=1)
   add_compile_options(-fno-omit-frame-pointer -fsanitize=address -fsanitize-address-use-after-scope)
@@ -223,28 +177,11 @@ if (ENABLE_TSAN)
   link_libraries(-fno-omit-frame-pointer -fsanitize=thread)
 endif()
 
-if (ENABLE_COVERAGE)
-  add_compile_options(-fprofile-instr-generate -fcoverage-mapping)
-  link_libraries(-fprofile-instr-generate -fcoverage-mapping)
-endif()
-
-if (ENABLE_JEMALLOC_GLIBC_ALLOC)
-  # The glibc jemalloc subproject which hooks the glibc allocator.
-  # Required for thunks to work.
-  # All host native libraries will use this allocator, while *most* other FEX internal allocations will use the other jemalloc allocator.
-  add_subdirectory(External/jemalloc_glibc/)
-elseif (NOT MINGW_BUILD)
-  message (STATUS
-    " jemalloc glibc allocator disabled!\n"
-    " This is not a recommended configuration!\n"
-    " This will very explicitly break thunk execution!\n"
-    " Use at your own risk!")
-endif()
-
 if (ENABLE_JEMALLOC)
-  # The jemalloc subproject that all FEXCore fextl objects allocate through.
+  add_definitions(-DENABLE_JEMALLOC=1)
   add_subdirectory(External/jemalloc/)
-elseif (NOT MINGW_BUILD)
+  include_directories(External/jemalloc/pregen/include/)
+else()
   message (STATUS
     " jemalloc disabled!\n"
     " This is not a recommended configuration!\n"
@@ -252,11 +189,6 @@ elseif (NOT MINGW_BUILD)
     " Use at your own risk!")
 endif()
 
-if (USE_PDB_DEBUGINFO)
-  add_compile_options(-g -gcodeview)
-  add_link_options(-g -Wl,--pdb=)
-endif()
-
 set (CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
 set (CMAKE_LINKER_FLAGS_RELWITHDEBINFO "${CMAKE_LINKER_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
 
@@ -265,15 +197,8 @@ set (CMAKE_LINKER_FLAGS_RELEASE "${CMAKE_LINKER_FLAGS_RELEASE} -fomit-frame-poin
 
 include_directories(External/robin-map/include/)
 
-if (BUILD_TESTS)
-  # Enable vixl disassembler if tests are enabled.
-  set(COMPILE_VIXL_DISASSEMBLER TRUE)
-endif()
-
-if (COMPILE_VIXL_DISASSEMBLER OR ENABLE_VIXL_SIMULATOR)
-  add_subdirectory(External/vixl/)
-  include_directories(SYSTEM External/vixl/src/)
-endif()
+add_subdirectory(External/vixl/)
+include_directories(External/vixl/src/)
 
 if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
   # This means we were attempted to get compiled with GCC
@@ -283,42 +208,38 @@ endif()
 find_package(PkgConfig REQUIRED)
 find_package(Python 3.0 REQUIRED COMPONENTS Interpreter)
 
-set(BUILD_SHARED_LIBS OFF)
-
-pkg_search_module(xxhash IMPORTED_TARGET xxhash libxxhash)
-if (TARGET PkgConfig::xxhash AND NOT CMAKE_CROSSCOMPILING)
-  add_library(xxHash::xxhash ALIAS PkgConfig::xxhash)
-else()
-  set(XXHASH_BUNDLED_MODE TRUE)
-  set(XXHASH_BUILD_XXHSUM FALSE)
-  add_subdirectory(External/xxhash/cmake_unofficial/)
-endif()
+add_subdirectory(External/xxhash/)
+include_directories(External/xxhash/)
 
 add_definitions(-Wno-trigraphs)
 add_definitions(-DGLOBAL_DATA_DIRECTORY="${DATA_DIRECTORY}/")
 
 if (BUILD_TESTS)
-  find_package(Catch2 QUIET)
-  if (NOT Catch2_FOUND)
-    add_subdirectory(External/Catch2/)
-
-    # Pull in catch_discover_tests definition
-    list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/External/Catch2/contrib/")
-  endif()
+  option(CATCH_BUILD_STATIC_LIBRARY "" ON)
+  set(CATCH_BUILD_STATIC_LIBRARY ON)
+  add_subdirectory(External/Catch2/)
 
+  # Pull in catch_discover_tests definition
+  list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/External/Catch2/contrib/")
   include(Catch)
 endif()
 
-find_package(fmt QUIET)
-if (NOT fmt_FOUND)
-  # Disable fmt install
-  set(FMT_INSTALL OFF)
-  add_subdirectory(External/fmt/)
-endif()
+add_subdirectory(External/cpp-optparse/)
+include_directories(External/cpp-optparse/)
+
+add_subdirectory(External/fmt/)
+
+add_subdirectory(External/imgui/)
+include_directories(External/imgui/)
+
+add_subdirectory(External/json-maker/)
+include_directories(External/json-maker/)
 
 add_subdirectory(External/tiny-json/)
 include_directories(External/tiny-json/)
 
+include_directories(External/xbyak/)
+
 include_directories(Source/)
 include_directories("${CMAKE_BINARY_DIR}/Source/")
 
@@ -349,11 +270,10 @@ if(ENABLE_WERROR OR ENABLE_STRICT_WERROR)
   endif()
 endif()
 
-set(FEX_TUNE_COMPILE_FLAGS)
 if (NOT TUNE_ARCH STREQUAL "generic")
   check_cxx_compiler_flag("-march=${TUNE_ARCH}" COMPILER_SUPPORTS_ARCH_TYPE)
   if(COMPILER_SUPPORTS_ARCH_TYPE)
-    list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=${TUNE_ARCH}")
+    add_compile_options("-march=${TUNE_ARCH}")
   else()
     message(FATAL_ERROR "Trying to compile arch type '${TUNE_ARCH}' but the compiler doesn't support this")
   endif()
@@ -366,7 +286,7 @@ if (TUNE_CPU STREQUAL "native")
       # Clang can not currently check for native Apple M1 type in hypervisor. Currently disabled
       check_cxx_compiler_flag("-mcpu=native" COMPILER_SUPPORTS_CPU_TYPE)
       if(COMPILER_SUPPORTS_CPU_TYPE)
-        list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=native")
+        add_compile_options("-mcpu=native")
       endif()
     else()
       # Due to an oversight in llvm, it declares any reasonably new Kryo CPU to only be ARMv8.0
@@ -380,19 +300,19 @@ if (TUNE_CPU STREQUAL "native")
 
       check_cxx_compiler_flag("-mcpu=${AARCH64_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
       if(COMPILER_SUPPORTS_CPU_TYPE)
-        list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${AARCH64_CPU}")
+        add_compile_options("-mcpu=${AARCH64_CPU}")
       endif()
     endif()
   else()
     check_cxx_compiler_flag("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
     if(COMPILER_SUPPORTS_MARCH_NATIVE)
-      list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=native")
+      add_compile_options("-march=native")
     endif()
   endif()
 else()
   check_cxx_compiler_flag("-mcpu=${TUNE_CPU}" COMPILER_SUPPORTS_CPU_TYPE)
   if(COMPILER_SUPPORTS_CPU_TYPE)
-    list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${TUNE_CPU}")
+    add_compile_options("-mcpu=${TUNE_CPU}")
   else()
     message(FATAL_ERROR "Trying to compile cpu type '${TUNE_CPU}' but the compiler doesn't support this")
   endif()
@@ -406,6 +326,57 @@ if (ENABLE_IWYU)
   endif()
 endif()
 
+if (ENABLE_CLANG_FORMAT)
+  find_program(CLANG_TIDY_EXE "clang-tidy")
+  if (NOT CLANG_TIDY_EXE)
+    message(FATAL_ERROR "Couldn't find clang-tidy")
+  endif()
+
+  set(CLANG_TIDY_FLAGS
+    "-checks=*"
+    "-fuchsia*"
+    "-bugprone-macro-parentheses"
+    "-clang-analyzer-core.*"
+    "-cppcoreguidelines-pro-type-*"
+    "-cppcoreguidelines-pro-bounds-array-to-pointer-decay"
+    "-cppcoreguidelines-pro-bounds-pointer-arithmetic"
+    "-cppcoreguidelines-avoid-c-arrays"
+    "-cppcoreguidelines-avoid-magic-numbers"
+    "-cppcoreguidelines-pro-bounds-constant-array-index"
+    "-cppcoreguidelines-no-malloc"
+    "-cppcoreguidelines-special-member-functions"
+    "-cppcoreguidelines-owning-memory"
+    "-cppcoreguidelines-macro-usage"
+    "-cppcoreguidelines-avoid-goto"
+    "-google-readability-function-size"
+    "-google-readability-namespace-comments"
+    "-google-readability-braces-around-statements"
+    "-google-build-using-namespace"
+    "-hicpp-*"
+    "-llvm-namespace-comment"
+    "-llvm-include-order" # Messes up with case sensitivity
+    "-llvmlibc-*"
+    "-misc-unused-parameters"
+    "-modernize-loop-convert"
+    "-modernize-use-auto"
+    "-modernize-avoid-c-arrays"
+    "-modernize-use-nodiscard"
+    "readability-*"
+    "-readability-function-size"
+    "-readability-implicit-bool-conversion"
+    "-readability-braces-around-statements"
+    "-readability-else-after-return"
+    "-readability-magic-numbers"
+    "-readability-named-parameter"
+    "-readability-uppercase-literal-suffix"
+    "-cert-err34-c"
+    "-cert-err58-cpp"
+    "-bugprone-exception-escape"
+    )
+  string(REPLACE ";" "," CLANG_TIDY_FLAGS "${CLANG_TIDY_FLAGS}")
+  set(CMAKE_CXX_CLANG_TIDY ${CLANG_TIDY_EXE} "${CLANG_TIDY_FLAGS}")
+endif()
+
 add_compile_options(-Wall)
 
 configure_file(
@@ -416,24 +387,13 @@ if (BUILD_TESTS)
   include(CTest)
   enable_testing()
   message(STATUS "Unit tests are enabled")
-
-  set (TEST_JOB_COUNT "" CACHE STRING "Override number of parallel jobs to use while running tests")
-  if (TEST_JOB_COUNT)
-    message(STATUS "Running tests with ${TEST_JOB_COUNT} jobs")
-  elseif(CMAKE_VERSION VERSION_LESS "3.29")
-    execute_process(COMMAND "nproc" OUTPUT_STRIP_TRAILING_WHITESPACE OUTPUT_VARIABLE TEST_JOB_COUNT)
-  endif()
-  set(TEST_JOB_FLAG "-j${TEST_JOB_COUNT}")
 endif()
 
 add_subdirectory(FEXHeaderUtils/)
-add_subdirectory(CodeEmitter/)
-add_subdirectory(FEXCore/)
+add_subdirectory(External/FEXCore)
 
-if (_M_ARM_64 AND NOT MINGW_BUILD)
-  # Binfmt_misc files must be installed prior to Source/ installs
-  add_subdirectory(Data/binfmts/)
-endif()
+# Binfmt_misc files must be installed prior to Source/ installs
+add_subdirectory(Data/binfmts/)
 
 add_subdirectory(Source/)
 add_subdirectory(Data/AppConfig/)
@@ -470,10 +430,10 @@ if (BUILD_THUNKS)
     CMAKE_ARGS
       "-DBITNESS=64"
       "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}"
-      "-DBUILD_FEX_LINUX_TESTS=${BUILD_FEX_LINUX_TESTS}"
       "-DENABLE_CLANG_THUNKS=${ENABLE_CLANG_THUNKS}"
       "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_64_TOOLCHAIN_FILE}"
       "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
+      "-DSTRUCT_VERIFIER=${CMAKE_SOURCE_DIR}/Scripts/StructPackVerifier.py"
       "-DFEX_PROJECT_SOURCE_DIR=${FEX_PROJECT_SOURCE_DIR}"
       "-DGENERATOR_EXE=$<TARGET_FILE:thunkgen>"
     INSTALL_COMMAND ""
@@ -488,10 +448,10 @@ if (BUILD_THUNKS)
     CMAKE_ARGS
       "-DBITNESS=32"
       "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}"
-      "-DBUILD_FEX_LINUX_TESTS=${BUILD_FEX_LINUX_TESTS}"
       "-DENABLE_CLANG_THUNKS=${ENABLE_CLANG_THUNKS}"
       "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_32_TOOLCHAIN_FILE}"
       "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
+      "-DSTRUCT_VERIFIER=${CMAKE_SOURCE_DIR}/Scripts/StructPackVerifier.py"
       "-DFEX_PROJECT_SOURCE_DIR=${FEX_PROJECT_SOURCE_DIR}"
       "-DGENERATOR_EXE=$<TARGET_FILE:thunkgen>"
     INSTALL_COMMAND ""

CMakeToolchains/AArch64.cmake

@@ -1,35 +0,0 @@
-# This is a reference AArch64 cross compile script
-# Pass in to cmake when building:
-# eg: cmake -DCMAKE_TOOLCHAIN_FILE=../CMakeToolchains/AArch64.cmake ..
-if (NOT DEFINED ENV{SYSROOT})
-  message(FATAL_ERROR "Need to have SYSROOT environment variable set")
-endif()
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-set(CMAKE_CROSSCOMPILING TRUE)
-
-# Target triple needs to match the binutils exactly
-set(TARGET_TRIPLE aarch64-linux-gnu)
-set(CMAKE_C_COMPILER "clang")
-set(CMAKE_CXX_COMPILER "clang++")
-set(CMAKE_C_COMPILER_AR "llvm-ar")
-set(CMAKE_CXX_COMPILER_AR "llvm-ar")
-set(CMAKE_C_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_CXX_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_LINKER "ld.lld")
-
-set(CMAKE_C_COMPILER_TARGET ${TARGET_TRIPLE})
-set(CMAKE_CXX_COMPILER_TARGET ${TARGET_TRIPLE})
-
-# Set the environment variable SYSROOT to the aarch64 rootfs
-set(CMAKE_FIND_ROOT_PATH "$ENV{SYSROOT}")
-set(CMAKE_SYSROOT "$ENV{SYSROOT}")
-
-list(APPEND CMAKE_PREFIX_PATH "$ENV{SYSROOT}/usr/lib/${TARGET_TRIPLE}/cmake/")
-
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)

CodeEmitter/CMakeLists.txt

@@ -1,2 +0,0 @@
-add_library(CodeEmitter INTERFACE)
-target_include_directories(CodeEmitter INTERFACE .)

CodeEmitter/CodeEmitter/Buffer.h

@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-
-namespace ARMEmitter {
-class Buffer {
-public:
-  Buffer() {
-    SetBuffer(nullptr, 0);
-  }
-
-  Buffer(uint8_t* Base, uint64_t BaseSize) {
-    SetBuffer(Base, BaseSize);
-  }
-
-  void SetBuffer(uint8_t* Base, uint64_t BaseSize) {
-    BufferBase = Base;
-    CurrentOffset = BufferBase;
-    Size = BaseSize;
-  }
-
-  void dc8(uint8_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc16(uint16_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc32(uint32_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc64(uint64_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-  void EmitString(const char* String) {
-    const auto StringLength = strlen(String);
-    memcpy(CurrentOffset, String, StringLength);
-    CurrentOffset += StringLength;
-  }
-
-  void Align() {
-    // Align the buffer to instruction size
-    auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & 0b11;
-    if (!CurrentAlignment) {
-      return;
-    }
-    CurrentOffset += 4 - CurrentAlignment;
-  }
-
-  template<typename T>
-  T GetCursorAddress() const {
-    return reinterpret_cast<T>(CurrentOffset);
-  }
-
-  static void ClearICache(void* Begin, std::size_t Length) {
-    __builtin___clear_cache(static_cast<char*>(Begin), static_cast<char*>(Begin) + Length);
-  }
-
-  size_t GetCursorOffset() const {
-    return static_cast<size_t>(CurrentOffset - BufferBase);
-  }
-
-  uint8_t* GetBufferBase() const {
-    return BufferBase;
-  }
-
-  void CursorIncrement(size_t Size) {
-    CurrentOffset += Size;
-  }
-
-  void SetCursorOffset(size_t Offset) {
-    CurrentOffset = BufferBase + Offset;
-  }
-
-  uint64_t GetBufferSize() const {
-    return Size;
-  }
-
-  template<typename T>
-  size_t GetCursorOffsetFromAddress(const T* Address) const {
-    return static_cast<size_t>(reinterpret_cast<const uint8_t*>(Address) - BufferBase);
-  }
-
-protected:
-
-  void ResetBuffer() {
-    CurrentOffset = BufferBase;
-  }
-
-  uint8_t* BufferBase;
-  uint8_t* CurrentOffset;
-  uint64_t Size;
-};
-} // namespace ARMEmitter

CodeEmitter/CodeEmitter/Emitter.h

@@ -1,843 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-
-#include <FEXCore/Utils/CompilerDefs.h>
-#include <FEXCore/Utils/EnumUtils.h>
-#include <FEXCore/Utils/LogManager.h>
-#include <FEXCore/Utils/MathUtils.h>
-#include <FEXCore/fextl/vector.h>
-
-#include <FEXHeaderUtils/BitUtils.h>
-#include <CodeEmitter/Buffer.h>
-#include <CodeEmitter/Registers.h>
-
-#include <array>
-#include <cstdint>
-#include <utility>
-#include <type_traits>
-
-/*
- * Welcome to FEX-Emu's custom AArch64 emitter.
- * This was written specifically to avoid the performance cost of the vixl emitter.
- *
- * There are some specific design constraints in this design to target a couple features:
- *   - High performance
- *   - Low CPU cache performance hit
- *   - Significantly reduced code footprint
- *   - Low number of branches
- *
- * These requirements are mostly achieved by removing a bunch of developer conveniences
- * that vixl provides. The developer needs to take a lot of care to not shoot themselves in the foot.
- *
- * Misc design decisions:
- * - Registers are encoded as basic uint32_t enums.
- *   - Converting between different registers is zero-cost.
- *   - Passing around as arguments are as cheap as registers
- *     - Contrast to vixl where every register requires living on the stack.
- *   - Registers can get encoded in to instructions with a simple `BFM` instruction.
- *
- * - Instructions are very simply emitted, allowing direct inlining most of the time.
- *   - These are simple enough that multiple back-to-back instructions get optimized to 128-bit load-store operations.
- *     - Contrast to vixl where pretty much no instruction emitter gets inlined.
- *
- * - Instruction emitters are /mostly/ unsized. Most instructions take a size argument first, which gets encoded
- *   directly in to the instruction.
- *   - Contrast to vixl where the register arguments are how the instructions determine operating size.
- *   - Size argument allows FEX to use `CSEL` to select a size at runtime, instead of branching.
- *   - Some instructions are explicitly sized based on register type. Read comments in the respective `inl` files to
- *     see why.
- *     Some scalar/vector operations are an example of this.
- *
- * - Almost zero helper functions.
- *   - Primary exception to this rule is load-store operations. These will use a helper to make
- *     it easier to select the correct load-store instruction. Mostly because these are a nightmare selecting
- *     the right instruction.
- */
-namespace ARMEmitter {
-/*
- * This `Size` enum is used for most ALU operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class Size : uint32_t {
-  i32Bit = 0,
-  i64Bit,
-};
-
-// This allows us to get the `Size` enum in bits.
-[[nodiscard]]
-constexpr size_t RegSizeInBits(Size size) {
-  return size_t {32} << FEXCore::ToUnderlying(size);
-}
-
-/* This `SubRegSize` enum is used for most ASIMD operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class SubRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-  i128Bit = 0b100,
-};
-
-// This allows us to get the `SubRegSize` in bits.
-[[nodiscard]]
-constexpr size_t SubRegSizeInBits(SubRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-/* This `ScalarRegSize` enum is used for most scalar float
- * operations.
- *
- * This is specifically duplicated from `SubRegSize` to have strongly
- * typed functions.
- *
- * `ScalarRegSize` specifically doesn't have `i128Bit` because scalar operations
- * can't operate at 128-bit.
- */
-enum class ScalarRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-};
-
-// This allows us to get the `ScalarRegSize` in bits.
-[[nodiscard]]
-constexpr size_t ScalarRegSizeInBits(ScalarRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-/* This `VectorRegSizePair` union allows us to have an overlapping type
- * to select a scalar operation or a vector depending on which operation
- * we pass in.
- * Useful in FEX's vector operations that behave as scalar or vector
- * depending on various factors. But since the operation will have the sa,e
- * element size, we want to choose the operation more easily
- */
-union VectorRegSizePair {
-  ScalarRegSize Scalar;
-  SubRegSize Vector;
-};
-
-// This allows us to create a `VectorRegSizePair` union.
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(SubRegSize size) {
-  return VectorRegSizePair {.Vector = size};
-}
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(ScalarRegSize size) {
-  return VectorRegSizePair {.Scalar = size};
-}
-
-// This `ShiftType` enum is used for ALU shift-register encoded instructions.
-enum class ShiftType : uint32_t {
-  LSL = 0,
-  LSR,
-  ASR,
-  ROR,
-};
-
-// This `ExtendedType` enum is used for ALU extended-register encoded instructions.
-enum class ExtendedType : uint32_t {
-  UXTB = 0b000,
-  UXTH = 0b001,
-  UXTW = 0b010,
-  UXTX = 0b011,
-  SXTB = 0b100,
-  SXTH = 0b101,
-  SXTW = 0b110,
-  SXTX = 0b111,
-  LSL_32 = UXTW,
-  LSL_64 = UXTX,
-};
-
-// This `Condition` enum is used for various conditional instructions.
-enum class Condition : uint32_t {
-  // Meaning:   Int                    - Float
-  CC_EQ = 0, // Equal                  - Equal
-  CC_NE,     // Not Eq                 - Not Eq or unordered
-  CC_CS,     // Carry set              - Greater than, equal, or unordered
-  CC_CC,     // Carry clear            - Less than
-  CC_MI,     // Minus/Negative         - Less than
-  CC_PL,     // Plus, positive or zero - GT, equal, or unordered
-  CC_VS,     // Overflow               - Unordered
-  CC_VC,     // No Overflow            - Ordered
-  CC_HI,     // Unsigned higher        - GT, or unordered
-  CC_LS,     // Unsigned lower or same - LT or EQ
-  CC_GE,     // Signed GT or EQ        - GT or EQ
-  CC_LT,     // Signed LT              - LT or Unordered
-  CC_GT,     // Signed GT              - GT
-  CC_LE,     // Signed LT or EQ        - LT, EQ, or Unordered
-  CC_AL,     // Always                 - Always
-  CC_NV,     // Always                 - Always
-
-  // Aliases
-  CC_HS = CC_CS,
-  CC_LO = CC_CC,
-};
-
-/*
- * This `StatusFlags` enum is used for conditional compare encoded instructions.
- * These directly encode to the `nzcv` flags.
- */
-enum class StatusFlags : uint32_t {
-  None = 0,
-  Flag_V = 0b0001,
-  Flag_C = 0b0010,
-  Flag_Z = 0b0100,
-  Flag_N = 0b1000,
-
-  Flag_NZCV = Flag_N | Flag_Z | Flag_C | Flag_V,
-};
-
-
-/*
- * This `IndexType` enum is used for load-store instructions.
- * Not all load-store instructions use this, so the user needs to be careful.
- */
-enum class IndexType {
-  POST,
-  OFFSET,
-  PRE,
-
-  UNPRIVILEGED,
-};
-
-// Used with adr and scalar + vector load/store variants to denote
-// a modifier operation.
-enum class SVEModType : uint8_t {
-  MOD_UXTW,
-  MOD_SXTW,
-  MOD_LSL,
-  MOD_NONE,
-};
-
-/* This `SVEMemOperand` class is used for the helper SVE load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class SVEMemOperand final {
-public:
-  enum class Type {
-    ScalarPlusScalar,
-    ScalarPlusImm,
-    ScalarPlusVector,
-    VectorPlusImm,
-  };
-
-  SVEMemOperand(XRegister rn, XRegister rm = XReg::zr)
-    : rn {rn}
-    , MemType {Type::ScalarPlusScalar}
-    , MetaType {.ScalarScalarType {
-        .rm = rm,
-      }} {}
-  SVEMemOperand(XRegister rn, int32_t imm = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusImm}
-    , MetaType {.ScalarImmType {
-        .Imm = imm,
-      }} {}
-  SVEMemOperand(XRegister rn, ZRegister zm, SVEModType mod = SVEModType::MOD_NONE, uint8_t scale = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusVector}
-    , MetaType {.ScalarVectorType {
-        .zm = zm,
-        .mod = mod,
-        .scale = scale,
-      }} {}
-  SVEMemOperand(ZRegister zn, uint32_t imm)
-    : rn {Register {zn.Idx()}}
-    , MemType {Type::VectorPlusImm}
-    , MetaType {.VectorImmType {
-        .Imm = imm,
-      }} {}
-
-  [[nodiscard]]
-  bool IsScalarPlusScalar() const {
-    return MemType == Type::ScalarPlusScalar;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusImm() const {
-    return MemType == Type::ScalarPlusImm;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusVector() const {
-    return MemType == Type::ScalarPlusVector;
-  }
-  [[nodiscard]]
-  bool IsVectorPlusImm() const {
-    return MemType == Type::VectorPlusImm;
-  }
-
-  union Data {
-    struct {
-      Register rm;
-    } ScalarScalarType;
-
-    struct {
-      int32_t Imm;
-    } ScalarImmType;
-
-    struct {
-      ZRegister zm;
-      SVEModType mod;
-      uint8_t scale;
-    } ScalarVectorType;
-
-    struct {
-      // rn will be a ZRegister
-      uint32_t Imm;
-    } VectorImmType;
-  };
-
-  Register rn;
-  Type MemType;
-  Data MetaType;
-};
-
-/* This `ExtendedMemOperand` class is used for the helper load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class ExtendedMemOperand final {
-public:
-  ExtendedMemOperand(XRegister rn, XRegister rm = XReg::zr, ExtendedType Option = ExtendedType::LSL_64, uint32_t Shift = 0)
-    : rn {rn}
-    , MetaType {.ExtendedType {
-        .Header = {.MemType = TYPE_EXTENDED},
-        .rm = rm,
-        .Option = Option,
-        .Shift = Shift,
-      }} {}
-  ExtendedMemOperand(XRegister rn, IndexType Index = IndexType::OFFSET, int32_t Imm = 0)
-    : rn {rn}
-    , MetaType {.ImmType {
-        .Header = {.MemType = TYPE_IMM},
-        .Index = Index,
-        .Imm = Imm,
-      }} {}
-
-  Register rn;
-  enum Type {
-    TYPE_EXTENDED,
-    TYPE_IMM,
-  };
-  struct HeaderStruct {
-    Type MemType;
-  };
-  union {
-    HeaderStruct Header;
-    struct {
-      HeaderStruct Header;
-      Register rm;
-      ExtendedType Option;
-      uint32_t Shift;
-    } ExtendedType;
-    struct {
-      HeaderStruct Header;
-      IndexType Index;
-      int32_t Imm;
-    } ImmType;
-  } MetaType;
-};
-
-template<uint32_t op0, uint32_t op1, uint32_t CRn, uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenSystemReg() {
-  return op0 << 19 | op1 << 16 | CRn << 12 | CRm << 8 | op2 << 5;
-};
-
-// This `SystemRegister` enum is used for the mrs/msr instructions.
-enum class SystemRegister : uint32_t {
-  CTR_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b001>(),
-  DCZID_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b111>(),
-  TPIDR_EL0 = GenSystemReg<0b11, 0b011, 0b1101, 0b0000, 0b010>(),
-  RNDR = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b000>(),
-  RNDRRS = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b001>(),
-  NZCV = GenSystemReg<0b11, 0b011, 0b0100, 0b0010, 0b000>(),
-  FPCR = GenSystemReg<0b11, 0b011, 0b0100, 0b0100, 0b000>(),
-  CNTFRQ_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b000>(),
-  CNTVCT_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b010>(),
-};
-
-template<uint32_t op1, uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenDCReg() {
-  return op1 << 16 | CRm << 8 | op2 << 5;
-};
-
-// This `DataCacheOperation` enum is used for the dc instruction.
-enum class DataCacheOperation : uint32_t {
-  IVAC = GenDCReg<0b000, 0b0110, 0b001>(),
-  ISW = GenDCReg<0b000, 0b0110, 0b010>(),
-  CSW = GenDCReg<0b000, 0b1010, 0b010>(),
-  CISW = GenDCReg<0b000, 0b1110, 0b010>(),
-  ZVA = GenDCReg<0b011, 0b0100, 0b001>(),
-  CVAC = GenDCReg<0b011, 0b1010, 0b001>(),
-  CVAU = GenDCReg<0b011, 0b1011, 0b001>(),
-  CIVAC = GenDCReg<0b011, 0b1110, 0b001>(),
-
-  // MTE2
-  IGVAC = GenDCReg<0b000, 0b0110, 0b011>(),
-  IGSW = GenDCReg<0b000, 0b0110, 0b100>(),
-  IGDVAC = GenDCReg<0b000, 0b0110, 0b101>(),
-  IGDSW = GenDCReg<0b000, 0b0110, 0b110>(),
-  CGSW = GenDCReg<0b000, 0b1010, 0b100>(),
-  CGDSW = GenDCReg<0b000, 0b1010, 0b110>(),
-  CIGSW = GenDCReg<0b000, 0b1110, 0b100>(),
-  CIGDSW = GenDCReg<0b000, 0b1110, 0b110>(),
-
-  // MTE
-  GVA = GenDCReg<0b011, 0b0100, 0b011>(),
-  GZVA = GenDCReg<0b011, 0b0100, 0b100>(),
-  CGVAC = GenDCReg<0b011, 0b1010, 0b011>(),
-  CGDVAC = GenDCReg<0b011, 0b1010, 0b101>(),
-  CGVAP = GenDCReg<0b011, 0b1100, 0b011>(),
-  CGDVAP = GenDCReg<0b011, 0b1100, 0b101>(),
-  CGVADP = GenDCReg<0b011, 0b1101, 0b011>(),
-  CGDVADP = GenDCReg<0b011, 0b1101, 0b101>(),
-  CIGVAC = GenDCReg<0b011, 0b1110, 0b011>(),
-  CIGDVAC = GenDCReg<0b011, 0b1110, 0b101>(),
-
-  // DPB
-  CVAP = GenDCReg<0b011, 0b1100, 0b001>(),
-
-  // DPB2
-  CVADP = GenDCReg<0b011, 0b1101, 0b001>(),
-};
-
-template<uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenHintBarrierReg() {
-  return CRm << 8 | op2 << 5;
-}
-
-// This `HintRegister` enum is used for the hint instruction.
-enum class HintRegister : uint32_t {
-  NOP = GenHintBarrierReg<0b0000, 0b000>(),
-  YIELD = GenHintBarrierReg<0b0000, 0b001>(),
-  WFE = GenHintBarrierReg<0b0000, 0b010>(),
-  WFI = GenHintBarrierReg<0b0000, 0b011>(),
-  SEV = GenHintBarrierReg<0b0000, 0b100>(),
-  SEVL = GenHintBarrierReg<0b0000, 0b101>(),
-  DGH = GenHintBarrierReg<0b0000, 0b110>(),
-  CSDB = GenHintBarrierReg<0b0010, 0b100>(),
-};
-
-// This `BarrierRegister` enum is used for the various barrier instructions.
-enum class BarrierRegister : uint32_t {
-  CLREX = GenHintBarrierReg<0b0000, 0b010>(),
-  TCOMMIT = GenHintBarrierReg<0b0000, 0b011>(),
-  DSB = GenHintBarrierReg<0b0000, 0b100>(),
-  DMB = GenHintBarrierReg<0b0000, 0b101>(),
-  ISB = GenHintBarrierReg<0b0000, 0b110>(),
-  SB = GenHintBarrierReg<0b0000, 0b111>(),
-};
-
-// This `BarrierScope` enum is used for the dsb/dmb instructions.
-enum class BarrierScope : uint32_t {
-  // Outer shareable
-  OSHLD = 0b0001,
-  OSHST = 0b0010,
-  OSH = 0b0011,
-  // Non shareable
-  NSHLD = 0b0101,
-  NSHST = 0b0110,
-  NSH = 0b0111,
-  // Inner shareable
-  ISHLD = 0b1001,
-  ISHST = 0b1010,
-  ISH = 0b1011,
-  // Full System visibility
-  LD = 0b1101,
-  ST = 0b1110,
-  SY = 0b1111,
-};
-
-// This `Prefetch` enum is used for prefetch instructions.
-enum class Prefetch : uint32_t {
-  // Prefetch for load
-  PLDL1KEEP = 0b00000,
-  PLDL1STRM = 0b00001,
-  PLDL2KEEP = 0b00010,
-  PLDL2STRM = 0b00011,
-  PLDL3KEEP = 0b00100,
-  PLDL3STRM = 0b00101,
-
-  // Preload instructions
-  PLIL1KEEP = 0b01000,
-  PLIL1STRM = 0b01001,
-  PLIL2KEEP = 0b01010,
-  PLIL2STRM = 0b01011,
-  PLIL3KEEP = 0b01100,
-  PLIL3STRM = 0b01101,
-
-  // Preload for store
-  PSTL1KEEP = 0b10000,
-  PSTL1STRM = 0b10001,
-  PSTL2KEEP = 0b10010,
-  PSTL2STRM = 0b10011,
-  PSTL3KEEP = 0b10100,
-  PSTL3STRM = 0b10101,
-};
-
-// This `PredicatePattern` enun is used for some SVE instructions.
-enum class PredicatePattern : uint32_t {
-  SVE_POW2 = 0b00000,
-  SVE_VL1 = 0b00001,
-  SVE_VL2 = 0b00010,
-  SVE_VL3 = 0b00011,
-  SVE_VL4 = 0b00100,
-  SVE_VL5 = 0b00101,
-  SVE_VL6 = 0b00110,
-  SVE_VL7 = 0b00111,
-  SVE_VL8 = 0b01000,
-  SVE_VL16 = 0b01001,
-  SVE_VL32 = 0b01010,
-  SVE_VL64 = 0b01011,
-  SVE_VL128 = 0b01100,
-  SVE_VL256 = 0b01101,
-  SVE_MUL4 = 0b11101,
-  SVE_MUL3 = 0b11110,
-  SVE_ALL = 0b11111,
-};
-
-// Used with SVE FP immediate arithmetic instructions
-enum class SVEFAddSubImm : uint32_t {
-  _0_5,
-  _1_0,
-};
-enum class SVEFMulImm : uint32_t {
-  _0_5,
-  _2_0,
-};
-enum class SVEFMaxMinImm : uint32_t {
-  _0_0,
-  _1_0,
-};
-
-/* This `BackwardLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `below` an instruction that uses it.
- * Which means that a branch would jump backwards.
- */
-struct BackwardLabel {
-  uint8_t* Location {};
-};
-
-/* This `SingleUseForwardLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `above` an instruction that uses it.
- * Which means that a branch would jump forwards.
- *
- * The `ForwardLabel` struct can be bound to multiple instructions, so it needs a vector for each bind instruction type.
- */
-struct SingleUseForwardLabel {
-  enum class InstType {
-    UNKNOWN,
-    ADR,
-    ADRP,
-    B,
-    BC,
-    TEST_BRANCH,
-    RELATIVE_LOAD,
-    LONG_ADDRESS_GEN,
-  };
-  uint8_t* Location {};
-  InstType Type = InstType::UNKNOWN;
-};
-
-struct ForwardLabel {
-  fextl::vector<SingleUseForwardLabel> Insts {};
-};
-
-/* This `BiDirectionalLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is in either direction of an instruction that uses it.
- * Which means a branch could jump backwards or forwards depending on situation.
- */
-struct BiDirectionalLabel {
-  BackwardLabel Backward;
-  ForwardLabel Forward;
-};
-
-static inline void AddLocationToLabel(SingleUseForwardLabel* Label, SingleUseForwardLabel&& Location) {
-  LOGMAN_THROW_A_FMT(Label->Type == SingleUseForwardLabel::InstType::UNKNOWN, "Trying to bind a SingleUseForwardLabel to multiple "
-                                                                              "locations. Use ForwardLabel instead.");
-  *Label = std::move(Location);
-}
-
-static inline void AddLocationToLabel(ForwardLabel* Label, SingleUseForwardLabel&& Location) {
-  Label->Insts.emplace_back(std::move(Location));
-}
-
-// Some FCMA ASIMD instructions support a rotation argument.
-enum class Rotation : uint32_t {
-  ROTATE_0 = 0b00,
-  ROTATE_90 = 0b01,
-  ROTATE_180 = 0b10,
-  ROTATE_270 = 0b11,
-};
-
-// Concept for contraining some instructions to accept only an XRegister or WRegister.
-// Particularly for operations that differ encodings depending on which one is used.
-template<typename T>
-concept IsXOrWRegister = std::is_same_v<T, XRegister> || std::is_same_v<T, WRegister>;
-
-// Whether or not a given set of vector registers are sequential
-// in increasing order as far as the register file is concerned (modulo its size)
-//
-// For example, a set of registers like:
-//
-// v1,  v2, v3 and
-// v31, v0, v1
-//
-// would both be considered sequential sequences, and some instructions in particular
-// limit register lists to these kind of sequences.
-//
-template<typename T, typename... Args>
-constexpr bool AreVectorsSequential(T first, const Args&... args) {
-  // Ensure we always have a pair of registers to compare against.
-  static_assert(sizeof...(args) >= 1, "Number of arguments must be greater than 1");
-
-  const auto fn = [](auto& lhs, const auto& rhs) {
-    const auto result = ((lhs.Idx() + 1) % 32) == rhs.Idx();
-    lhs = rhs;
-    return result;
-  };
-
-  return (fn(first, args) && ...);
-}
-
-// Returns if the immediate can fit in to add/sub immediate instruction encodings.
-constexpr bool IsImmAddSub(uint64_t imm) {
-  constexpr uint64_t U12Mask = 0xFFF;
-  auto FitsWithin12Bits = [](uint64_t imm) {
-    return (imm & ~U12Mask) == 0;
-  };
-  // Can fit in to the instruction encoding:
-  // - if only bits [11:0] are set.
-  // - if only bits [23:12] are set.
-  return FitsWithin12Bits(imm) || (FitsWithin12Bits(imm >> 12) && (imm & U12Mask) == 0);
-}
-
-// This is an emitter that is designed around the smallest code bloat as possible.
-// Eschewing most developer convenience in order to keep code as small as possible.
-
-// Choices:
-// - Size of ops passed as an argument rather than template to let the compiler use csel instead of branching.
-// - Registers are unsized so they can be passed in a GPR and not need conversion operations
-class Emitter : public ARMEmitter::Buffer {
-public:
-  Emitter() = default;
-
-  Emitter(uint8_t* Base, uint64_t BaseSize)
-    : Buffer(Base, BaseSize) {}
-
-  // Bind a backward label to an address.
-  // Address that is bound is the current emitter location.
-  void Bind(BackwardLabel* Label) {
-    LOGMAN_THROW_AA_FMT(Label->Location == nullptr, "Trying to bind a label twice");
-    Label->Location = GetCursorAddress<uint8_t*>();
-  }
-
-  void Bind(const SingleUseForwardLabel* Label) {
-    uint8_t* CurrentAddress = GetCursorAddress<uint8_t*>();
-    // Patch up the instructions
-    switch (Label->Type) {
-    case SingleUseForwardLabel::InstType::ADR: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(IsADRRange(Imm), "Unscaled offset too large");
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case SingleUseForwardLabel::InstType::ADRP: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(IsADRPRange(Imm) && IsADRPAligned(Imm), "Unscaled offset too large");
-      Imm >>= 12;
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-
-    case SingleUseForwardLabel::InstType::B: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -134217728 && Imm <= 134217724 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FF'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= Offset;
-      *Instruction = Inst;
-
-      break;
-    }
-
-    case SingleUseForwardLabel::InstType::TEST_BRANCH: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-
-      break;
-    }
-    case SingleUseForwardLabel::InstType::BC:
-    case SingleUseForwardLabel::InstType::RELATIVE_LOAD: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x7'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case SingleUseForwardLabel::InstType::LONG_ADDRESS_GEN: {
-      uint32_t* Instructions = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t ImmInstOne = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[0]);
-      int64_t ImmInstTwo = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[1]);
-      auto OriginalOffset = GetCursorOffset();
-
-      auto InstOffset = GetCursorOffsetFromAddress(Instructions);
-      SetCursorOffset(InstOffset);
-
-      // We encoded the destination register in to the first instruction space.
-      // Read it back.
-      ARMEmitter::Register DestReg(Instructions[0]);
-
-      if (IsADRRange(ImmInstTwo)) {
-        // If within ADR range from the second instruction, then we can emit NOP+ADR
-        nop();
-        adr(DestReg, static_cast<uint32_t>(ImmInstTwo) & 0x7FFF);
-      } else if (IsADRPRange(ImmInstOne)) {
-
-        // If within ADRP range from the first instruction, then we are /definitely/ in range for the second instruction.
-        // First check if we are in non-offset range for second instruction.
-        if (IsADRPAligned(reinterpret_cast<uint64_t>(CurrentAddress))) {
-          // We can emit nop + adrp
-          nop();
-          adrp(DestReg, static_cast<uint32_t>(ImmInstTwo >> 12) & 0x7FFF);
-        } else {
-          // Not aligned, need adrp + add
-          adrp(DestReg, static_cast<uint32_t>(ImmInstOne >> 12) & 0x7FFF);
-          add(ARMEmitter::Size::i64Bit, DestReg, DestReg, ImmInstOne & 0xFFF);
-        }
-      } else {
-        LOGMAN_MSG_A_FMT("Unscaled offset is too large");
-        FEX_UNREACHABLE;
-      }
-
-      SetCursorOffset(OriginalOffset);
-      break;
-    }
-    default: LOGMAN_MSG_A_FMT("Unexpected inst type in label fixup");
-    }
-  }
-
-  // Bind a forward label to a location.
-  // This walks all the instructions in the label's vector.
-  // Then backpatching all instructions that have used the label.
-  template<bool WarnAboutEmpty = false>
-  void Bind(ForwardLabel* Label) {
-    if constexpr (WarnAboutEmpty) {
-      LOGMAN_THROW_A_FMT(Label->Insts.empty() == false, "Binding forward label that didn't have any instructions using it");
-    }
-    for (auto& Inst : Label->Insts) {
-      Bind(&Inst);
-    }
-  }
-
-  // Bind a bidirectional location to a location.
-  // Binds both forwards and backwards depending on how the label was used.
-  void Bind(BiDirectionalLabel* Label) {
-    if (!Label->Backward.Location) {
-      Bind(&Label->Backward);
-    }
-    Bind<false>(&Label->Forward);
-  }
-
-#include <CodeEmitter/VixlUtils.inl>
-
-public:
-  // TODO: Implement SME when it matters.
-#include <CodeEmitter/ALUOps.inl>
-#include <CodeEmitter/BranchOps.inl>
-#include <CodeEmitter/LoadstoreOps.inl>
-#include <CodeEmitter/SystemOps.inl>
-#include <CodeEmitter/ScalarOps.inl>
-#include <CodeEmitter/ASIMDOps.inl>
-#include <CodeEmitter/SVEOps.inl>
-
-private:
-  template<typename T>
-  uint32_t Encode_ra(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  uint32_t Encode_ra(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rt2(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  template<>
-  uint32_t Encode_rt2(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rm(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rm(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rs(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rs(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rn(T Reg) const {
-    return Reg.Idx() << 5;
-  }
-  uint32_t Encode_rn(uint32_t Reg) const {
-    return Reg << 5;
-  }
-  template<typename T>
-  uint32_t Encode_rd(T Reg) const {
-    return Reg.Idx();
-  }
-  uint32_t Encode_rd(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_rt(T Reg) const {
-    return Reg.Idx();
-  }
-  template<>
-  uint32_t Encode_rt(Prefetch Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-  uint32_t Encode_rt(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_pd(T Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-};
-} // namespace ARMEmitter

CodeEmitter/CodeEmitter/VixlUtils.inl

@@ -1,351 +0,0 @@
-// Collection of utilities from vixl.
-// Following is the vixl license.
-// Copyright 2015, VIXL authors
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are met:
-//
-//   * Redistributions of source code must retain the above copyright notice,
-//     this list of conditions and the following disclaimer.
-//   * Redistributions in binary form must reproduce the above copyright notice,
-//     this list of conditions and the following disclaimer in the documentation
-//     and/or other materials provided with the distribution.
-//   * Neither the name of ARM Limited nor the names of its contributors may be
-//     used to endorse or promote products derived from this software without
-//     specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
-// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
-// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-
-// Test if a given value can be encoded in the immediate field of a logical
-// instruction.
-// If it can be encoded, the function returns true, and values pointed to by n,
-// imm_s and imm_r are updated with immediates encoded in the format required
-// by the corresponding fields in the logical instruction.
-// If it can not be encoded, the function returns false, and the values pointed
-// to by n, imm_s and imm_r are undefined.
-static bool IsImmLogical(uint64_t value,
-                             unsigned width,
-                             unsigned* n = nullptr,
-                             unsigned* imm_s = nullptr,
-                             unsigned* imm_r = nullptr) {
-  [[maybe_unused]] constexpr auto kBRegSize = 8;
-  [[maybe_unused]] constexpr auto kHRegSize = 16;
-  [[maybe_unused]] constexpr auto kSRegSize = 32;
-  [[maybe_unused]] constexpr auto kDRegSize = 64;
-
-  constexpr auto kWRegSize = 32;
-  constexpr auto kXRegSize = 64;
-
-  LOGMAN_THROW_A_FMT((width == kBRegSize) || (width == kHRegSize) ||
-              (width == kSRegSize) || (width == kDRegSize), "Unexpected imm size");
-
-  bool negate = false;
-
-  // Logical immediates are encoded using parameters n, imm_s and imm_r using
-  // the following table:
-  //
-  //    N   imms    immr    size        S             R
-  //    1  ssssss  rrrrrr    64    UInt(ssssss)  UInt(rrrrrr)
-  //    0  0sssss  xrrrrr    32    UInt(sssss)   UInt(rrrrr)
-  //    0  10ssss  xxrrrr    16    UInt(ssss)    UInt(rrrr)
-  //    0  110sss  xxxrrr     8    UInt(sss)     UInt(rrr)
-  //    0  1110ss  xxxxrr     4    UInt(ss)      UInt(rr)
-  //    0  11110s  xxxxxr     2    UInt(s)       UInt(r)
-  // (s bits must not be all set)
-  //
-  // A pattern is constructed of size bits, where the least significant S+1 bits
-  // are set. The pattern is rotated right by R, and repeated across a 32 or
-  // 64-bit value, depending on destination register width.
-  //
-  // Put another way: the basic format of a logical immediate is a single
-  // contiguous stretch of 1 bits, repeated across the whole word at intervals
-  // given by a power of 2. To identify them quickly, we first locate the
-  // lowest stretch of 1 bits, then the next 1 bit above that; that combination
-  // is different for every logical immediate, so it gives us all the
-  // information we need to identify the only logical immediate that our input
-  // could be, and then we simply check if that's the value we actually have.
-  //
-  // (The rotation parameter does give the possibility of the stretch of 1 bits
-  // going 'round the end' of the word. To deal with that, we observe that in
-  // any situation where that happens the bitwise NOT of the value is also a
-  // valid logical immediate. So we simply invert the input whenever its low bit
-  // is set, and then we know that the rotated case can't arise.)
-
-  if (value & 1) {
-    // If the low bit is 1, negate the value, and set a flag to remember that we
-    // did (so that we can adjust the return values appropriately).
-    negate = true;
-    value = ~value;
-  }
-
-  if (width <= kWRegSize) {
-    // To handle 8/16/32-bit logical immediates, the very easiest thing is to repeat
-    // the input value to fill a 64-bit word. The correct encoding of that as a
-    // logical immediate will also be the correct encoding of the value.
-
-    // Avoid making the assumption that the most-significant 56/48/32 bits are zero by
-    // shifting the value left and duplicating it.
-    for (unsigned bits = width; bits <= kWRegSize; bits *= 2) {
-      value <<= bits;
-      uint64_t mask = (UINT64_C(1) << bits) - 1;
-      value |= ((value >> bits) & mask);
-    }
-  }
-
-  // The basic analysis idea: imagine our input word looks like this.
-  //
-  //    0011111000111110001111100011111000111110001111100011111000111110
-  //                                                          c  b    a
-  //                                                          |<--d-->|
-  //
-  // We find the lowest set bit (as an actual power-of-2 value, not its index)
-  // and call it a. Then we add a to our original number, which wipes out the
-  // bottommost stretch of set bits and replaces it with a 1 carried into the
-  // next zero bit. Then we look for the new lowest set bit, which is in
-  // position b, and subtract it, so now our number is just like the original
-  // but with the lowest stretch of set bits completely gone. Now we find the
-  // lowest set bit again, which is position c in the diagram above. Then we'll
-  // measure the distance d between bit positions a and c (using CLZ), and that
-  // tells us that the only valid logical immediate that could possibly be equal
-  // to this number is the one in which a stretch of bits running from a to just
-  // below b is replicated every d bits.
-  uint64_t a = LowestSetBit(value);
-  uint64_t value_plus_a = value + a;
-  uint64_t b = LowestSetBit(value_plus_a);
-  uint64_t value_plus_a_minus_b = value_plus_a - b;
-  uint64_t c = LowestSetBit(value_plus_a_minus_b);
-
-  int d, clz_a, out_n;
-  uint64_t mask;
-
-  if (c != 0) {
-    // The general case, in which there is more than one stretch of set bits.
-    // Compute the repeat distance d, and set up a bitmask covering the basic
-    // unit of repetition (i.e. a word with the bottom d bits set). Also, in all
-    // of these cases the N bit of the output will be zero.
-    clz_a = CountLeadingZeros(a, kXRegSize);
-    int clz_c = CountLeadingZeros(c, kXRegSize);
-    d = clz_a - clz_c;
-    mask = ((UINT64_C(1) << d) - 1);
-    out_n = 0;
-  } else {
-    // Handle degenerate cases.
-    //
-    // If any of those 'find lowest set bit' operations didn't find a set bit at
-    // all, then the word will have been zero thereafter, so in particular the
-    // last lowest_set_bit operation will have returned zero. So we can test for
-    // all the special case conditions in one go by seeing if c is zero.
-    if (a == 0) {
-      // The input was zero (or all 1 bits, which will come to here too after we
-      // inverted it at the start of the function), for which we just return
-      // false.
-      return false;
-    } else {
-      // Otherwise, if c was zero but a was not, then there's just one stretch
-      // of set bits in our word, meaning that we have the trivial case of
-      // d == 64 and only one 'repetition'. Set up all the same variables as in
-      // the general case above, and set the N bit in the output.
-      clz_a = CountLeadingZeros(a, kXRegSize);
-      d = 64;
-      mask = ~UINT64_C(0);
-      out_n = 1;
-    }
-  }
-
-  // If the repeat period d is not a power of two, it can't be encoded.
-  if (!IsPowerOf2(d)) {
-    return false;
-  }
-
-  if (((b - a) & ~mask) != 0) {
-    // If the bit stretch (b - a) does not fit within the mask derived from the
-    // repeat period, then fail.
-    return false;
-  }
-
-  // The only possible option is b - a repeated every d bits. Now we're going to
-  // actually construct the valid logical immediate derived from that
-  // specification, and see if it equals our original input.
-  //
-  // To repeat a value every d bits, we multiply it by a number of the form
-  // (1 + 2^d + 2^(2d) + ...), i.e. 0x0001000100010001 or similar. These can
-  // be derived using a table lookup on CLZ(d).
-  static const uint64_t multipliers[] = {
-      0x0000000000000001UL,
-      0x0000000100000001UL,
-      0x0001000100010001UL,
-      0x0101010101010101UL,
-      0x1111111111111111UL,
-      0x5555555555555555UL,
-  };
-  uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57];
-  uint64_t candidate = (b - a) * multiplier;
-
-  if (value != candidate) {
-    // The candidate pattern doesn't match our input value, so fail.
-    return false;
-  }
-
-  // We have a match! This is a valid logical immediate, so now we have to
-  // construct the bits and pieces of the instruction encoding that generates
-  // it.
-
-  // Count the set bits in our basic stretch. The special case of clz(0) == -1
-  // makes the answer come out right for stretches that reach the very top of
-  // the word (e.g. numbers like 0xffffc00000000000).
-  int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize);
-  int s = clz_a - clz_b;
-
-  // Decide how many bits to rotate right by, to put the low bit of that basic
-  // stretch in position a.
-  int r;
-  if (negate) {
-    // If we inverted the input right at the start of this function, here's
-    // where we compensate: the number of set bits becomes the number of clear
-    // bits, and the rotation count is based on position b rather than position
-    // a (since b is the location of the 'lowest' 1 bit after inversion).
-    s = d - s;
-    r = (clz_b + 1) & (d - 1);
-  } else {
-    r = (clz_a + 1) & (d - 1);
-  }
-
-  // Now we're done, except for having to encode the S output in such a way that
-  // it gives both the number of set bits and the length of the repeated
-  // segment. The s field is encoded like this:
-  //
-  //     imms    size        S
-  //    ssssss    64    UInt(ssssss)
-  //    0sssss    32    UInt(sssss)
-  //    10ssss    16    UInt(ssss)
-  //    110sss     8    UInt(sss)
-  //    1110ss     4    UInt(ss)
-  //    11110s     2    UInt(s)
-  //
-  // So we 'or' (2 * -d) with our computed s to form imms.
-  if ((n != NULL) || (imm_s != NULL) || (imm_r != NULL)) {
-    *n = out_n;
-    *imm_s = ((2 * -d) | (s - 1)) & 0x3f;
-    *imm_r = r;
-  }
-
-  return true;
-}
-
-static inline bool IsIntN(unsigned n, int64_t x) {
-  if (n == 64) return true;
-  int64_t limit = INT64_C(1) << (n - 1);
-  return (-limit <= x) && (x < limit);
-}
-
-static inline bool IsUintN(unsigned n, int64_t x) {
-  // Convert to an unsigned integer to avoid implementation-defined behavior.
-  return !(static_cast<uint64_t>(x) >> n);
-}
-
-// clang-format off
-#define INT_1_TO_32_LIST(V)                                                    \
-V(1)  V(2)  V(3)  V(4)  V(5)  V(6)  V(7)  V(8)                                 \
-V(9)  V(10) V(11) V(12) V(13) V(14) V(15) V(16)                                \
-V(17) V(18) V(19) V(20) V(21) V(22) V(23) V(24)                                \
-V(25) V(26) V(27) V(28) V(29) V(30) V(31) V(32)
-
-#define INT_33_TO_63_LIST(V)                                                   \
-V(33) V(34) V(35) V(36) V(37) V(38) V(39) V(40)                                \
-V(41) V(42) V(43) V(44) V(45) V(46) V(47) V(48)                                \
-V(49) V(50) V(51) V(52) V(53) V(54) V(55) V(56)                                \
-V(57) V(58) V(59) V(60) V(61) V(62) V(63)
-
-#define INT_1_TO_63_LIST(V) INT_1_TO_32_LIST(V) INT_33_TO_63_LIST(V)
-
-// clang-format on
-
-#define DECLARE_IS_INT_N(N)                                       \
-  static inline bool IsInt##N(int64_t x) { return IsIntN(N, x); }
-
-#define DECLARE_IS_UINT_N(N)                                        \
-  static inline bool IsUint##N(int64_t x) { return IsUintN(N, x); }
-
-INT_1_TO_63_LIST(DECLARE_IS_INT_N)
-INT_1_TO_63_LIST(DECLARE_IS_UINT_N)
-
-#undef DECLARE_IS_INT_N
-#undef DECLARE_IS_UINT_N
-
-private:
-
-template <typename V>
-static inline bool IsPowerOf2(V value) {
-  return (value != 0) && ((value & (value - 1)) == 0);
-}
-
-// Some compilers dislike negating unsigned integers,
-// so we provide an equivalent.
-template <typename T>
-static inline T UnsignedNegate(T value) {
-  static_assert(std::is_unsigned<T>::value);
-  return ~value + 1;
-}
-
-static inline uint64_t LowestSetBit(uint64_t value) {
-  return value & UnsignedNegate(value);
-}
-
-template <typename V>
-static inline int CountLeadingZeros(V value, int width = (sizeof(V) * 8)) {
-#if COMPILER_HAS_BUILTIN_CLZ
-  if (width == 32) {
-    return (value == 0) ? 32 : __builtin_clz(static_cast<unsigned>(value));
-  } else if (width == 64) {
-    return (value == 0) ? 64 : __builtin_clzll(value);
-  }
-#endif
-  return CountLeadingZerosFallBack(value, width);
-}
-
-static inline int CountLeadingZerosFallBack(uint64_t value, int width) {
-  LOGMAN_THROW_A_FMT(IsPowerOf2(width) && (width <= 64), "Invalid width");
-  if (value == 0) {
-    return width;
-  }
-  int count = 0;
-  value = value << (64 - width);
-  if ((value & UINT64_C(0xffffffff00000000)) == 0) {
-    count += 32;
-    value = value << 32;
-  }
-  if ((value & UINT64_C(0xffff000000000000)) == 0) {
-    count += 16;
-    value = value << 16;
-  }
-  if ((value & UINT64_C(0xff00000000000000)) == 0) {
-    count += 8;
-    value = value << 8;
-  }
-  if ((value & UINT64_C(0xf000000000000000)) == 0) {
-    count += 4;
-    value = value << 4;
-  }
-  if ((value & UINT64_C(0xc000000000000000)) == 0) {
-    count += 2;
-    value = value << 2;
-  }
-  if ((value & UINT64_C(0x8000000000000000)) == 0) {
-    count += 1;
-  }
-  count += (value == 0);
-  return count;
-}
-
-public:

Data/AppConfig/VC_redist.x64.exe.json

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "x86dec_SynchronizeRIPOnAllBlocks": "1"
+  }
+}

Data/AppConfig/VC_redist.x86.exe.json

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "x86dec_SynchronizeRIPOnAllBlocks": "1"
+  }
+}

Data/AppConfig/client.json

@@ -1,5 +0,0 @@
-{
-  "Config": {
-    "HideHypervisorBit": "1"
-  }
-}

Data/AppConfig/steam.json.in

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "Env": "STEAM_GAME_LAUNCH_SHELL=@CMAKE_INSTALL_PREFIX@/bin/FEXBash"
+  }
+}

Data/AppConfig/steamwebhelper.json

@@ -1,6 +1,5 @@
 {
-  "Comment": "Bypasses libGL's glX and instead sends GLX requests directly via xcb",
-  "ThunksDB": {
-    "GL": 0
+  "Config": {
+    "AdditionalArguments": "--no-sandbox"
   }
 }

Data/AppConfig/vcredist_x64.exe.json

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "x86dec_SynchronizeRIPOnAllBlocks": "1"
+  }
+}

Data/AppConfig/vcredist_x86.exe.json

@@ -0,0 +1,5 @@
+{
+  "Config": {
+    "x86dec_SynchronizeRIPOnAllBlocks": "1"
+  }
+}

Data/ThunksDB.json

@@ -2,11 +2,14 @@
   "DB": {
     "GL": {
       "Library" : "libGL-guest.so",
+      "Depends": [
+        "X11"
+      ],
       "Overlay": [
-        "@PREFIX_LIB@/libGL.so",
-        "@PREFIX_LIB@/libGL.so.1",
-        "@PREFIX_LIB@/libGL.so.1.2.0",
-        "@PREFIX_LIB@/libGL.so.1.7.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGL.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGL.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGL.so.1.2.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGL.so.1.7.0"
       ]
     },
     "GLESv2": {
@@ -15,170 +18,159 @@
         "X11"
       ],
       "Overlay": [
-        "@PREFIX_LIB@/libGLESv2.so",
-        "@PREFIX_LIB@/libGLESv2.so.2",
-        "@PREFIX_LIB@/libGLESv2.so.2.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGLESv2.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGLESv2.so.2",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libGLESv2.so.2.0.0"
       ]
     },
     "X11": {
       "Library": "libX11-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libX11.so",
-        "@PREFIX_LIB@/libX11.so.6",
-        "@PREFIX_LIB@/libX11.so.6.4.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libX11.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libX11.so.6",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libX11.so.6.4.0"
       ]
     },
     "Vulkan": {
       "Library": "libvulkan-guest.so",
+      "Depends": [
+        "xcb"
+      ],
       "Overlay": [
-        "@PREFIX_LIB@/libvulkan.so",
-        "@PREFIX_LIB@/libvulkan.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libvulkan.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libvulkan.so.1",
         "@HOME@/.local/share/Steam/ubuntu12_32/steam-runtime/pinned_libs_64/libvulkan.so.1"
+      ],
+      "Comment": [
+        "Vulkan library relies on xcb, otherwise it crashes with jemalloc"
       ]
     },
     "xcb": {
-      "Depends": [
-        "X11"
-      ],
       "Library": "libxcb-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb.so",
-        "@PREFIX_LIB@/libxcb.so.1",
-        "@PREFIX_LIB@/libxcb.so.1.1.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb.so.1.1.0"
       ]
     },
     "xcb-dri2": {
       "Library": "libxcb-dri2-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-dri2.so",
-        "@PREFIX_LIB@/libxcb-dri2.so.0",
-        "@PREFIX_LIB@/libxcb-dri2.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri2.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri2.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri2.so.0.0.0"
       ]
     },
     "xcb-dri3": {
       "Library": "libxcb-dri3-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-dri3.so",
-        "@PREFIX_LIB@/libxcb-dri3.so.0",
-        "@PREFIX_LIB@/libxcb-dri3.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri3.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri3.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-dri3.so.0.0.0"
       ]
     },
     "xcb-xfixes": {
       "Library": "libxcb-xfixes-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-xfixes.so",
-        "@PREFIX_LIB@/libxcb-xfixes.so.0",
-        "@PREFIX_LIB@/libxcb-xfixes.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-xfixes.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-xfixes.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-xfixes.so.0.0.0"
       ]
     },
     "xcb-shm": {
       "Library": "libxcb-shm-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-shm.so",
-        "@PREFIX_LIB@/libxcb-shm.so.0",
-        "@PREFIX_LIB@/libxcb-shm.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-shm.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-shm.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-shm.so.0.0.0"
       ]
     },
     "xcb-sync": {
       "Library": "libxcb-sync-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-sync.so",
-        "@PREFIX_LIB@/libxcb-sync.so.1",
-        "@PREFIX_LIB@/libxcb-sync.so.1.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-sync.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-sync.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-sync.so.1.0.0"
       ]
     },
     "xcb-randr": {
       "Library": "libxcb-randr-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-randr.so",
-        "@PREFIX_LIB@/libxcb-randr.so.0",
-        "@PREFIX_LIB@/libxcb-randr.so.0.1.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-randr.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-randr.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-randr.so.0.1.0"
       ]
     },
     "xcb-present": {
       "Library": "libxcb-present-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-present.so",
-        "@PREFIX_LIB@/libxcb-present.so.0",
-        "@PREFIX_LIB@/libxcb-present.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-present.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-present.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-present.so.0.0.0"
       ]
     },
     "xcb-glx": {
       "Library": "libxcb-glx-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxcb-glx.so",
-        "@PREFIX_LIB@/libxcb-glx.so.0",
-        "@PREFIX_LIB@/libxcb-glx.so.0.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-glx.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-glx.so.0",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxcb-glx.so.0.0.0"
       ]
     },
     "xshmfence": {
       "Library": "libxshmfence-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libxshmfence.so",
-        "@PREFIX_LIB@/libxshmfence.so.1",
-        "@PREFIX_LIB@/libxshmfence.so.1.0.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxshmfence.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxshmfence.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libxshmfence.so.1.0.0"
       ]
     },
     "drm": {
       "Library": "libdrm-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libdrm.so",
-        "@PREFIX_LIB@/libdrm.so.2",
-        "@PREFIX_LIB@/libdrm.so.2.4.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libdrm.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libdrm.so.2",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libdrm.so.2.4.0"
       ]
     },
     "asound": {
       "Library": "libasound-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libasound.so",
-        "@PREFIX_LIB@/libasound.so.2",
-        "@PREFIX_LIB@/libasound.so.2.0.0"
-      ]
-    },
-    "fex_thunk_test": {
-      "Library": "libfex_thunk_test-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libfex_thunk_test.so"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libasound.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libasound.so.2",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libasound.so.2.0.0"
       ]
     },
     "Xrender": {
       "Library": "libXrender-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libXrender.so",
-        "@PREFIX_LIB@/libXrender.so.1",
-        "@PREFIX_LIB@/libXrender.so.1.3.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXrender.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXrender.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXrender.so.1.3.0"
       ]
     },
     "Xext": {
       "Library": "libXext-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libXext.so",
-        "@PREFIX_LIB@/libXext.so.6",
-        "@PREFIX_LIB@/libXext.so.6.4.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXext.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXext.so.6",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXext.so.6.4.0"
       ]
     },
     "Xfixes": {
       "Library": "libXfixes-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libXfixes.so",
-        "@PREFIX_LIB@/libXfixes.so.3",
-        "@PREFIX_LIB@/libXfixes.so.3.1.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXfixes.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXfixes.so.3",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libXfixes.so.3.1.0"
       ]
     },
     "OpenCL": {
       "Library" : "libOpenCL-guest.so",
       "Overlay": [
-        "@PREFIX_LIB@/libOpenCL.so",
-        "@PREFIX_LIB@/libOpenCL.so.1",
-        "@PREFIX_LIB@/libOpenCL.so.1.0.0"
-      ]
-    },
-    "WaylandClient": {
-      "Library" : "libwayland-client-guest.so",
-      "Overlay": [
-        "@PREFIX_LIB@/libwayland-client.so",
-        "@PREFIX_LIB@/libwayland-client.so.0",
-        "@PREFIX_LIB@/libwayland-client.so.0.20.0"
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libOpenCL.so",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libOpenCL.so.1",
+        "@PREFIX_LIB@/@PREFIX_ARCH@-linux-gnu/libOpenCL.so.1.0.0"
       ]
     },
     "":{}

Data/binfmts/CMakeLists.txt

@@ -13,14 +13,5 @@ function(GenBinFmt Name)
     DESTINATION ${CMAKE_INSTALL_PREFIX}/share/binfmts/)
 endfunction()
 
-if (NOT USE_LEGACY_BINFMTMISC)
-  configure_file(FEX-x86.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf)
-  configure_file(FEX-x86_64.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf)
-
-  install(
-    FILES ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf
-    DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/binfmt.d/)
-else()
-  GenBinFmt(FEX-x86.in)
-  GenBinFmt(FEX-x86_64.in)
-endif()
+GenBinFmt(FEX-x86.in)
+GenBinFmt(FEX-x86_64.in)

Data/binfmts/FEX-x86.conf.in

@@ -1 +0,0 @@
-:FEX-x86:M:0:\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF

Data/binfmts/FEX-x86_64.conf.in

@@ -1 +0,0 @@
-:FEX-x86_64:M:0:\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF

Dockerfile

@@ -3,12 +3,11 @@ FROM ubuntu:20.04 as builder
 
 RUN DEBIAN_FRONTEND="noninteractive" apt-get update
 RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
-clang-10 llvm-10 nasm ninja-build pkg-config \
-libcap-dev libglfw3-dev libepoxy-dev python3-dev libsdl2-dev \
-python3 linux-headers-generic \
-git
+clang-10 llvm-10 nasm ninja-build \
+libcap-dev libglfw3-dev libepoxy-dev python3-dev \
+python3 linux-headers-generic
 
-RUN git clone --recurse-submodules https://github.com/FEX-Emu/FEX.git
+COPY . /opt/FEX
 
 CMD [ "mkdir /opt/FEX/build" ]
 

External/FEXCore/CMakeLists.txt

@@ -13,6 +13,17 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^aarch64|^arm64|^armv8\.*")
   set(_M_ARM_64 1)
 endif()
 
+if (ENABLE_VIXL_SIMULATOR)
+  # If the vixl simulator is enabled then we are using the ARM64 JIT
+  option(ENABLE_JIT_X86_64 "Enable the x86_64 JIT" FALSE)
+  option(ENABLE_JIT_ARM64 "Enable the ARM64 JIT" TRUE)
+else()
+  option(ENABLE_JIT_X86_64 "Enable the x86_64 JIT" ${_M_X86_64})
+  option(ENABLE_JIT_ARM64 "Enable the ARM64 JIT" ${_M_ARM_64})
+endif()
+
+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
+
 set(CMAKE_POSITION_INDEPENDENT_CODE ON)
 cmake_policy(SET CMP0083 NEW) # Follow new PIE policy
 include(CheckPIESupported)
@@ -22,7 +33,6 @@ set(CMAKE_INCLUDE_CURRENT_DIR ON)
 
 include(CheckCXXCompilerFlag)
 include(CheckIncludeFileCXX)
-include(CheckCXXSourceCompiles)
 
 if (EXISTS ${CMAKE_CURRENT_DIR}/External/vixl/)
     # Useful to have for freestanding libFEXCore
@@ -67,7 +77,6 @@ configure_file(
 
 include_directories(${CMAKE_BINARY_DIR}/generated)
 
-add_compile_options(-fno-exceptions)
 add_subdirectory(Source/)
 
 install (DIRECTORY include/FEXCore ${CMAKE_BINARY_DIR}/include/FEXCore

External/FEXCore/Scripts/config_generator.py

@@ -22,14 +22,12 @@ def print_header():
 #define OPT_UINT64(group, enum, json, default) OPT_BASE(uint64_t, group, enum, json, default)
 #endif
 #ifndef OPT_STR
-#define OPT_STR(group, enum, json, default) OPT_BASE(fextl::string, group, enum, json, default)
+#define OPT_STR(group, enum, json, default) OPT_BASE(std::string, group, enum, json, default)
 #endif
 #ifndef OPT_STRARRAY
-#define OPT_STRARRAY(group, enum, json, default) OPT_BASE(fextl::string, group, enum, json, default)
-#endif
-#ifndef OPT_STRENUM
-#define OPT_STRENUM(group, enum, json, default) OPT_BASE(uint64_t, group, enum, json, default)
+#define OPT_STRARRAY(group, enum, json, default) OPT_BASE(std::string, group, enum, json, default)
 #endif
+
 '''
     output_file.write(header)
 
@@ -42,7 +40,6 @@ def print_tail():
 #undef OPT_UINT64
 #undef OPT_STR
 #undef OPT_STRARRAY
-#undef OPT_STRENUM
 '''
     output_file.write(tail)
 
@@ -130,13 +127,12 @@ def print_man_options(options):
                 short = op_vals["ShortArg"]
 
             default = op_vals["Default"]
-            value_type = op_vals["Type"]
 
             # Textual default rather than enum based
             if ("TextDefault" in op_vals):
                 default = op_vals["TextDefault"]
 
-            if (value_type == "str" or value_type == "strarray" or value_type == "strenum"):
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
                 # Wrap the string argument in quotes
                 default = "'" + default + "'"
             print_man_option(
@@ -145,11 +141,6 @@ def print_man_options(options):
                 op_vals["Desc"],
                 default
             )
-            if (value_type == "strenum"):
-                Enums = op_vals["Enums"]
-                output_man.write("\\fBAvailable Options:\\fR\n")
-                output_man.write(", ".join(f"{enum_op_val}" for [_, enum_op_val] in Enums.items()))
-                output_man.write("\n.sp\n")
 
     output_man.write(".El\n")
 
@@ -159,13 +150,12 @@ def print_man_environment(options):
     for op_group, group_vals in options.items():
         for op_key, op_vals in group_vals.items():
             default = op_vals["Default"]
-            value_type = op_vals["Type"]
 
             # Textual default rather than enum based
             if ("TextDefault" in op_vals):
                 default = op_vals["TextDefault"]
 
-            if (value_type == "str" or value_type == "strarray" or value_type == "strenum"):
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
                 # Wrap the string argument in quotes
                 default = "'" + default + "'"
             print_man_env_option(
@@ -175,12 +165,6 @@ def print_man_environment(options):
                 False
             )
 
-            if (value_type == "strenum"):
-                Enums = op_vals["Enums"]
-                output_man.write("\\fBAvailable Options:\\fR\n")
-                output_man.write(", ".join(f"{enum_op_val}" for [_, enum_op_val] in Enums.items()))
-                output_man.write("\n.sp\n")
-
     print_man_environment_tail()
     output_man.write(".El\n")
 
@@ -217,14 +201,6 @@ def print_man_environment_tail():
     ],
     "''", True)
 
-    print_man_env_option(
-    "FEX_PORTABLE",
-    [
-    "Allows FEX to run without installation. Global locations for configuration and binfmt_misc are ignored. These files are instead read from <FEXInterpreterPath>/fex-emu/ by default.",
-    "For further customization, see FEX_APP_CONFIG_LOCATION and FEX_APP_DATA_LOCATION."
-    ],
-    "''", True)
-
 def print_man_header():
     header ='''.Dd {0}
 .Dt FEX
@@ -358,7 +334,7 @@ def print_argloader_options(options):
         for op_key, op_vals in group_vals.items():
             default = op_vals["Default"]
 
-            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray" or op_vals["Type"] == "strenum"):
+            if (op_vals["Type"] == "str" or op_vals["Type"] == "strarray"):
                 # Wrap the string argument in quotes
                 default = "\"" + default + "\""
 
@@ -395,21 +371,15 @@ def print_parse_argloader_options(options):
 
             value_type = op_vals["Type"]
             NeedsString = False
-            conversion_func = "fextl::fmt::format(\"{}\", "
+            conversion_func = "std::to_string"
             if ("ArgumentHandler" in op_vals):
                 NeedsString = True
-                conversion_func = "FEXCore::Config::Handler::{0}(".format(op_vals["ArgumentHandler"])
+                conversion_func = "FEXCore::Config::Handler::{0}".format(op_vals["ArgumentHandler"])
             if (value_type == "str"):
                 NeedsString = True
-                conversion_func = "std::move("
-            if (value_type == "bool"):
-                # boolean values need a decimal specifier. Otherwise fmt prints strings.
-                conversion_func = "fextl::fmt::format(\"{:d}\", "
+                conversion_func = ""
 
-            if (value_type == "strenum"):
-                output_argloader.write("\tfextl::string UserValue = Options[\"{0}\"];\n".format(op_key))
-                output_argloader.write("\tSet(FEXCore::Config::ConfigOption::CONFIG_{}, FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, UserValue));\n".format(op_key.upper(), op_key, op_key, op_key))
-            elif (value_type == "strarray"):
+            if (value_type == "strarray"):
                 # these need a bit more help
                 output_argloader.write("\tauto Array = Options.all(\"{0}\");\n".format(op_key))
                 output_argloader.write("\tfor (auto iter = Array.begin(); iter != Array.end(); ++iter) {\n")
@@ -417,11 +387,11 @@ def print_parse_argloader_options(options):
                 output_argloader.write("\t}\n")
             else:
                 if (NeedsString):
-                    output_argloader.write("\tfextl::string UserValue = Options[\"{0}\"];\n".format(op_key))
+                    output_argloader.write("\tstd::string UserValue = Options[\"{0}\"];\n".format(op_key))
                 else:
                     output_argloader.write("\t{0} UserValue = Options.get(\"{1}\");\n".format(value_type, op_key))
 
-                output_argloader.write("\tSet(FEXCore::Config::ConfigOption::CONFIG_{0}, {1}UserValue));\n".format(op_key.upper(), conversion_func))
+                output_argloader.write("\tSet(FEXCore::Config::ConfigOption::CONFIG_{0}, {1}(UserValue));\n".format(op_key.upper(), conversion_func))
             output_argloader.write("}\n")
 
     output_argloader.write("#endif\n")
@@ -434,74 +404,13 @@ def print_parse_envloader_options(options):
 
     for op_group, group_vals in options.items():
         for op_key, op_vals in group_vals.items():
-            value_type = op_vals["Type"]
-            if (value_type == "strenum"):
-                output_argloader.write("else if (Key == \"FEX_{0}\") {{\n".format(op_key.upper()))
-                output_argloader.write("Value = FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, Value_View);\n".format(op_key, op_key, op_key))
-                output_argloader.write("}\n")
-
             if ("ArgumentHandler" in op_vals):
                 conversion_func = "FEXCore::Config::Handler::{0}".format(op_vals["ArgumentHandler"])
                 output_argloader.write("else if (Key == \"FEX_{0}\") {{\n".format(op_key.upper()))
-                output_argloader.write("Value = {0}(Value_View);\n".format(conversion_func))
+                output_argloader.write("Value = {0}(Value);\n".format(conversion_func))
                 output_argloader.write("}\n")
     output_argloader.write("#endif\n")
 
-def print_parse_jsonloader_options(options):
-    output_argloader.write("#ifdef JSONLOADER\n")
-    output_argloader.write("#undef JSONLOADER\n")
-    output_argloader.write("if (false) {}\n")
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            value_type = op_vals["Type"]
-            if (value_type == "strenum"):
-                output_argloader.write("else if (KeyName == \"{0}\") {{\n".format(op_key))
-                output_argloader.write("Set(KeyOption, FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, Value_View));\n".format(op_key, op_key, op_key))
-                output_argloader.write("}\n")
-
-    output_argloader.write("else {{\n".format(op_key))
-    output_argloader.write("Set(KeyOption, ConfigString);\n")
-    output_argloader.write("}\n")
-
-    output_argloader.write("#endif\n")
-
-def print_parse_enum_options(options):
-    output_argloader.write("#ifdef ENUMDEFINES\n")
-    output_argloader.write("#undef ENUMDEFINES\n")
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            if (op_vals["Type"] == "strenum"):
-                output_argloader.write("enum class {} : uint64_t {{\n".format(op_key))
-                Enums = op_vals["Enums"]
-                i = 0
-                # Always have an OFF.
-                output_argloader.write("\tOFF = 0,\n")
-                for enum_op_key, enum_op_vals in Enums.items():
-                    output_argloader.write("\t{} = 1ULL << {},\n".format(enum_op_key.upper(), i))
-                    i += 1
-
-                output_argloader.write("};\n")
-                output_argloader.write("FEX_DEF_NUM_OPS({})\n".format(op_key))
-
-
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            if (op_vals["Type"] == "strenum"):
-                Enums = op_vals["Enums"]
-
-                output_argloader.write("using {}ConfigPair = std::pair<std::string_view, FEXCore::Config::{}>;\n".format(op_key, op_key))
-                output_argloader.write("constexpr static std::array<{}ConfigPair, {}> {}_EnumPairs = {{{{\n".format(op_key, len(Enums) + 1, op_key))
-                i = 0
-                # Always have an OFF.
-                output_argloader.write("\t{{ \"off\", FEXCore::Config::{}::OFF }},\n".format(op_key))
-                for enum_op_key, enum_op_vals in Enums.items():
-                    output_argloader.write("\t{{ \"{}\", FEXCore::Config::{}::{} }},\n".format(enum_op_vals, op_key, enum_op_key.upper()))
-                    i += 1
-
-                output_argloader.write("}};\n")
-
-    output_argloader.write("#endif\n")
-
 def check_for_duplicate_options(options):
     short_map = []
     long_map = []
@@ -580,10 +489,4 @@ print_parse_argloader_options(options);
 # Generate environment loader code
 print_parse_envloader_options(options);
 
-# Generate json loader code
-print_parse_jsonloader_options(options);
-
-# Generate enum variable options
-print_parse_enum_options(options);
-
 output_argloader.close()

External/FEXCore/Scripts/json_ir_generator.py

@@ -2,7 +2,6 @@
 import json
 import sys
 from dataclasses import dataclass, field
-import textwrap
 
 def ExitError(msg):
     print(msg)
@@ -47,17 +46,11 @@ class OpDefinition:
     NumElements: str
     OpClass: str
     HasSideEffects: bool
-    ImplicitFlagClobber: bool
     RAOverride: int
     SwitchGen: bool
     ArgPrinter: bool
     SSAArgNum: int
     NonSSAArgNum: int
-    DynamicDispatch: bool
-    LoweredX87: bool
-    JITDispatch: bool
-    JITDispatchOverride: str
-    TiedSource: int
     Arguments: list
     EmitValidation: list
     Desc: list
@@ -71,17 +64,11 @@ class OpDefinition:
         self.OpClass = None
         self.OpSize = 0
         self.HasSideEffects = False
-        self.ImplicitFlagClobber = False
         self.RAOverride = -1
         self.SwitchGen = True
         self.ArgPrinter = True
         self.SSAArgNum = 0
         self.NonSSAArgNum = 0
-        self.DynamicDispatch = False
-        self.LoweredX87 = False
-        self.JITDispatch = True
-        self.JITDispatchOverride = None
-        self.TiedSource = -1
         self.Arguments = []
         self.EmitValidation = []
         self.Desc = []
@@ -125,36 +112,21 @@ def parse_ops(ops):
 
             RHS = EqualSplit[0].strip()
             if len(EqualSplit) > 1:
-                LHS = EqualSplit[0].strip()
+                OpDef.HasDest = True
                 RHS = EqualSplit[1].strip()
 
-                if ":" in LHS:
-                    # Named destinations. This is a hack, but so is the entire
-                    # multi-destination support bolten onto the old IR...
-                    #
-                    # Named destinations require side effects because they break
-                    # SSA hard. Validate that.
-                    assert("HasSideEffects" in op_val and op_val["HasSideEffects"])
-
-                    for Dest in LHS.split(","):
-                        Dest = Dest.strip()
-                        DType, Name = Dest.split(":$")
-
-                        # If the destination appears also as a source, it is
-                        # read-modify-write.
-                        if Dest in RHS:
-                            # Turn RMW into an in/out source
-                            RHS = RHS.replace(Dest.strip(), f"{DType}:$Inout{Name}")
-                        else:
-                            # Turn named destinations into an out source.
-                            RHS += f", {DType}:$Out{Name}"
+                # Parse the destination, must be one type of SSA, GPR, or FPR
+                ResultType = EqualSplit[0].strip()
+                if ResultType == "SSA":
+                    OpDef.DestType = "SSA" # We don't know this type right now
+                elif ResultType == "GPR":
+                    OpDef.DestType = "GPR"
+                elif ResultType == "GPRPair":
+                    OpDef.DestType = "GPRPair"
+                elif ResultType == "FPR":
+                    OpDef.DestType = "FPR"
                 else:
-                    # Single anonymous destination
-                    if LHS not in ["SSA", "GPR", "GPRPair", "FPR"]:
-                        ExitError(f"Unknown destination class type {LHS}. Needs to be one of SSA, GPR, GPRPair, FPR")
-
-                    OpDef.HasDest = True
-                    OpDef.DestType = LHS
+                    ExitError("Unknown destination class type {}. Needs to be one of {SSA, GPR, GPRPair, FPR}".format(ResultType))
 
             # IR Op needs to start with a name
             RHS = RHS.split(" ", 1)
@@ -172,7 +144,7 @@ def parse_ops(ops):
                     Argument = Argument.strip()
                     OpArg = OpArgument()
 
-                    Split = Argument.split(":", 1)
+                    Split = Argument.split(":")
                     if len(Split) != 2:
                         ExitError("Error parsing argument. Missing Type and name colon split")
 
@@ -222,7 +194,7 @@ def parse_ops(ops):
                         (OpArg.Type == "GPR" or
                         OpArg.Type == "GPRPair" or
                         OpArg.Type == "FPR")):
-                        OpDef.EmitValidation.append(f"GetOpRegClass({ArgName}) == InvalidClass || WalkFindRegClass({ArgName}) == {OpArg.Type}Class")
+                        OpDef.EmitValidation.append("GetOpRegClass({}) == InvalidClass || WalkFindRegClass({}) == {}Class".format(NameWithPrefix, NameWithPrefix, OpArg.Type))
 
                     OpArg.Name = ArgName
                     OpArg.NameWithPrefix = NameWithPrefix
@@ -241,9 +213,6 @@ def parse_ops(ops):
             if "HasSideEffects" in op_val:
                 OpDef.HasSideEffects = bool(op_val["HasSideEffects"])
 
-            if "ImplicitFlagClobber" in op_val:
-                OpDef.ImplicitFlagClobber = bool(op_val["ImplicitFlagClobber"])
-
             if "ArgPrinter" in op_val:
                 OpDef.ArgPrinter = bool(op_val["ArgPrinter"])
 
@@ -259,32 +228,17 @@ def parse_ops(ops):
             if "Desc" in op_val:
                 OpDef.Desc = op_val["Desc"]
 
-            if "DynamicDispatch" in op_val:
-                OpDef.DynamicDispatch = bool(op_val["DynamicDispatch"])
-
-            if "JITDispatch" in op_val:
-                OpDef.JITDispatch = bool(op_val["JITDispatch"])
-
-            if "JITDispatchOverride" in op_val:
-                OpDef.JITDispatchOverride = op_val["JITDispatchOverride"]
-
-            if "X87" in op_val:
-                OpDef.LoweredX87 = op_val["X87"]
-
-                # X87 implies !JITDispatch
-                assert("JITDispatch" not in op_val)
-                OpDef.JITDispatch = False
-
-            if "TiedSource" in op_val:
-                OpDef.TiedSource = op_val["TiedSource"]
-
             # Do some fixups of the data here
             if len(OpDef.EmitValidation) != 0:
                 for i in range(len(OpDef.EmitValidation)):
                     # Patch up all the argument names
                     for Arg in OpDef.Arguments:
-                        # Temporary ops just replace all instances no prefix variant
-                        OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, Arg.Name)
+                        if Arg.Temporary:
+                            # Temporary ops just replace all instances no prefix variant
+                            OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, Arg.Name)
+                        else:
+                            # All other ops replace $ with _ variant for argument passed in
+                            OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, "_{}".format(Arg.Name))
 
             #OpDef.print()
 
@@ -297,8 +251,11 @@ def parse_ops(ops):
 
 # Print out enum values
 def print_enums():
+    if len(IROps) > 255:
+        ExitError("We have more than uint8_t ops. We have {}. Time to upgrade to uint16_t".format(len(IROps)))
+
     output_file.write("#ifdef IROP_ENUM\n")
-    output_file.write("enum IROps : uint16_t {\n")
+    output_file.write("enum IROps : uint8_t {\n")
 
     for op in IROps:
         output_file.write("\tOP_{},\n" .format(op.Name.upper()))
@@ -324,7 +281,9 @@ def print_ir_structs(defines):
     output_file.write("\tvoid* Data[0];\n")
     output_file.write("\tIROps Op;\n\n")
     output_file.write("\tuint8_t Size;\n")
-    output_file.write("\tuint8_t ElementSize;\n")
+    output_file.write("\tuint8_t NumArgs;\n")
+    output_file.write("\tuint8_t ElementSize : 7;\n")
+    output_file.write("\tbool HasDest : 1;\n")
 
     output_file.write("\ttemplate<typename T>\n")
     output_file.write("\tT const* C() const { return reinterpret_cast<T const*>(Data); }\n")
@@ -334,7 +293,6 @@ def print_ir_structs(defines):
     output_file.write("\tOrderedNodeWrapper Args[0];\n")
 
     output_file.write("};\n\n");
-    output_file.write("static_assert(sizeof(IROp_Header) == sizeof(uint32_t), \"IROp_Header should be 32-bits in size\");\n\n");
 
     # Now the user defined types
     output_file.write("// User defined IR Op structs\n")
@@ -389,28 +347,22 @@ def print_ir_sizes():
         if op.Name == "Last":
             output_file.write("\t-1ULL,\n")
         else:
-            output_file.write(f"\tsizeof(IROp_{op.Name}),\n")
+            output_file.write("\tsizeof(IROp_{}),\n".format(op.Name))
 
-    output_file.write(textwrap.dedent("""
-    };
+    output_file.write("};\n\n")
 
-    // Make sure our array maps directly to the IROps enum
-    static_assert(IRSizes[IROps::OP_LAST] == -1ULL);
+    output_file.write("// Make sure our array maps directly to the IROps enum\n")
+    output_file.write("static_assert(IRSizes[IROps::OP_LAST] == -1ULL);\n\n")
 
-    [[maybe_unused, nodiscard]] static size_t GetSize(IROps Op) { return IRSizes[Op]; }
-    [[nodiscard, gnu::const, gnu::visibility("default")]] std::string_view const& GetName(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] uint8_t GetArgs(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] uint8_t GetRAArgs(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] FEXCore::IR::RegisterClassType GetRegClass(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool HasSideEffects(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool ImplicitFlagClobber(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool GetHasDest(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool LoweredX87(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] int8_t TiedSource(IROps Op);
+    output_file.write("[[maybe_unused, nodiscard]] static size_t GetSize(IROps Op) { return IRSizes[Op]; }\n\n")
 
-    #undef IROP_SIZES
-    #endif
-    """))
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] std::string_view const& GetName(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] uint8_t GetArgs(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] FEXCore::IR::RegisterClassType GetRegClass(IROps Op);\n\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool HasSideEffects(IROps Op);\n")
+
+    output_file.write("#undef IROP_SIZES\n")
+    output_file.write("#endif\n\n")
 
 def print_ir_reg_classes():
     output_file.write("#ifdef IROP_REG_CLASSES_IMPL\n")
@@ -465,7 +417,7 @@ def print_ir_getname():
 def print_ir_getraargs():
     output_file.write("#ifdef IROP_GETRAARGS_IMPL\n")
 
-    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> IRRAArgs = {\n")
+    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> IRArgs = {\n")
     for op in IROps:
         SSAArgs = op.SSAArgNum
 
@@ -478,18 +430,6 @@ def print_ir_getraargs():
 
     output_file.write("};\n\n")
 
-
-    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> IRArgs = {\n")
-    for op in IROps:
-        SSAArgs = op.SSAArgNum
-        output_file.write("\t{},\n".format(SSAArgs))
-
-    output_file.write("};\n\n")
-
-    output_file.write("uint8_t GetRAArgs(IROps Op) {\n")
-    output_file.write("  return IRRAArgs[Op];\n")
-    output_file.write("}\n")
-
     output_file.write("uint8_t GetArgs(IROps Op) {\n")
     output_file.write("  return IRArgs[Op];\n")
     output_file.write("}\n")
@@ -500,49 +440,17 @@ def print_ir_getraargs():
 def print_ir_hassideeffects():
     output_file.write("#ifdef IROP_HASSIDEEFFECTS_IMPL\n")
 
-    for prop, T in [
-        ("HasSideEffects", "bool"),
-        ("ImplicitFlagClobber", "bool"),
-        ("LoweredX87", "bool"),
-        ("TiedSource", "int8_t"),
-    ]:
-        output_file.write(
-            f"constexpr std::array<{'uint8_t' if T == 'bool' else T}, OP_LAST + 1> {prop}_ = {{\n"
-        )
-        for op in IROps:
-            if T == "bool":
-                output_file.write(
-                    "\t{},\n".format(("true" if getattr(op, prop) else "false"))
-                )
-            else:
-                output_file.write(f"\t{getattr(op, prop)},\n")
-
-        output_file.write("};\n\n")
-
-        output_file.write(f"{T} {prop}(IROps Op) {{\n")
-        output_file.write(f"  return {prop}_[Op];\n")
-        output_file.write("}\n")
-
-    output_file.write("#undef IROP_HASSIDEEFFECTS_IMPL\n")
-    output_file.write("#endif\n\n")
-
-def print_ir_gethasdest():
-    output_file.write("#ifdef IROP_GETHASDEST_IMPL\n")
-
-    output_file.write("constexpr std::array<bool, OP_LAST + 1> IRDest = {\n")
+    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> SideEffects = {\n")
     for op in IROps:
-        if op.HasDest:
-            output_file.write("\ttrue,\n")
-        else:
-            output_file.write("\tfalse,\n")
+        output_file.write("\t{},\n".format(("true" if op.HasSideEffects else "false")))
 
     output_file.write("};\n\n")
 
-    output_file.write("bool GetHasDest(IROps Op) {\n")
-    output_file.write("  return IRDest[Op];\n")
+    output_file.write("bool HasSideEffects(IROps Op) {\n")
+    output_file.write("  return SideEffects[Op];\n")
     output_file.write("}\n")
 
-    output_file.write("#undef IROP_GETHASDEST_IMPL\n")
+    output_file.write("#undef IROP_HASSIDEEFFECTS_IMPL\n")
     output_file.write("#endif\n\n")
 
 # Print out IR argument printing
@@ -560,20 +468,14 @@ def print_ir_arg_printer():
             output_file.write("\t*out << \" \";\n")
 
             SSAArgNum = 0
-            FirstArg = True
             for i in range(0, len(op.Arguments)):
                 arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0
 
-                # No point printing temporaries that we can't recover
                 if arg.Temporary:
-                    continue
-
-                if FirstArg:
-                    FirstArg = False
-                else:
-                    output_file.write('\t*out << ", ";\n')
-
-                if arg.IsSSA:
+                    # Temporary that we can't recover
+                    output_file.write("\t*out << \"{}:Tmp:{}\";\n".format(arg.Type, arg.Name))
+                elif arg.IsSSA:
                     # SSA value
                     output_file.write("\tPrintArg(out, IR, Op->Header.Args[{}], RAData);\n".format(SSAArgNum))
                     SSAArgNum = SSAArgNum + 1
@@ -581,6 +483,9 @@ def print_ir_arg_printer():
                     # User defined op that is stored
                     output_file.write("\tPrintArg(out, IR, Op->{});\n".format(arg.Name))
 
+                if not LastArg:
+                    output_file.write("\t*out << \", \";\n")
+
         output_file.write("break;\n")
         output_file.write("}\n")
 
@@ -642,13 +547,13 @@ def print_ir_allocator_helpers():
 
     output_file.write("\tuint8_t GetOpElements(const OrderedNode *Op) const {\n")
     output_file.write("\t\tauto HeaderOp = Op->Header.Value.GetNode(DualListData.DataBegin());\n")
-    output_file.write("\t\tLOGMAN_THROW_A_FMT(OpHasDest(Op), \"Op {} has no dest\\n\", GetName(HeaderOp->Op));\n")
+    output_file.write("\t\tLOGMAN_THROW_A_FMT(HeaderOp->HasDest, \"Op {} has no dest\\n\", GetName(HeaderOp->Op));\n")
     output_file.write("\t\treturn HeaderOp->Size / HeaderOp->ElementSize;\n")
     output_file.write("\t}\n\n")
 
     output_file.write("\tbool OpHasDest(const OrderedNode *Op) const {\n")
     output_file.write("\t\tauto HeaderOp = Op->Header.Value.GetNode(DualListData.DataBegin());\n")
-    output_file.write("\t\treturn GetHasDest(HeaderOp->Op);\n")
+    output_file.write("\t\treturn HeaderOp->HasDest;\n")
     output_file.write("\t}\n\n")
 
     output_file.write("\tIROps GetOpType(const OrderedNode *Op) const {\n")
@@ -679,11 +584,11 @@ def print_ir_allocator_helpers():
                     output_file.write("{} {}".format(CType, arg.Name));
                 elif arg.IsSSA:
                     # SSA value
-                    output_file.write("OrderedNode *{}".format(arg.Name))
+                    output_file.write("OrderedNode *_{}".format(arg.Name))
                 else:
                     # User defined op that is stored
                     CType = IRTypesToCXX[arg.Type].CXXName
-                    output_file.write("{} {}".format(CType, arg.Name));
+                    output_file.write("{} _{}".format(CType, arg.Name));
 
                 if arg.DefaultInitializer != None:
                     output_file.write(" = {}".format(arg.DefaultInitializer))
@@ -693,32 +598,23 @@ def print_ir_allocator_helpers():
 
             output_file.write(") {\n")
 
-            # Save NZCV if needed before clobbering NZCV
-            if op.ImplicitFlagClobber:
-                output_file.write("\t\tSaveNZCV(IROps::OP_{});".format(op.Name.upper()))
-
-            # We gather the "has x87?" flag as we go. This saves the user from
-            # having to keep track of whether they emitted any x87.
-            if op.LoweredX87:
-                output_file.write("\t\tRecordX87Use();\n")
-
-            output_file.write("\t\tauto _Op = AllocateOp<IROp_{}, IROps::OP_{}>();\n".format(op.Name, op.Name.upper()))
+            output_file.write("\t\tauto Op = AllocateOp<IROp_{}, IROps::OP_{}>();\n".format(op.Name, op.Name.upper()))
 
             if op.SSAArgNum != 0:
                 output_file.write("\t\tauto ListDataBegin = DualListData.ListBegin();\n")
                 for arg in op.Arguments:
                     if arg.IsSSA:
-                        output_file.write("\t\t_Op.first->{} = {}->Wrapped(ListDataBegin);\n".format(arg.Name, arg.Name))
+                        output_file.write("\t\tOp.first->{} = _{}->Wrapped(ListDataBegin);\n".format(arg.Name, arg.Name))
 
             if op.SSAArgNum != 0:
                 for arg in op.Arguments:
                     if arg.IsSSA:
-                        output_file.write("\t\t{}->AddUse();\n".format(arg.Name))
+                        output_file.write("\t\t_{}->AddUse();\n".format(arg.Name))
 
             if len(op.Arguments) != 0:
                 for arg in op.Arguments:
                     if not arg.Temporary and not arg.IsSSA:
-                        output_file.write("\t\t_Op.first->{} = {};\n".format(arg.Name, arg.Name))
+                        output_file.write("\t\tOp.first->{} = _{};\n".format(arg.Name, arg.Name))
 
             if (op.HasDest):
                 # We can only infer a size if we have arguments
@@ -728,70 +624,92 @@ def print_ir_allocator_helpers():
                     if len(op.Arguments) != 0:
                         for arg in op.Arguments:
                             if arg.IsSSA:
-                                output_file.write("\t\tuint8_t Size{} = GetOpSize({});\n".format(arg.Name, arg.Name))
+                                output_file.write("\t\tuint8_t Size{} = GetOpSize(_{});\n".format(arg.Name, arg.Name))
                         for arg in op.Arguments:
                             if arg.IsSSA:
                                 output_file.write("\t\tInferSize = std::max(InferSize, Size{});\n".format(arg.Name))
 
-                    output_file.write("\t\t_Op.first->Header.Size = InferSize;\n")
+                    output_file.write("\t\tOp.first->Header.Size = InferSize;\n")
+
+            output_file.write("\t\tOp.first->Header.NumArgs = {};\n".format(op.SSAArgNum))
 
             # Some ops without a destination still need an operating size
             # Effectively reusing the destination size value for operation size
             if op.DestSize != None:
-                output_file.write("\t\t_Op.first->Header.Size = {};\n".format(op.DestSize))
+                output_file.write("\t\tOp.first->Header.Size = {};\n".format(op.DestSize))
 
             if op.NumElements == None:
-                output_file.write("\t\t_Op.first->Header.ElementSize = _Op.first->Header.Size / ({});\n".format(1))
+                output_file.write("\t\tOp.first->Header.ElementSize = Op.first->Header.Size / ({});\n".format(1))
             else:
-                output_file.write("\t\t_Op.first->Header.ElementSize = _Op.first->Header.Size / ({});\n".format(op.NumElements))
+                output_file.write("\t\tOp.first->Header.ElementSize = Op.first->Header.Size / ({});\n".format(op.NumElements))
+
+            if (op.HasDest):
+                output_file.write("\t\tOp.first->Header.HasDest = true;\n")
 
             # Insert validation here
             if op.EmitValidation != None:
                 output_file.write("\t\t#if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED\n")
 
                 for Validation in op.EmitValidation:
-                    Sanitized = Validation.replace("\"", "\\\"")
-                    output_file.write("\tLOGMAN_THROW_A_FMT({}, \"{}\");\n".format(Validation, Sanitized))
+                    output_file.write("\t\tassert({});\n".format(Validation))
                 output_file.write("\t\t#endif\n")
 
-            output_file.write("\t\treturn _Op;\n")
+            output_file.write("\t\treturn Op;\n")
             output_file.write("\t}\n\n")
 
     output_file.write("#undef IROP_ALLOCATE_HELPERS\n")
     output_file.write("#endif\n")
 
-def print_ir_dispatcher_defs():
-    output_dispatch_file.write("#ifdef IROP_DISPATCH_DEFS\n")
+def print_ir_parser_switch_helper():
+    output_file.write("#ifdef IROP_PARSER_SWITCH_HELPERS\n")
     for op in IROps:
-        if op.Name != "Last" and op.SwitchGen and op.JITDispatch and op.JITDispatchOverride == None:
-            output_dispatch_file.write("DEF_OP({});\n".format(op.Name))
+        if op.Name != "Last" and op.SwitchGen:
+            output_file.write("\tcase FEXCore::IR::IROps::OP_%s: {\n" % (op.Name.upper()))
 
-    output_dispatch_file.write("#undef IROP_DISPATCH_DEFS\n")
-    output_dispatch_file.write("#endif\n")
+            for i in range(0, len(op.Arguments)):
+                arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0
 
-def print_ir_dispatcher_dispatch():
-    output_dispatch_file.write("#ifdef IROP_DISPATCH_DISPATCH\n")
-    for op in IROps:
-        if op.Name != "Last" and op.JITDispatch:
-            DispatchName = op.Name
-            if op.JITDispatchOverride != None:
-                DispatchName = op.JITDispatchOverride
+                if arg.Temporary:
+                    CType = IRTypesToCXX[arg.Type].CXXName
+                    output_file.write("\t\tauto arg{} = DecodeValue<{}>(Def.Args[{}]);\n".format(i, CType, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
+                elif arg.IsSSA:
+                    # SSA value
+                    output_file.write("\t\tauto arg{} = DecodeValue<OrderedNode*>(Def.Args[{}]);\n".format(i, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
+                else:
+                    # User defined op that is stored
+                    CType = IRTypesToCXX[arg.Type].CXXName
+                    output_file.write("\t\tauto arg{} = DecodeValue<{}>(Def.Args[{}]);\n".format(i, CType, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
 
-            if (op.DynamicDispatch):
-                output_dispatch_file.write("REGISTER_OP_RT({}, {});\n".format(op.Name.upper(), DispatchName))
-            else:
-                output_dispatch_file.write("REGISTER_OP({}, {});\n".format(op.Name.upper(), DispatchName))
+            output_file.write("\t\tDef.Node = _{}(\n".format(op.Name))
 
-    output_dispatch_file.write("#undef IROP_DISPATCH_DISPATCH\n")
-    output_dispatch_file.write("#endif\n")
+            for i in range(0, len(op.Arguments)):
+                arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0
+                output_file.write("\t\t\targ{}.second".format(i))
+                if not LastArg:
+                    output_file.write(",\n")
+                else:
+                    output_file.write("\n")
+
+            output_file.write("\t\t);\n")
+
+            output_file.write("\t\tSSANameMapper[Def.Definition] = Def.Node;\n")
+
+            output_file.write("\t\tbreak;\n")
+            output_file.write("\t}\n")
 
 
-if (len(sys.argv) < 4):
+    output_file.write("#undef IROP_PARSER_SWITCH_HELPERS\n")
+    output_file.write("#endif\n")
+
+if (len(sys.argv) < 3):
     ExitError()
 
 output_filename = sys.argv[2]
-output_dispatcher_filename = sys.argv[3]
-
 json_file = open(sys.argv[1], "r")
 json_text = json_file.read()
 json_file.close()
@@ -815,15 +733,8 @@ print_ir_reg_classes()
 print_ir_getname()
 print_ir_getraargs()
 print_ir_hassideeffects()
-print_ir_gethasdest()
 print_ir_arg_printer()
 print_ir_allocator_helpers()
+print_ir_parser_switch_helper()
 
 output_file.close()
-
-output_dispatch_file = open(output_dispatcher_filename, "w")
-print_ir_dispatcher_defs()
-print_ir_dispatcher_dispatch()
-
-output_dispatch_file.close()
-

External/FEXCore/Source/CMakeLists.txt

@@ -1,21 +1,13 @@
-include(GNUInstallDirs)
-set (MAN_DIR share/man CACHE PATH "MAN_DIR")
+set (MAN_DIR ${CMAKE_INSTALL_PREFIX}/share/man CACHE PATH "MAN_DIR")
 
 set (FEXCORE_BASE_SRCS
+  Common/Paths.cpp
   Interface/Config/Config.cpp
-  Utils/Allocator.cpp
-  Utils/CPUInfo.cpp
   Utils/FileLoading.cpp
   Utils/ForcedAssert.cpp
   Utils/LogManager.cpp
-  Utils/SpinWaitLock.cpp
   )
 
-if (NOT MINGW_BUILD)
-  list(APPEND FEXCORE_BASE_SRCS
-    Utils/Allocator/64BitAllocator.cpp)
-endif()
-
 set (SRCS
   Common/JitSymbols.cpp
   Common/SoftFloat-3e/extF80_add.c
@@ -68,6 +60,7 @@ set (SRCS
   Common/SoftFloat-3e/s_approxRecipSqrt32_1.c
   Common/SoftFloat-3e/s_approxRecipSqrt_1Ks.c
   Common/SoftFloat-3e/softfloat_raiseFlags.c
+  Common/SoftFloat-3e/softfloat_state.c
   Common/SoftFloat-3e/f64_to_extF80.c
   Common/SoftFloat-3e/s_commonNaNToExtF80UI.c
   Common/SoftFloat-3e/s_normSubnormalF64Sig.c
@@ -86,38 +79,35 @@ set (SRCS
   Common/SoftFloat-3e/s_f32UIToCommonNaN.c
   Interface/Context/Context.cpp
   Interface/Core/LookupCache.cpp
+  Interface/Core/BlockSamplingData.cpp
   Interface/Core/Core.cpp
   Interface/Core/CPUBackend.cpp
   Interface/Core/CPUID.cpp
   Interface/Core/Frontend.cpp
+  Interface/Core/GdbServer.cpp
+  Interface/Core/HostFeatures.cpp
   Interface/Core/ObjectCache/JobHandling.cpp
   Interface/Core/ObjectCache/NamedRegionObjectHandler.cpp
   Interface/Core/ObjectCache/ObjectCacheService.cpp
-  Interface/Core/OpcodeDispatcher/AVX_128.cpp
   Interface/Core/OpcodeDispatcher/Crypto.cpp
   Interface/Core/OpcodeDispatcher/Flags.cpp
   Interface/Core/OpcodeDispatcher/Vector.cpp
   Interface/Core/OpcodeDispatcher/X87.cpp
   Interface/Core/OpcodeDispatcher/X87F64.cpp
   Interface/Core/OpcodeDispatcher.cpp
+  Interface/Core/SignalDelegator.cpp
   Interface/Core/X86Tables.cpp
+  Interface/Core/X86DebugInfo.cpp
   Interface/Core/X86HelperGen.cpp
+  Interface/Core/ArchHelpers/Arm64_stubs.cpp
   Interface/Core/ArchHelpers/Arm64Emitter.cpp
   Interface/Core/Dispatcher/Dispatcher.cpp
-  Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp
-  Interface/Core/JIT/Arm64/JIT.cpp
-  Interface/Core/JIT/Arm64/ALUOps.cpp
-  Interface/Core/JIT/Arm64/AtomicOps.cpp
-  Interface/Core/JIT/Arm64/BranchOps.cpp
-  Interface/Core/JIT/Arm64/ConversionOps.cpp
-  Interface/Core/JIT/Arm64/EncryptionOps.cpp
-  Interface/Core/JIT/Arm64/MemoryOps.cpp
-  Interface/Core/JIT/Arm64/MiscOps.cpp
-  Interface/Core/JIT/Arm64/MoveOps.cpp
-  Interface/Core/JIT/Arm64/VectorOps.cpp
-  Interface/Core/JIT/Arm64/Arm64Relocations.cpp
+  Interface/Core/Dispatcher/X86Dispatcher.cpp
+  Interface/Core/Dispatcher/Arm64Dispatcher.cpp
+  Interface/Core/Interpreter/InterpreterFallbacks.cpp
   Interface/Core/X86Tables/BaseTables.cpp
   Interface/Core/X86Tables/DDDTables.cpp
+  Interface/Core/X86Tables/EVEXTables.cpp
   Interface/Core/X86Tables/H0F38Tables.cpp
   Interface/Core/X86Tables/H0F3ATables.cpp
   Interface/Core/X86Tables/PrimaryGroupTables.cpp
@@ -127,35 +117,57 @@ set (SRCS
   Interface/Core/X86Tables/VEXTables.cpp
   Interface/Core/X86Tables/X87Tables.cpp
   Interface/Core/X86Tables/XOPTables.cpp
+  Interface/HLE/Thunks/Thunks.cpp
   Interface/GDBJIT/GDBJIT.cpp
   Interface/IR/AOTIR.cpp
   Interface/IR/IRDumper.cpp
+  Interface/IR/IRParser.cpp
   Interface/IR/IREmitter.cpp
   Interface/IR/PassManager.cpp
   Interface/IR/Passes/ConstProp.cpp
-  Interface/IR/Passes/IRDumperPass.cpp
+  Interface/IR/Passes/DeadCodeElimination.cpp
+  Interface/IR/Passes/DeadContextStoreElimination.cpp
+  Interface/IR/Passes/IRCompaction.cpp
   Interface/IR/Passes/IRValidation.cpp
   Interface/IR/Passes/RAValidation.cpp
+  Interface/IR/Passes/LongDivideRemovalPass.cpp
+  Interface/IR/Passes/ValueDominanceValidation.cpp
+  Interface/IR/Passes/PhiValidation.cpp
   Interface/IR/Passes/RedundantFlagCalculationElimination.cpp
+  Interface/IR/Passes/DeadStoreElimination.cpp
   Interface/IR/Passes/RegisterAllocationPass.cpp
-  Interface/IR/Passes/x87StackOptimizationPass.cpp
+  Interface/IR/Passes/SyscallOptimization.cpp
+  Utils/Allocator.cpp
+  Utils/Allocator/64BitAllocator.cpp
+  Utils/NetStream.cpp
   Utils/Telemetry.cpp
   Utils/Threads.cpp
   Utils/Profiler.cpp
   )
 
-if (_M_ARM_64)
-  list(APPEND SRCS Utils/ArchHelpers/Arm64.cpp)
-else()
-  list(APPEND SRCS Utils/ArchHelpers/Arm64_stubs.cpp)
+if (ENABLE_INTERPRETER)
+  list(APPEND SRCS
+    Interface/Core/Interpreter/InterpreterCore.cpp
+    Interface/Core/Interpreter/InterpreterOps.cpp
+    Interface/Core/Interpreter/ALUOps.cpp
+    Interface/Core/Interpreter/AtomicOps.cpp
+    Interface/Core/Interpreter/BranchOps.cpp
+    Interface/Core/Interpreter/ConversionOps.cpp
+    Interface/Core/Interpreter/EncryptionOps.cpp
+    Interface/Core/Interpreter/F80Ops.cpp
+    Interface/Core/Interpreter/FlagOps.cpp
+    Interface/Core/Interpreter/MemoryOps.cpp
+    Interface/Core/Interpreter/MiscOps.cpp
+    Interface/Core/Interpreter/MoveOps.cpp
+    Interface/Core/Interpreter/VectorOps.cpp)
 endif()
 
-if (ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
-  list(APPEND FEXCORE_BASE_SRCS
-    Utils/AllocatorOverride.cpp)
+if(_M_ARM_64)
+  list(APPEND SRCS
+    Interface/Core/ArchHelpers/Arm64.cpp)
 endif()
 
-set(DEFINES -DJIT_ARM64)
+set(DEFINES -DTHREAD_LOCAL=_Thread_local)
 
 if (_M_X86_64)
   list(APPEND DEFINES -D_M_X86_64=1)
@@ -165,32 +177,54 @@ if (_M_ARM_64)
   list(APPEND DEFINES -D_M_ARM_64=1)
 endif()
 
+if (ENABLE_VIXL_SIMULATOR)
+  # We can run the simulator on both x86-64 or AArch64 hosts
+  list(APPEND DEFINES -DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
+endif()
+
 if (ENABLE_VIXL_DISASSEMBLER)
   list(APPEND DEFINES -DVIXL_DISASSEMBLER=1)
 endif()
 
-if (_M_ARM_64 AND HAS_CLANG_PRESERVE_ALL)
-  list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=__attribute__((preserve_all));-DFEXCORE_HAS_PRESERVE_ALL_ATTR=1")
-else()
-  list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=;-DFEXCORE_HAS_PRESERVE_ALL_ATTR=0")
+if (ENABLE_JIT_X86_64)
+  list(APPEND SRCS
+    Interface/Core/JIT/x86_64/JIT.cpp
+    Interface/Core/JIT/x86_64/ALUOps.cpp
+    Interface/Core/JIT/x86_64/AtomicOps.cpp
+    Interface/Core/JIT/x86_64/BranchOps.cpp
+    Interface/Core/JIT/x86_64/ConversionOps.cpp
+    Interface/Core/JIT/x86_64/EncryptionOps.cpp
+    Interface/Core/JIT/x86_64/FlagOps.cpp
+    Interface/Core/JIT/x86_64/MemoryOps.cpp
+    Interface/Core/JIT/x86_64/MiscOps.cpp
+    Interface/Core/JIT/x86_64/MoveOps.cpp
+    Interface/Core/JIT/x86_64/VectorOps.cpp
+    Interface/Core/JIT/x86_64/x64Relocations.cpp
+    )
+  list(APPEND DEFINES -DJIT_X86_64)
 endif()
 
-# Some defines for the softfloat library
-list(APPEND DEFINES "-DSOFTFLOAT_BUILTIN_CLZ")
-
-set (LIBS fmt::fmt xxHash::xxhash FEXHeaderUtils CodeEmitter)
-
-if (ENABLE_VIXL_DISASSEMBLER OR ENABLE_VIXL_SIMULATOR)
-  list (APPEND LIBS vixl)
+if (ENABLE_JIT_ARM64)
+  list(APPEND DEFINES -DJIT_ARM64)
+  list(APPEND SRCS
+    Interface/Core/JIT/Arm64/JIT.cpp
+    Interface/Core/JIT/Arm64/ALUOps.cpp
+    Interface/Core/JIT/Arm64/AtomicOps.cpp
+    Interface/Core/JIT/Arm64/BranchOps.cpp
+    Interface/Core/JIT/Arm64/ConversionOps.cpp
+    Interface/Core/JIT/Arm64/EncryptionOps.cpp
+    Interface/Core/JIT/Arm64/FlagOps.cpp
+    Interface/Core/JIT/Arm64/MemoryOps.cpp
+    Interface/Core/JIT/Arm64/MiscOps.cpp
+    Interface/Core/JIT/Arm64/MoveOps.cpp
+    Interface/Core/JIT/Arm64/VectorOps.cpp
+    Interface/Core/JIT/Arm64/Arm64Relocations.cpp
+    )
 endif()
 
-if (NOT MINGW_BUILD)
-  list (APPEND LIBS dl)
-else()
-  list (APPEND LIBS synchronization)
-  if (_M_ARM_64EC)
-    list (APPEND LIBS kernelbase)
-  endif()
+set (LIBS fmt::fmt vixl dl xxhash tiny-json FEXHeaderUtils)
+if (ENABLE_JEMALLOC)
+  list (APPEND LIBS FEX_jemalloc)
 endif()
 
 # Generate config
@@ -201,16 +235,15 @@ configure_file(
 # Generate IR include file
 set(OUTPUT_IR_FOLDER "${CMAKE_BINARY_DIR}/include/FEXCore/IR")
 set(OUTPUT_NAME "${OUTPUT_IR_FOLDER}/IRDefines.inc")
-set(OUTPUT_DISPATCHER_NAME "${OUTPUT_IR_FOLDER}/IRDefines_Dispatch.inc")
 set(INPUT_NAME "${CMAKE_CURRENT_SOURCE_DIR}/Interface/IR/IR.json")
 
 file(MAKE_DIRECTORY "${OUTPUT_IR_FOLDER}")
 
 add_custom_command(
-  OUTPUT "${OUTPUT_NAME}" "${OUTPUT_DISPATCHER_NAME}"
+  OUTPUT "${OUTPUT_NAME}"
   DEPENDS "${INPUT_NAME}"
   DEPENDS "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_generator.py"
-  COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_generator.py" "${INPUT_NAME}" "${OUTPUT_NAME}" "${OUTPUT_DISPATCHER_NAME}"
+  COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/json_ir_generator.py" "${INPUT_NAME}" "${OUTPUT_NAME}"
   )
 
 set_source_files_properties(${OUTPUT_NAME} PROPERTIES
@@ -298,7 +331,7 @@ function(AddDefaultOptionsToTarget Name)
   target_include_directories(${Name} PUBLIC "${CMAKE_BINARY_DIR}/include/")
 
   target_compile_definitions(${Name} PRIVATE ${DEFINES})
-  add_dependencies(${Name} CONFIG_INC IR_INC)
+  add_dependencies(${Name} CONFIG_INC)
 
   target_compile_options(${Name}
     PRIVATE
@@ -340,9 +373,9 @@ AddDefaultOptionsToTarget(FEXCore_Base)
 
 function(AddObject Name Type)
   add_library(${Name} ${Type} ${SRCS})
+  add_dependencies(${Name} IR_INC)
 
   target_link_libraries(${Name} FEXCore_Base)
-  target_compile_options(${Name} PRIVATE ${FEX_TUNE_COMPILE_FLAGS})
   AddDefaultOptionsToTarget(${Name})
 
   set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore)
@@ -351,7 +384,6 @@ endfunction()
 function(AddLibrary Name Type)
   add_library(${Name} ${Type} $<TARGET_OBJECTS:${PROJECT_NAME}_object>)
   target_link_libraries(${Name} FEXCore_Base)
-  target_compile_options(${Name} PRIVATE ${FEX_TUNE_COMPILE_FLAGS})
   set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore)
 
   AddDefaultOptionsToTarget(${Name})
@@ -361,31 +393,10 @@ AddObject(${PROJECT_NAME}_object OBJECT)
 AddLibrary(${PROJECT_NAME} STATIC)
 AddLibrary(${PROJECT_NAME}_shared SHARED)
 
-if (NOT MINGW_BUILD)
-  install(TARGETS ${PROJECT_NAME}_shared
-    LIBRARY
-      DESTINATION ${CMAKE_INSTALL_LIBDIR}
-      COMPONENT Libraries)
-endif()
-
-# Meta-library to link jemalloc libraries enabled in the build configuration.
-# Only needed for targets that run emulation. For others, use JemallocDummy.
-add_library(JemallocLibs STATIC Utils/AllocatorHooks.cpp)
-if (ENABLE_JEMALLOC)
-  target_compile_definitions(JemallocLibs PRIVATE ENABLE_JEMALLOC=1 JEMALLOC_NO_RENAME=1)
-  target_link_libraries(JemallocLibs PUBLIC FEX_jemalloc)
-endif()
-if (ENABLE_JEMALLOC_GLIBC_ALLOC)
-  set_source_files_properties(Interface/HLE/Thunks/Thunks.cpp PROPERTIES COMPILE_DEFINITIONS ENABLE_JEMALLOC_GLIBC=1)
-  target_link_libraries(JemallocLibs INTERFACE FEX_jemalloc_glibc)
-endif()
-
-if (NOT MINGW_BUILD)
-  # Dummy project to use for host tools.
-  # This overrides use of jemalloc in FEXCore with the normal glibc allocator.
-  add_library(JemallocDummy STATIC Utils/AllocatorHooks.cpp)
-  target_include_directories(JemallocDummy PRIVATE "${PROJECT_SOURCE_DIR}/include/")
-endif()
-
-# The shared library should always link enabled jemalloc libraries
-target_link_libraries(${PROJECT_NAME}_shared JemallocLibs)
+install(TARGETS ${PROJECT_NAME} ${PROJECT_NAME}_shared
+  LIBRARY
+    DESTINATION lib
+    COMPONENT Libraries
+  ARCHIVE
+    DESTINATION lib
+    COMPONENT Libraries)

External/FEXCore/Source/Common/BitSet.h

@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: MIT
 #pragma once
 
 #include <FEXCore/Utils/Allocator.h>
@@ -18,14 +17,14 @@ struct BitSet final {
   constexpr static size_t MinimumSize = sizeof(ElementType);
   constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;
 
-  ElementType* Memory;
+  ElementType *Memory;
   void Allocate(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
     LOGMAN_THROW_AA_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
     Memory = static_cast<ElementType*>(FEXCore::Allocator::malloc(AllocateSize));
   }
   void Realloc(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
     LOGMAN_THROW_AA_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
     Memory = static_cast<ElementType*>(FEXCore::Allocator::realloc(Memory, AllocateSize));
   }
@@ -43,13 +42,10 @@ struct BitSet final {
     Memory[Element / MinimumSizeBits] &= (1ULL << (Element % MinimumSizeBits));
   }
   void MemClear(size_t Elements) {
-    memset(Memory, 0, ToBytes(Elements));
+    memset(Memory, 0, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
   }
   void MemSet(size_t Elements) {
-    memset(Memory, 0xFF, ToBytes(Elements));
-  }
-  uint32_t ToBytes(size_t Elements) {
-    return AlignUp(Elements, MinimumSizeBits) / MinimumSize;
+    memset(Memory, 0xFF, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
   }
 
   // This very explicitly doesn't let you take an address
@@ -65,10 +61,11 @@ struct BitSetView final {
   constexpr static size_t MinimumSize = sizeof(ElementType);
   constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;
 
-  ElementType* Memory;
+  ElementType *Memory;
 
-  void GetView(BitSet<T>& Set, uint64_t ElementOffset) {
-    LOGMAN_THROW_AA_FMT((ElementOffset % MinimumSize) == 0, "Bitset view offset needs to be aligned to size of backing element");
+  void GetView(BitSet<T> &Set, uint64_t ElementOffset) {
+    LOGMAN_THROW_AA_FMT((ElementOffset % MinimumSize) == 0,
+                       "Bitset view offset needs to be aligned to size of backing element");
     Memory = &Set.Memory[ElementOffset / MinimumSizeBits];
   }
 

External/FEXCore/Source/Common/JitSymbols.cpp

@@ -0,0 +1,64 @@
+#include "Common/JitSymbols.h"
+
+#include <string>
+#include <unistd.h>
+
+#include <fmt/format.h>
+
+namespace FEXCore {
+  JITSymbols::JITSymbols() : fp{nullptr, std::fclose} {
+  }
+
+  JITSymbols::~JITSymbols() = default;
+
+  void JITSymbols::InitFile() {
+    const auto PerfMap = fmt::format("/tmp/perf-{}.map", getpid());
+
+    fp.reset(fopen(PerfMap.c_str(), "wb"));
+    if (fp) {
+      // Disable buffering on this file
+      setvbuf(fp.get(), nullptr, _IONBF, 0);
+    }
+  }
+
+  void JITSymbols::Register(const void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    fmt::print(fp.get(), "{} {:x} JIT_0x{:x}_{}\n", HostAddr, CodeSize, GuestAddr, HostAddr);
+  }
+
+  void JITSymbols::Register(const void *HostAddr, uint32_t CodeSize, std::string_view Name) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    fmt::print(fp.get(), "{} {:x} {}_{}\n", HostAddr, CodeSize, Name, HostAddr);
+  }
+
+  void JITSymbols::Register(const void *HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    fmt::print(fp.get(), "{} {:x} {}+0x{:x} ({})\n", HostAddr, CodeSize, Name, Offset, HostAddr);
+  }
+
+  void JITSymbols::RegisterNamedRegion(const void *HostAddr, uint32_t CodeSize, std::string_view Name) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    fmt::print(fp.get(), "{} {:x} {}\n", HostAddr, CodeSize, Name);
+  }
+
+  void JITSymbols::RegisterJITSpace(const void *HostAddr, uint32_t CodeSize) {
+    if (!fp) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    fmt::print(fp.get(), "{} {:x} FEXJIT\n", HostAddr, CodeSize);
+  }
+
+} // namespace FEXCore

External/FEXCore/Source/Common/JitSymbols.h

@@ -0,0 +1,26 @@
+#pragma once
+
+#include <cstdint>
+#include <cstdio>
+#include <memory>
+#include <string_view>
+
+namespace FEXCore {
+class JITSymbols final {
+public:
+  JITSymbols();
+  ~JITSymbols();
+
+  void InitFile();
+  void Register(const void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize);
+  void Register(const void *HostAddr, uint32_t CodeSize, std::string_view Name);
+  void Register(const void *HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset);
+  void RegisterNamedRegion(const void *HostAddr, uint32_t CodeSize, std::string_view Name);
+  void RegisterJITSpace(const void *HostAddr, uint32_t CodeSize);
+
+private:
+  using FILEPtr = std::unique_ptr<FILE, decltype(&std::fclose)>;
+
+  FILEPtr fp;
+};
+}

External/FEXCore/Source/Common/Paths.cpp

@@ -0,0 +1,91 @@
+#include "Common/Paths.h"
+#include <FEXCore/Utils/LogManager.h>
+
+#include <cstdlib>
+#include <filesystem>
+#include <memory>
+#include <pwd.h>
+#include <system_error>
+#include <unistd.h>
+
+namespace FEXCore::Paths {
+  std::unique_ptr<std::string> CachePath;
+  std::unique_ptr<std::string> EntryCache;
+
+  char const* FindUserHomeThroughUID() {
+    auto passwd = getpwuid(geteuid());
+    if (passwd) {
+      return passwd->pw_dir;
+    }
+    return nullptr;
+  }
+
+  const char *GetHomeDirectory() {
+    char const *HomeDir = getenv("HOME");
+
+    // Try to get home directory from uid
+    if (!HomeDir) {
+      HomeDir = FindUserHomeThroughUID();
+    }
+
+    // try the PWD
+    if (!HomeDir) {
+      HomeDir = getenv("PWD");
+    }
+
+    // Still doesn't exit? You get local
+    if (!HomeDir) {
+      HomeDir = ".";
+    }
+
+    return HomeDir;
+  }
+
+  void InitializePaths() {
+    CachePath = std::make_unique<std::string>();
+    EntryCache = std::make_unique<std::string>();
+
+    char const *HomeDir = getenv("HOME");
+
+    if (!HomeDir) {
+      HomeDir = getenv("PWD");
+    }
+
+    if (!HomeDir) {
+      HomeDir = ".";
+    }
+
+    char *XDGDataDir = getenv("XDG_DATA_DIR");
+    if (XDGDataDir) {
+      *CachePath = XDGDataDir;
+    }
+    else {
+      if (HomeDir) {
+        *CachePath = HomeDir;
+      }
+    }
+
+    *CachePath += "/.fex-emu/";
+    *EntryCache = *CachePath + "/EntryCache/";
+
+    std::error_code ec{};
+    // Ensure the folder structure is created for our Data
+    if (!std::filesystem::exists(*EntryCache, ec) &&
+        !std::filesystem::create_directories(*EntryCache, ec)) {
+      LogMan::Msg::DFmt("Couldn't create EntryCache directory: '{}'", *EntryCache);
+    }
+  }
+
+  void ShutdownPaths() {
+    CachePath.reset();
+    EntryCache.reset();
+  }
+
+  std::string GetCachePath() {
+    return *CachePath;
+  }
+
+  std::string GetEntryCachePath() {
+    return *EntryCache;
+  }
+}

External/FEXCore/Source/Common/Paths.h

@@ -0,0 +1,12 @@
+#pragma once
+#include <string>
+
+namespace FEXCore::Paths {
+  void InitializePaths();
+  void ShutdownPaths();
+
+  const char *GetHomeDirectory();
+
+  std::string GetCachePath();
+  std::string GetEntryCachePath();
+}

External/FEXCore/Source/Common/SoftFloat-3e/extF80_add.c

@@ -40,8 +40,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "internals.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -53,7 +52,7 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
     bool signB;
     extFloat80_t
         (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 
     uA.f = a;
     uiA64 = uA.s.signExp;
@@ -65,6 +64,6 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
     signB = signExtF80UI64( uiB64 );
     magsFuncPtr =
         (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_div.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -107,7 +106,7 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
     if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
         if ( ! sigB ) {
             if ( ! sigA ) goto invalid;
-            softfloat_raiseFlags( state, softfloat_flag_infinite );
+            softfloat_raiseFlags( softfloat_flag_infinite );
             goto infinity;
         }
         normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
@@ -169,18 +168,18 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
     sigZExtra = (uint64_t) ((uint_fast64_t) q<<41);
     return
         softfloat_roundPackToExtF80(
-            state, signZ, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_eq.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_eq( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -62,7 +61,7 @@ bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
                softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
             || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
         ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
         }
         return false;
     }

External/FEXCore/Source/Common/SoftFloat-3e/extF80_lt.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_lt( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -59,7 +58,7 @@ bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
     uiB64 = uB.s.signExp;
     uiB0  = uB.s.signif;
     if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return false;
     }
     signA = signExtF80UI64( uiA64 );

External/FEXCore/Source/Common/SoftFloat-3e/extF80_mul.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -125,11 +124,11 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
     }
     return
         softfloat_roundPackToExtF80(
-            state, signZ, expZ, sig128Z.v64, sig128Z.v0, state->roundingPrecision );
+            signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
@@ -137,7 +136,7 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
     *------------------------------------------------------------------------*/
  infArg:
     if ( ! magBits ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         uiZ64 = defaultNaNExtF80UI64;
         uiZ0  = defaultNaNExtF80UI0;
     } else {

External/FEXCore/Source/Common/SoftFloat-3e/extF80_rem.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -193,18 +192,18 @@ extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat
     }
     return
         softfloat_normRoundPackToExtF80(
-            state, signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
+            signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
     goto uiZ;
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_roundToInt.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
- extF80_roundToInt( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64, signUI64;
@@ -80,7 +79,7 @@ extFloat80_t
     if ( 0x403E <= exp ) {
         if ( exp == 0x7FFF ) {
             if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-                uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, sigA, 0, 0 );
+                uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 );
                 uiZ64 = uiZ.v64;
                 sigZ  = uiZ.v0;
                 goto uiZ;
@@ -93,7 +92,7 @@ extFloat80_t
         goto uiZ;
     }
     if ( exp <= 0x3FFE ) {
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
         switch ( roundingMode ) {
          case softfloat_round_near_even:
             if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;
@@ -145,7 +144,7 @@ extFloat80_t
 #ifdef SOFTFLOAT_ROUND_ODD
         if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
     }
  uiZ:
     uZ.s.signExp = uiZ64;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_sqrt.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
+extFloat80_t extF80_sqrt( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -74,7 +73,7 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( expA == 0x7FFF ) {
         if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, 0, 0 );
+            uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;
             goto uiZ;
@@ -155,11 +154,11 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
     }
     return
         softfloat_roundPackToExtF80(
-            state, 0, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            0, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
     uiZ64 = defaultNaNExtF80UI64;
     uiZ0  = defaultNaNExtF80UI0;
     goto uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/extF80_sub.c

@@ -40,8 +40,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "internals.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -54,7 +53,7 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
 #if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
     extFloat80_t
         (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 #endif
 
     uA.f = a;
@@ -67,14 +66,14 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
     signB = signExtF80UI64( uiB64 );
 #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
     if ( signA == signB ) {
-        return softfloat_subMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
     } else {
-        return softfloat_addMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
     }
 #else
     magsFuncPtr =
         (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 #endif
 
 }

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f128.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
+float128_t extF80_to_f128( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -61,7 +60,7 @@ float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
     exp = expExtF80UI64( uiA64 );
     frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
     if ( (exp == 0x7FFF) && frac ) {
-        softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+        softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
         uiZ = softfloat_commonNaNToF128UI( &commonNaN );
     } else {
         sign = signExtF80UI64( uiA64 );

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f32.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
+float32_t extF80_to_f32( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -66,7 +65,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToF32UI( &commonNaN );
         } else {
             uiZ = packToF32UI( sign, 0xFF, 0 );
@@ -86,7 +85,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
     if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
         if ( exp < -0x1000 ) exp = -0x1000;
     }
-    return softfloat_roundPackToF32( state, sign, exp, sig32 );
+    return softfloat_roundPackToF32( sign, exp, sig32 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_f64.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
+float64_t extF80_to_f64( extFloat80_t a )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -72,7 +71,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToF64UI( &commonNaN );
         } else {
             uiZ = packToF64UI( sign, 0x7FF, 0 );
@@ -86,7 +85,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
     if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
         if ( exp < -0x1000 ) exp = -0x1000;
     }
-    return softfloat_roundPackToF64( state, sign, exp, sig );
+    return softfloat_roundPackToF64( sign, exp, sig );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_i32.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 int_fast32_t
- extF80_to_i32( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -68,7 +67,7 @@ int_fast32_t
 #elif (i32_fromNaN == i32_fromNegOverflow)
         sign = 1;
 #else
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return i32_fromNaN;
 #endif
     }
@@ -78,7 +77,7 @@ int_fast32_t
     shiftDist = 0x4032 - exp;
     if ( shiftDist <= 0 ) shiftDist = 1;
     sig = softfloat_shiftRightJam64( sig, shiftDist );
-    return softfloat_roundToI32( state, sign, sig, roundingMode, exact );
+    return softfloat_roundToI32( sign, sig, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_i64.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
- extF80_to_i64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -68,7 +67,7 @@ int_fast64_t
         /*--------------------------------------------------------------------
         *--------------------------------------------------------------------*/
         if ( shiftDist ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
             return
                 (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                     ? i64_fromNaN
@@ -84,7 +83,7 @@ int_fast64_t
         sig = sig64Extra.v;
         sigExtra = sig64Extra.extra;
     }
-    return softfloat_roundToI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/extF80_to_ui64.c

@@ -41,9 +41,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast64_t
- extF80_to_ui64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
     union { struct extFloat80M s; extFloat80_t f; } uA;
     uint_fast16_t uiA64;
@@ -65,7 +64,7 @@ uint_fast64_t
     *------------------------------------------------------------------------*/
     shiftDist = 0x403E - exp;
     if ( shiftDist < 0 ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
         return
             (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                 ? ui64_fromNaN
@@ -79,7 +78,7 @@ uint_fast64_t
         sig = sig64Extra.v;
         sigExtra = sig64Extra.extra;
     }
-    return softfloat_roundToUI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/f128_to_extF80.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
+extFloat80_t f128_to_extF80( float128_t a )
 {
     union ui128_f128 uA;
     uint_fast64_t uiA64, uiA0;
@@ -70,7 +69,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FFF ) {
         if ( frac64 | frac0 ) {
-            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );
             uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;
@@ -98,7 +97,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
     sig128 =
         softfloat_shortShiftLeft128(
             frac64 | UINT64_C( 0x0001000000000000 ), frac0, 15 );
-    return softfloat_roundPackToExtF80( state, sign, exp, sig128.v64, sig128.v0, 80 );
+    return softfloat_roundPackToExtF80( sign, exp, sig128.v64, sig128.v0, 80 );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/f32_to_extF80.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
+extFloat80_t f32_to_extF80( float32_t a )
 {
     union ui32_f32 uA;
     uint_fast32_t uiA;
@@ -67,7 +66,7 @@ extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0xFF ) {
         if ( frac ) {
-            softfloat_f32UIToCommonNaN( state, uiA, &commonNaN );
+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );
             uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;

External/FEXCore/Source/Common/SoftFloat-3e/f64_to_extF80.c

@@ -41,8 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "specialize.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f64_to_extF80( struct softfloat_state *state, float64_t a )
+extFloat80_t f64_to_extF80( float64_t a )
 {
     union ui64_f64 uA;
     uint_fast64_t uiA;
@@ -67,7 +66,7 @@ extFloat80_t f64_to_extF80( struct softfloat_state *state, float64_t a )
     *------------------------------------------------------------------------*/
     if ( exp == 0x7FF ) {
         if ( frac ) {
-            softfloat_f64UIToCommonNaN( state, uiA, &commonNaN );
+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );
             uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
             uiZ64 = uiZ.v64;
             uiZ0  = uiZ.v0;

External/FEXCore/Source/Common/SoftFloat-3e/i32_to_extF80.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "internals.h"
 #include "softfloat.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t i32_to_extF80( int32_t a )
 {
     uint_fast16_t uiZ64;

External/FEXCore/Source/Common/SoftFloat-3e/internals.h

@@ -63,19 +63,17 @@ uint_fast32_t softfloat_roundToUI32( bool, uint_fast64_t, uint_fast8_t, bool );
 #ifdef SOFTFLOAT_FAST_INT64
 uint_fast64_t
  softfloat_roundToUI64(
-     struct softfloat_state *, bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
 #else
 uint_fast64_t softfloat_roundMToUI64( bool, uint32_t *, uint_fast8_t, bool );
 #endif
 
-FEXCORE_PRESERVE_ALL_ATTR
-int_fast32_t softfloat_roundToI32( struct softfloat_state *, bool, uint_fast64_t, uint_fast8_t, bool );
+int_fast32_t softfloat_roundToI32( bool, uint_fast64_t, uint_fast8_t, bool );
 
 #ifdef SOFTFLOAT_FAST_INT64
-FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
  softfloat_roundToI64(
-     struct softfloat_state *, bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
 #else
 int_fast64_t softfloat_roundMToI64( bool, uint32_t *, uint_fast8_t, bool );
 #endif
@@ -111,11 +109,9 @@ float16_t
 #define isNaNF32UI( a ) (((~(a) & 0x7F800000) == 0) && ((a) & 0x007FFFFF))
 
 struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; };
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );
 
-FEXCORE_PRESERVE_ALL_ATTR
-float32_t softfloat_roundPackToF32( struct softfloat_state *, bool, int_fast16_t, uint_fast32_t );
+float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t );
 float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t );
 
 float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t );
@@ -134,11 +130,9 @@ float32_t
 #define isNaNF64UI( a ) (((~(a) & UINT64_C( 0x7FF0000000000000 )) == 0) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )))
 
 struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );
 
-FEXCORE_PRESERVE_ALL_ATTR
-float64_t softfloat_roundPackToF64( struct softfloat_state *, bool, int_fast16_t, uint_fast64_t );
+float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t );
 float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t );
 
 float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );
@@ -161,24 +155,21 @@ float64_t
 *----------------------------------------------------------------------------*/
 
 struct exp32_sig64 { int_fast32_t exp; uint64_t sig; };
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t );
 
-FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
  softfloat_roundPackToExtF80(
-     struct softfloat_state *, bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
-FEXCORE_PRESERVE_ALL_ATTR
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
 extFloat80_t
  softfloat_normRoundPackToExtF80(
-     struct softfloat_state *, bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
 
 extFloat80_t
  softfloat_addMagsExtF80(
-     struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 extFloat80_t
  softfloat_subMagsExtF80(
-     struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 
 /*----------------------------------------------------------------------------
 *----------------------------------------------------------------------------*/
@@ -190,7 +181,6 @@ extFloat80_t
 #define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))))
 
 struct exp32_sig128 { int_fast32_t exp; struct uint128 sig; };
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp32_sig128
  softfloat_normSubnormalF128Sig( uint_fast64_t, uint_fast64_t );
 

External/FEXCore/Source/Common/SoftFloat-3e/primitives.h

@@ -53,7 +53,6 @@ INLINE
 uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist )
     { return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0); }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist );
 #endif
 #endif
@@ -75,7 +74,6 @@ INLINE uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist )
         (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0);
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist );
 #endif
 #endif
@@ -97,7 +95,6 @@ INLINE uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist )
         (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0);
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist );
 #endif
 #endif
@@ -151,7 +148,6 @@ INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )
     return count;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast8_t softfloat_countLeadingZeros32( uint32_t a );
 #endif
 #endif
@@ -161,7 +157,6 @@ uint_fast8_t softfloat_countLeadingZeros32( uint32_t a );
 | Returns the number of leading 0 bits before the most-significant 1 bit of
 | 'a'.  If 'a' is zero, 64 is returned.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast8_t softfloat_countLeadingZeros64( uint64_t a );
 #endif
 
@@ -183,7 +178,6 @@ extern const uint16_t softfloat_approxRecip_1k1s[16];
 #ifdef SOFTFLOAT_FAST_DIV64TO32
 #define softfloat_approxRecip32_1( a ) ((uint32_t) (UINT64_C( 0x7FFFFFFFFFFFFFFF ) / (uint32_t) (a)))
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 uint32_t softfloat_approxRecip32_1( uint32_t a );
 #endif
 #endif
@@ -210,7 +204,6 @@ extern const uint16_t softfloat_approxRecipSqrt_1k1s[16];
 | returned is also always within the range 0.5 to 1; thus, the most-
 | significant bit of the result is always set.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a );
 #endif
 
@@ -247,7 +240,6 @@ INLINE
 bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
     { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
 #endif
 #endif
@@ -263,7 +255,6 @@ INLINE
 bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
     { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
 #endif
 #endif
@@ -284,7 +275,6 @@ struct uint128
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
  softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist );
 #endif
@@ -306,7 +296,6 @@ struct uint128
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
  softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist );
 #endif
@@ -424,7 +413,6 @@ struct uint64_extra
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint64_extra
  softfloat_shiftRightJam64Extra(
      uint64_t a, uint64_t extra, uint_fast32_t dist );
@@ -504,7 +492,6 @@ struct uint128
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
  softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
 #endif
@@ -541,7 +528,6 @@ struct uint128
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
  softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
 #endif
@@ -576,7 +562,6 @@ INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )
     return z;
 }
 #else
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b );
 #endif
 #endif
@@ -585,7 +570,6 @@ struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b );
 /*----------------------------------------------------------------------------
 | Returns the 128-bit product of 'a' and 'b'.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b );
 #endif
 

External/FEXCore/Source/Common/SoftFloat-3e/s_add128.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #ifndef softfloat_add128
 
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
  softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
 {

External/FEXCore/Source/Common/SoftFloat-3e/s_addMagsExtF80.c

@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 extFloat80_t
  softfloat_addMagsExtF80(
-     struct softfloat_state *state,
      uint_fast16_t uiA64,
      uint_fast64_t uiA0,
      uint_fast16_t uiB64,
@@ -141,11 +140,11 @@ extFloat80_t
  roundAndPack:
     return
         softfloat_roundPackToExtF80(
-            state, signZ, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
     /*------------------------------------------------------------------------
     *------------------------------------------------------------------------*/
  propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
     uiZ64 = uiZ.v64;
     uiZ0  = uiZ.v0;
  uiZ:

External/FEXCore/Source/Common/SoftFloat-3e/s_approxRecip32_1.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 extern const uint16_t softfloat_approxRecip_1k0s[16];
 extern const uint16_t softfloat_approxRecip_1k1s[16];
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint32_t softfloat_approxRecip32_1( uint32_t a )
 {
     int index;

External/FEXCore/Source/Common/SoftFloat-3e/s_approxRecipSqrt32_1.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 extern const uint16_t softfloat_approxRecipSqrt_1k0s[];
 extern const uint16_t softfloat_approxRecipSqrt_1k1s[];
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a )
 {
     int index;

External/FEXCore/Source/Common/SoftFloat-3e/s_commonNaNToExtF80UI.c

@@ -44,7 +44,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | floating-point NaN, and returns the bit pattern of this value as an unsigned
 | integer.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
 {
     struct uint128 uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/s_commonNaNToF128UI.c

@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
 | NaN, and returns the bit pattern of this value as an unsigned integer.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
 {
     struct uint128 uiZ;

External/FEXCore/Source/Common/SoftFloat-3e/s_commonNaNToF32UI.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point
 | NaN, and returns the bit pattern of this value as an unsigned integer.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )
 {
 

External/FEXCore/Source/Common/SoftFloat-3e/s_commonNaNToF64UI.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point
 | NaN, and returns the bit pattern of this value as an unsigned integer.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )
 {
 

External/FEXCore/Source/Common/SoftFloat-3e/s_countLeadingZeros32.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32
 #include "primitives.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )
 {
     uint_fast8_t count;

External/FEXCore/Source/Common/SoftFloat-3e/s_countLeadingZeros64.c

@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64
 #include "primitives.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 uint_fast8_t softfloat_countLeadingZeros64( uint64_t a )
 {
     uint_fast8_t count;

External/FEXCore/Source/Common/SoftFloat-3e/s_extF80UIToCommonNaN.c

@@ -46,14 +46,13 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid
 | exception is raised.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 void
  softfloat_extF80UIToCommonNaN(
-     struct softfloat_state *state, uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
 {
 
     if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
     }
     zPtr->sign = uiA64>>15;
     zPtr->v64  = uiA0<<1;

External/FEXCore/Source/Common/SoftFloat-3e/s_f128UIToCommonNaN.c

@@ -47,15 +47,14 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid exception
 | is raised.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
 void
  softfloat_f128UIToCommonNaN(
-     struct softfloat_state *state, uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
 {
     struct uint128 NaNSig;
 
     if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
     }
     NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );
     zPtr->sign = uiA64>>63;

External/FEXCore/Source/Common/SoftFloat-3e/s_f32UIToCommonNaN.c

@@ -45,12 +45,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid
 | exception is raised.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f32UIToCommonNaN( struct softfloat_state *state, uint_fast32_t uiA, struct commonNaN *zPtr )
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )
 {
 
     if ( softfloat_isSigNaNF32UI( uiA ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
     }
     zPtr->sign = uiA>>31;
     zPtr->v64  = (uint_fast64_t) uiA<<41;

External/FEXCore/Source/Common/SoftFloat-3e/s_f64UIToCommonNaN.c

@@ -45,12 +45,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid
 | exception is raised.
 *----------------------------------------------------------------------------*/
-FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f64UIToCommonNaN( struct softfloat_state *state, uint_fast64_t uiA, struct commonNaN *zPtr )
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )
 {
 
     if ( softfloat_isSigNaNF64UI( uiA ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
     }
     zPtr->sign = uiA>>63;
     zPtr->v64  = uiA<<12;

External/FEXCore/Source/Common/SoftFloat-3e/s_le128.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #ifndef softfloat_le128
 
-FEXCORE_PRESERVE_ALL_ATTR
 bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
 {
 

External/FEXCore/Source/Common/SoftFloat-3e/s_lt128.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #ifndef softfloat_lt128
 
-FEXCORE_PRESERVE_ALL_ATTR
 bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
 {
 

External/FEXCore/Source/Common/SoftFloat-3e/s_mul64ByShifted32To128.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #ifndef softfloat_mul64ByShifted32To128
 
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )
 {
     uint_fast64_t mid;

External/FEXCore/Source/Common/SoftFloat-3e/s_mul64To128.c

@@ -40,7 +40,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #ifndef softfloat_mul64To128
 
-FEXCORE_PRESERVE_ALL_ATTR
 struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b )
 {
     uint32_t a32, a0, b32, b0;

External/FEXCore/Source/Common/SoftFloat-3e/s_normRoundPackToExtF80.c

@@ -39,10 +39,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "platform.h"
 #include "internals.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
  softfloat_normRoundPackToExtF80(
-     struct softfloat_state *state,
      bool sign,
      int_fast32_t exp,
      uint_fast64_t sig,
@@ -67,7 +65,7 @@ extFloat80_t
     }
     return
         softfloat_roundPackToExtF80(
-            state, sign, exp, sig, sigExtra, roundingPrecision );
+            sign, exp, sig, sigExtra, roundingPrecision );
 
 }
 

External/FEXCore/Source/Common/SoftFloat-3e/s_normSubnormalExtF80Sig.c

@@ -38,7 +38,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "platform.h"
 #include "internals.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t sig )
 {
     int_fast8_t shiftDist;

External/FEXCore/Source/Common/SoftFloat-3e/s_normSubnormalF128Sig.c

@@ -38,7 +38,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "platform.h"
 #include "internals.h"
 
-FEXCORE_PRESERVE_ALL_ATTR
 struct exp32_sig128
  softfloat_normSubnormalF128Sig( uint_fast64_t sig64, uint_fast64_t sig0 )
 {