Docs: Update for release FEX-2311.1

FEX: Only pass CPU tunables to FEXCore and FEXLoader
This fixes an issue where CPU tunables were ending up in the thunk generator which means if your CPU doesn't support all the features on the *Builder* then it would crash with SIGILL. This was happening with Canonical's runners because they typically only support ARMv8.2 but we are compiling packages to run on ARMv8.4 devices. cc: FEX-2311.1
2026-10-06 16:00:18 +02:00 · 2023-11-11 11:59:57 -08:00 · 2023-11-11 11:58:25 -08:00
1149 changed files with 168170 additions and 370654 deletions
@@ -1,109 +0,0 @@
-Language: Cpp
-BasedOnStyle: WebKit
-AccessModifierOffset: -2
-AlignAfterOpenBracket: Align
-AlignArrayOfStructures: None
-AlignConsecutiveAssignments: None
-AlignConsecutiveBitFields: Consecutive
-AlignConsecutiveDeclarations: None
-AlignConsecutiveMacros: None
-AlignEscapedNewlines: Left
-AlignOperands: Align
-AlignTrailingComments: true
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortCaseLabelsOnASingleLine: true
-AllowShortEnumsOnASingleLine: true
-AllowShortFunctionsOnASingleLine: Empty
-AllowShortIfStatementsOnASingleLine: WithoutElse
-AllowShortLambdasOnASingleLine: Inline
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: true
-AttributeMacros:
-  - JEMALLOC_NOTHROW
-  - FEX_ALIGNED
-  - FEX_ANNOTATE
-  - FEX_DEFAULT_VISIBILITY
-  - FEX_NAKED
-  - FEX_PACKED
-  - FEXCORE_PRESERVE_ALL_ATTR
-  - GLIBC_ALIAS_FUNCTION
-BinPackArguments: true
-BinPackParameters: true
-BitFieldColonSpacing: Both
-BreakAfterAttributes: Always # clang 16 required
-BreakBeforeBraces: Attach
-BreakBeforeBinaryOperators: None
-BreakBeforeInlineASMColon: OnlyMultiline # clang 16 required
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializers: BeforeComma
-BreakInheritanceList: BeforeColon
-ColumnLimit: 140
-CompactNamespaces: false
-ConstructorInitializerIndentWidth: 2
-ContinuationIndentWidth: 2
-Cpp11BracedListStyle: true
-DerivePointerAlignment: false
-EmptyLineAfterAccessModifier: Leave
-EmptyLineBeforeAccessModifier: Leave
-ExperimentalAutoDetectBinPacking: false
-FixNamespaceComments: true
-IncludeBlocks: Preserve
-IndentAccessModifiers: false
-IndentCaseBlocks: false
-IndentCaseLabels: false
-IndentExternBlock: AfterExternBlock
-IndentGotoLabels: false
-IndentPPDirectives: None
-IndentRequires: false
-IndentWidth: 2
-InsertBraces: true
-KeepEmptyLinesAtTheStartOfBlocks: true
-LambdaBodyIndentation: OuterScope
-LineEnding: LF # clang 16 required
-MaxEmptyLinesToKeep: 2
-NamespaceIndentation: Inner
-QualifierAlignment: Left
-PackConstructorInitializers: Never
-PenaltyBreakAssignment: 2
-PenaltyBreakBeforeFirstCallParameter: 2
-PenaltyBreakOpenParenthesis: 2
-PenaltyBreakString: 10
-PenaltyBreakTemplateDeclaration: 8
-PenaltyExcessCharacter: 2
-PenaltyReturnTypeOnItsOwnLine: 16
-PointerAlignment: Left
-RemoveBracesLLVM: false
-ReferenceAlignment: Left
-ReflowComments: true
-RequiresClausePosition: WithPreceding
-SeparateDefinitionBlocks: Leave
-SortIncludes: Never
-SpaceAfterCStyleCast: false
-SpaceAfterLogicalNot: false
-SpaceAfterTemplateKeyword: false
-SpaceAroundPointerQualifiers: Default
-SpaceBeforeAssignmentOperators: true
-SpaceBeforeCaseColon: false
-SpaceBeforeCpp11BracedList: true
-SpaceBeforeInheritanceColon: true
-SpaceBeforeParens: Custom
-SpaceBeforeParensOptions:
-  AfterControlStatements: true
-  AfterFunctionDeclarationName: false
-  AfterFunctionDefinitionName: false
-  AfterOverloadedOperator: false
-  AfterRequiresInClause: true
-  BeforeNonEmptyParentheses: false
-SpaceBeforeRangeBasedForLoopColon: true
-SpaceBeforeSquareBrackets: false
-SpaceInEmptyBlock: false
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: Leave
-SpacesInCStyleCastParentheses: false
-SpacesInConditionalStatement: false
-SpacesInParentheses: false
-Standard: c++20
-UseTab: Never
@@ -1,12 +0,0 @@
-# This file is used to ignore files and directories from clang-format
-
-# Ignore all files in the External directory
-External/*
-
-# SoftFloat-3e code doesn't belong to us 
-FEXCore/Source/Common/SoftFloat-3e/*
-Source/Common/cpp-optparse/*
-
-# Files with human-indented tables for readability - don't mess with these
-FEXCore/Source/Interface/Core/X86Tables/*
-
@@ -1,15 +0,0 @@
-# Since version 2.23 (released in August 2019), git-blame has a feature
-# to ignore or bypass certain commits.
-#
-# This file contains a list of commits that are not likely what you
-# are looking for in a blame, such as mass reformatting or renaming.
-# You can set this file as a default ignore file for blame by running
-# the following command.
-#
-# $ git config blame.ignoreRevsFile .git-blame-ignore-revs
-
-# Whole tree reformat PR#3571
-2b4ec88daebd35fefb5bf5c73d7fc2b4155771ed
-
-# Second reformat to find fixed point PR#3577
-905aa935f5ce344a48ef4d5edab3c31efa8d793e
@@ -37,6 +37,7 @@ If applicable, add screenshots and video to help explain your problem.

 **Additional context**
 - Is this an x86 or x86-64 game: [x86/x86-64/Both]
+ - Does this reproduce on x86-64 host with FEX: [Yes/No/Untested]
 - Does this reproduce on AArch64 with Radeon/Intel/Nvidia: [Yes/No/Untested]
 - Is this a Vulkan game: [Yes/No/Unknown]
   - If Yes, What is your Vulkan driver:
@@ -13,6 +13,8 @@ env:
  BUILD_TYPE: Release
  CC: clang
  CXX: clang++
+  FEX_FORCE32BITALLOCATOR: 1
+  FEX_ENABLEAVX: 1

 jobs:
  build_plus_test:
@@ -76,6 +78,18 @@ jobs:
      shell: bash
      run: cmake --build . --config $BUILD_TYPE --target install

+    - name: IR Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests
+
+    - name: IR Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
+
    - name: gcc target tests 64
      working-directory: ${{runner.workspace}}/build
      shell: bash
@@ -236,7 +250,7 @@ jobs:
      working-directory: ${{runner.workspace}}/build
      # Cap out the log files at 20M in case something crash spins and dumps fault text
      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true

    - name: Remove old SHM regions
      if: ${{ always() }}
@@ -20,6 +20,8 @@ env:
  BUILD_TYPE: Release
  CC: clang
  CXX: clang++
+  FEX_FORCE32BITALLOCATOR: 1
+  FEX_ENABLEAVX: 1

 jobs:
  glibc_fault_test:
@@ -83,6 +85,18 @@ jobs:
      shell: bash
      run: cmake --build . --config $BUILD_TYPE --target install

+    - name: IR Tests
+      working-directory: ${{runner.workspace}}/build
+      shell: bash
+      # Execute the unit tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests
+
+    - name: IR Test Results move
+      if: ${{ always() }}
+      shell: bash
+      working-directory: ${{runner.workspace}}/build
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
+
    - name: gcc target tests 64
      working-directory: ${{runner.workspace}}/build
      shell: bash
@@ -170,7 +184,7 @@ jobs:
      working-directory: ${{runner.workspace}}/build
      # Cap out the log files at 20M in case something crash spins and dumps fault text
      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true

    - name: Remove old SHM regions
      if: ${{ always() }}
@@ -13,6 +13,7 @@ env:
  BUILD_TYPE: Release
  CC: clang
  CXX: clang++
+  FEX_ENABLEAVX: 1

 jobs:
  hostrunner_tests:
@@ -89,7 +90,7 @@ jobs:
      working-directory: ${{runner.workspace}}/build
      # Cap out the log files at 20M in case something crash spins and dumps fault text
      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true

    - name: Set runner name
      if: ${{ always() }}
@@ -13,6 +13,7 @@ env:
  BUILD_TYPE: Release
  CC: clang
  CXX: clang++
+  FEX_ENABLEAVX: 1

 jobs:
  instcountci_tests:
@@ -120,7 +121,7 @@ jobs:
      working-directory: ${{runner.workspace}}/build
      # Cap out the log files at 20M in case something crash spins and dumps fault text
      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true

    - name: Set runner name
      if: ${{ always() }}
@@ -10,13 +10,14 @@ on:

 env:
  BUILD_TYPE: Debug
+  FEX_ENABLEAVX: 1

 jobs:
  mingw_build:
    runs-on: ${{ matrix.arch }}
    strategy:
      matrix:
-        arch: [[self-hosted, ARM64, mingw], [self-hosted, ARM64EC, mingw, ARM64]]
+        arch: [[self-hosted, ARM64, mingw]]
      fail-fast: false

    steps:
@@ -38,11 +39,6 @@ jobs:
      run: |
        echo "MINGW_TRIPLE=aarch64-w64-mingw32" >> $GITHUB_ENV

-    - name: Set CC Arm64EC
-      if: matrix.arch[1] == 'ARM64EC'
-      run: |
-        echo "MINGW_TRIPLE=arm64ec-w64-mingw32" >> $GITHUB_ENV
-
    - name: Set rootfs paths
      run: |
        echo "FEX_ROOTFS_MOUNT=/mnt/AutoNFS/rootfs/" >> $GITHUB_ENV
@@ -78,7 +74,7 @@ jobs:
      # Note the current convention is to use the -S and -B options here to specify source
      # and build directories, but this is only available with CMake 3.13 and higher.
      # The CMake binaries on the Github Actions machines are (as of this writing) 3.12
-      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/toolchain_mingw.cmake -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTS=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install
+      run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/toolchain_mingw.cmake -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTS=False -DENABLE_JEMALLOC=False -DENABLE_JEMALLOC_GLIBC_ALLOC=False -DCMAKE_INSTALL_PREFIX=${{runner.workspace}}/build/install

    - name: Build
      working-directory: ${{runner.workspace}}/build
@@ -1,76 +0,0 @@
-# Inspired by LLVM's pr-code-format.yml at 
-# https://github.com/llvm/llvm-project/blob/main/.github/workflows/pr-code-format.yml
-
-name: "Check code formatting"
-on:
-  pull_request:
-    branches:
-      - main
-
-jobs:
-  code_formatter:
-    runs-on: [self-hosted, X64]
-    if: github.repository == 'FEX-Emu/FEX'
-
-    steps:
-      - name: Fetch FEX sources
-        uses: actions/checkout@v4
-        with:
-          ref: ${{ github.event.pull_request.head.sha }}
-
-      - name: Checkout through merge base
-        uses: rmacklin/fetch-through-merge-base@v0
-        timeout-minutes: 3
-        with:
-          base_ref: ${{ github.event.pull_request.base.ref }}
-          head_ref: ${{ github.event.pull_request.head.sha }}
-          deepen_length: 500
-
-      - name: Get changed files
-        id: changed-files
-        uses: tj-actions/changed-files@v39
-        with:
-          separator: ","
-          skip_initial_fetch: true
-
-      - name: "Listed files"
-        env:
-          CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
-        run: |
-          echo "Formatting files:"
-          echo "$CHANGED_FILES"
-
-      - name: Check for correct clang-format version
-        run: clang-format --version | grep -qF '16.0.6'
-
-      - name: Check git-clang-format-16 exists
-        run: which git-clang-format-16
-
-      - name: Setup Python env
-        uses: actions/setup-python@v4
-        with:
-          python-version: '3.11'
-          cache: 'pip'
-          cache-dependency-path: './External/code-format-helper/requirements_formatting.txt'
-
-      - name: Install python dependencies
-        run: pip install -r ./External/code-format-helper/requirements_formatting.txt
-
-      - name: Run code formatter
-        env:
-          CLANG_FORMAT_PATH: 'git-clang-format-16'
-          GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
-          START_REV: ${{ github.event.pull_request.base.sha }}
-          END_REV: ${{ github.event.pull_request.head.sha }}
-          CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
-        # TODO(pmatos): Once we adopt v18, we should be able
-        # to take advantage of the new --diff_from_common_commit option
-        # explicitly in code-format-helper.py and not have to diff starting at
-        # the merge base.
-        run: |
-          python ./External/code-format-helper/code-format-helper.py \
-            --repo "FEX-emu/FEX" \
-            --issue-number $GITHUB_PR_NUMBER \
-            --start-rev $(git merge-base $START_REV $END_REV) \
-            --end-rev $END_REV \
-            --changed-files "$CHANGED_FILES"
@@ -13,6 +13,7 @@ env:
  BUILD_TYPE: Release
  CC: clang
  CXX: clang++
+  FEX_ENABLEAVX: 1

 jobs:
  vixl_simulator:
@@ -72,22 +73,23 @@ jobs:
      # Execute the build.  You can specify a specific target with "--target <NAME>"
      run: cmake --build . --config $BUILD_TYPE

-    - name: ASM Tests - SVE256
+    - name: ASM Tests
      working-directory: ${{runner.workspace}}/build
      shell: bash
      # Execute the unit tests
      run: cmake --build . --config $BUILD_TYPE --target asm_tests

-    - name: ASM Test SVE256 Results move
+    - name: ASM Test Results move
      if: ${{ always() }}
      shell: bash
      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_SVE256Bit.log || true
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM.log || true

-    - name: ASM Tests - SVE128
+    - name: ASM Tests 128-bit
      working-directory: ${{runner.workspace}}/build
      shell: bash
      env:
+        FEX_HOSTFEATURES: "disableavx"
        FEX_FORCESVEWIDTH: "128"
      # Execute the unit tests
      run: cmake --build . --config $BUILD_TYPE --target asm_tests
@@ -96,21 +98,19 @@ jobs:
      if: ${{ always() }}
      shell: bash
      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_SVE128Bit.log || true
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM128bit.log || true

-    - name: ASM Tests - ASIMD
+    - name: IR Tests
      working-directory: ${{runner.workspace}}/build
      shell: bash
-      env:
-        FEX_HOSTFEATURES: "disablesve"
      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target asm_tests
+      run: cmake --build . --config $BUILD_TYPE --target ir_tests

-    - name: ASM Test ASIMD Results move
+    - name: IR Test Results move
      if: ${{ always() }}
      shell: bash
      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM_ASIMD.log || true
+      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true

    - name: Truncate test results
      if: ${{ always() }}
@@ -118,7 +118,7 @@ jobs:
      working-directory: ${{runner.workspace}}/build
      # Cap out the log files at 20M in case something crash spins and dumps fault text
      # ASM tests get quite close to 10MB
-      run: truncate --size="<20M" ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true
+      run: truncate --size=<20M ${{runner.workspace}}/build/Testing/Temporary/LastTest_*.log || true

    - name: Set runner name
      if: ${{ always() }}
@@ -8,20 +8,26 @@
 [submodule "External/imgui"]
 	path = External/imgui
 	url = https://github.com/Sonicadvance1/imgui.git
+[submodule "External/json-maker"]
+	path = External/json-maker
+	url = https://github.com/Sonicadvance1/json-maker.git
+[submodule "External/tiny-json"]
+	path = External/tiny-json
+	url = https://github.com/Sonicadvance1/tiny-json.git
 [submodule "External/xbyak"]
-  shallow = true
+        shallow = true
 	path = External/xbyak
-	url = https://github.com/herumi/xbyak.git
+	url = https://github.com/FEX-Emu/xbyak.git
 [submodule "External/fex-posixtest-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-posixtest-bins
 	url = https://github.com/FEX-Emu/fex-posixtest-bins.git
 [submodule "External/fex-gvisor-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gvisor-tests-bins
 	url = https://github.com/FEX-Emu/fex-gvisor-tests-bins.git
 [submodule "External/fex-gcc-target-tests-bins"]
-  shallow = true
+        shallow = true
 	path = External/fex-gcc-target-tests-bins
 	url = https://github.com/FEX-Emu/fex-gcc-target-tests-bins.git
 [submodule "External/jemalloc"]
@@ -35,7 +41,7 @@
 	url = https://github.com/FEX-Emu/drm-headers.git
 [submodule "External/xxhash"]
 	path = External/xxhash
-	url = https://github.com/Cyan4973/xxHash.git
+	url = https://github.com/FEX-Emu/xxHash.git
 [submodule "External/Catch2"]
 	path = External/Catch2
 	url = https://github.com/catchorg/Catch2.git
@@ -1,5 +1,5 @@
 cmake_minimum_required(VERSION 3.14)
-project(FEX C CXX ASM)
+project(FEX)

 INCLUDE (CheckIncludeFiles)
 CHECK_INCLUDE_FILES ("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H)
@@ -7,15 +7,15 @@ CHECK_INCLUDE_FILES ("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H)
 option(BUILD_TESTS "Build unit tests to ensure sanity" TRUE)
 option(BUILD_FEX_LINUX_TESTS "Build FEXLinuxTests, requires x86 compiler" FALSE)
 option(BUILD_THUNKS "Build thunks" FALSE)
-set(USE_FEXCONFIG_TOOLKIT "imgui" CACHE STRING "If set, build FEXConfig (qt or imgui)")
+option(BUILD_FEXCONFIG "Build FEXConfig, requires SDL2 and X11" TRUE)
 option(ENABLE_CLANG_THUNKS "Build thunks with clang" FALSE)
+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
 option(ENABLE_IWYU "Enables include what you use program" FALSE)
 option(ENABLE_LTO "Enable LTO with compilation" TRUE)
 option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE)
 set(USE_LINKER "" CACHE STRING "Allow overriding the linker path directly")
 option(ENABLE_ASAN "Enables Clang ASAN" FALSE)
 option(ENABLE_TSAN "Enables Clang TSAN" FALSE)
-option(ENABLE_COVERAGE "Enables Coverage" FALSE)
 option(ENABLE_ASSERTIONS "Enables assertions in build" FALSE)
 option(ENABLE_GDB_SYMBOLS "Enables GDBSymbols integration support" ${HAVE_GDB_JIT_READER_H})
 option(ENABLE_STRICT_WERROR "Enables stricter -Werror for CI" FALSE)
@@ -26,14 +26,13 @@ option(ENABLE_OFFLINE_TELEMETRY "Enables FEX offline telemetry" TRUE)
 option(ENABLE_COMPILE_TIME_TRACE "Enables time trace compile option" FALSE)
 option(ENABLE_LIBCXX "Enables LLVM libc++" FALSE)
 option(ENABLE_CCACHE "Enables ccache for compile caching" TRUE)
+option(ENABLE_TERMUX_BUILD "Forces building for Termux on a non-Termux build machine" FALSE)
 option(ENABLE_VIXL_SIMULATOR "Forces the FEX JIT to use the VIXL simulator" FALSE)
 option(ENABLE_VIXL_DISASSEMBLER "Enables debug disassembler output with VIXL" FALSE)
-option(USE_LEGACY_BINFMTMISC "Uses legacy method of setting up binfmt_misc" FALSE)
 option(COMPILE_VIXL_DISASSEMBLER "Compiles the vixl disassembler in to vixl" FALSE)
 option(ENABLE_FEXCORE_PROFILER "Enables use of the FEXCore timeline profiling capabilities" FALSE)
 set (FEXCORE_PROFILER_BACKEND "gpuvis" CACHE STRING "Set which backend you want to use for the FEXCore profiler")
 option(ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT "Enables glibc memory allocation hooking with fault for CI testing")
-option(USE_PDB_DEBUGINFO "Builds debug info in PDB format" FALSE)

 set (X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686")
 set (X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64")
@@ -43,16 +42,7 @@ string(FIND ${CMAKE_BASE_NAME} mingw CONTAINS_MINGW)
 if (NOT CONTAINS_MINGW EQUAL -1)
  message (STATUS "Mingw build")
  set (MINGW_BUILD TRUE)
-  set (ENABLE_JEMALLOC TRUE)
-  set (ENABLE_JEMALLOC_GLIBC_ALLOC FALSE)
-endif()
-
-if (NOT MINGW_BUILD)
-  message (STATUS "Clang version ${CMAKE_CXX_COMPILER_VERSION}")
-  set (CLANG_MINIMUM_VERSION 13.0)
-  if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${CLANG_MINIMUM_VERSION})
-    message (FATAL_ERROR "Clang version too old for FEX. Need at least ${CLANG_MINIMUM_VERSION} but has ${CMAKE_CXX_COMPILER_VERSION}")
-  endif()
+  set (ENABLE_JEMALLOC FALSE)
 endif()

 if (ENABLE_FEXCORE_PROFILER)
@@ -122,12 +112,6 @@ else()
 endif()

 if (CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64")
-  option(ENABLE_X86_HOST_DEBUG "Enables compiling on x86_64 host" FALSE)
-  if (NOT ENABLE_X86_HOST_DEBUG)
-    message(FATAL_ERROR
-    " FEX-Emu doesn't support compiling for x86-64 hosts!"
-    " This is /only/ a supported configuration for FEX CI and nothing else!")
-  endif()
  set(_M_X86_64 1)
  add_definitions(-D_M_X86_64=1)
  set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcx16")
@@ -138,44 +122,6 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^aarch64|^arm64|^armv8\.*")
  add_definitions(-D_M_ARM_64=1)
 endif()

-if (CMAKE_SYSTEM_PROCESSOR MATCHES "^arm64ec")
-  set(_M_ARM_64EC 1)
-  add_definitions(-D_M_ARM_64EC=1)
-endif()
-
-include(CheckCXXSourceCompiles)
-set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
-check_cxx_source_compiles(
-  "
-  __attribute__((preserve_all))
-  int Testy(int a, int b, int c, int d, int e, int f) {
-  return a + b + c + d + e + f;
-  }
-  int main() {
-  return Testy(0, 1, 2, 3, 4, 5);
-  }"
-  HAS_CLANG_PRESERVE_ALL)
-unset(CMAKE_REQUIRED_FLAGS)
-if (HAS_CLANG_PRESERVE_ALL)
-  if (MINGW_BUILD)
-    message(STATUS "Ignoring broken clang::preserve_all support")
-    set(HAS_CLANG_PRESERVE_ALL FALSE)
-  else()
-    message(STATUS "Has clang::preserve_all")
-  endif()
-endif ()
-
-if (_M_ARM_64 AND HAS_CLANG_PRESERVE_ALL)
-  add_definitions("-DFEX_PRESERVE_ALL_ATTR=__attribute__((preserve_all))" "-DFEX_HAS_PRESERVE_ALL_ATTR=1")
-else()
-  add_definitions("-DFEX_PRESERVE_ALL_ATTR=" "-DFEX_HAS_PRESERVE_ALL_ATTR=0")
-endif()
-
-if (ENABLE_VIXL_SIMULATOR)
-  # We can run the simulator on both x86-64 or AArch64 hosts
-  add_definitions(-DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
-endif()
-
 if (ENABLE_CCACHE)
  find_program(CCACHE_PROGRAM ccache)
  if(CCACHE_PROGRAM)
@@ -212,6 +158,18 @@ if (NOT ENABLE_OFFLINE_TELEMETRY)
  add_definitions(-DFEX_DISABLE_TELEMETRY=1)
 endif()

+if(DEFINED ENV{TERMUX_VERSION} OR ENABLE_TERMUX_BUILD)
+  add_definitions(-DTERMUX_BUILD=1)
+  set(TERMUX_BUILD 1)
+
+  # Termux doesn't support Jemalloc due to bad interactions between emutls, jemalloc, and scudo
+  set(ENABLE_JEMALLOC FALSE)
+
+  # Termux builds can't rely on X11 packages
+  # SDL2 isn't even compiled with GL support so our GUIs wouldn't even work
+  set(BUILD_FEXCONFIG FALSE)
+endif()
+
 if (ENABLE_ASAN)
  add_definitions(-DENABLE_ASAN=1)
  add_compile_options(-fno-omit-frame-pointer -fsanitize=address -fsanitize-address-use-after-scope)
@@ -223,18 +181,13 @@ if (ENABLE_TSAN)
  link_libraries(-fno-omit-frame-pointer -fsanitize=thread)
 endif()

-if (ENABLE_COVERAGE)
-  add_compile_options(-fprofile-instr-generate -fcoverage-mapping)
-  link_libraries(-fprofile-instr-generate -fcoverage-mapping)
-endif()
-
 if (ENABLE_JEMALLOC_GLIBC_ALLOC)
  # The glibc jemalloc subproject which hooks the glibc allocator.
  # Required for thunks to work.
  # All host native libraries will use this allocator, while *most* other FEX internal allocations will use the other jemalloc allocator.
  add_definitions(-DENABLE_JEMALLOC_GLIBC=1)
  add_subdirectory(External/jemalloc_glibc/)
-elseif (NOT MINGW_BUILD)
+else()
  message (STATUS
    " jemalloc glibc allocator disabled!\n"
    " This is not a recommended configuration!\n"
@@ -247,7 +200,7 @@ if (ENABLE_JEMALLOC)
  add_definitions(-DENABLE_JEMALLOC=1)
  add_subdirectory(External/jemalloc/)
  include_directories(External/jemalloc/pregen/include/)
-elseif (NOT MINGW_BUILD)
+else()
  message (STATUS
    " jemalloc disabled!\n"
    " This is not a recommended configuration!\n"
@@ -255,11 +208,6 @@ elseif (NOT MINGW_BUILD)
    " Use at your own risk!")
 endif()

-if (USE_PDB_DEBUGINFO)
-  add_compile_options(-g -gcodeview)
-  add_link_options(-g -Wl,--pdb=)
-endif()
-
 set (CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")
 set (CMAKE_LINKER_FLAGS_RELWITHDEBINFO "${CMAKE_LINKER_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer")

@@ -284,15 +232,15 @@ endif()
 find_package(PkgConfig REQUIRED)
 find_package(Python 3.0 REQUIRED COMPONENTS Interpreter)

-set(XXHASH_BUNDLED_MODE TRUE)
-set(XXHASH_BUILD_XXHSUM FALSE)
-set(BUILD_SHARED_LIBS OFF)
-add_subdirectory(External/xxhash/cmake_unofficial/)
+add_subdirectory(External/xxhash/)
+include_directories(External/xxhash/)

 add_definitions(-Wno-trigraphs)
 add_definitions(-DGLOBAL_DATA_DIRECTORY="${DATA_DIRECTORY}/")

 if (BUILD_TESTS)
+  option(CATCH_BUILD_STATIC_LIBRARY "" ON)
+  set(CATCH_BUILD_STATIC_LIBRARY ON)
  add_subdirectory(External/Catch2/)

  # Pull in catch_discover_tests definition
@@ -304,14 +252,17 @@ endif()
 set(FMT_INSTALL OFF)
 add_subdirectory(External/fmt/)

-if (USE_FEXCONFIG_TOOLKIT STREQUAL "imgui")
-  add_subdirectory(External/imgui/)
-  include_directories(External/imgui/)
-endif()
+add_subdirectory(External/imgui/)
+include_directories(External/imgui/)
+
+add_subdirectory(External/json-maker/)
+include_directories(External/json-maker/)

 add_subdirectory(External/tiny-json/)
 include_directories(External/tiny-json/)

+include_directories(External/xbyak/)
+
 include_directories(Source/)
 include_directories("${CMAKE_BINARY_DIR}/Source/")

@@ -399,6 +350,57 @@ if (ENABLE_IWYU)
  endif()
 endif()

+if (ENABLE_CLANG_FORMAT)
+  find_program(CLANG_TIDY_EXE "clang-tidy")
+  if (NOT CLANG_TIDY_EXE)
+    message(FATAL_ERROR "Couldn't find clang-tidy")
+  endif()
+
+  set(CLANG_TIDY_FLAGS
+    "-checks=*"
+    "-fuchsia*"
+    "-bugprone-macro-parentheses"
+    "-clang-analyzer-core.*"
+    "-cppcoreguidelines-pro-type-*"
+    "-cppcoreguidelines-pro-bounds-array-to-pointer-decay"
+    "-cppcoreguidelines-pro-bounds-pointer-arithmetic"
+    "-cppcoreguidelines-avoid-c-arrays"
+    "-cppcoreguidelines-avoid-magic-numbers"
+    "-cppcoreguidelines-pro-bounds-constant-array-index"
+    "-cppcoreguidelines-no-malloc"
+    "-cppcoreguidelines-special-member-functions"
+    "-cppcoreguidelines-owning-memory"
+    "-cppcoreguidelines-macro-usage"
+    "-cppcoreguidelines-avoid-goto"
+    "-google-readability-function-size"
+    "-google-readability-namespace-comments"
+    "-google-readability-braces-around-statements"
+    "-google-build-using-namespace"
+    "-hicpp-*"
+    "-llvm-namespace-comment"
+    "-llvm-include-order" # Messes up with case sensitivity
+    "-llvmlibc-*"
+    "-misc-unused-parameters"
+    "-modernize-loop-convert"
+    "-modernize-use-auto"
+    "-modernize-avoid-c-arrays"
+    "-modernize-use-nodiscard"
+    "readability-*"
+    "-readability-function-size"
+    "-readability-implicit-bool-conversion"
+    "-readability-braces-around-statements"
+    "-readability-else-after-return"
+    "-readability-magic-numbers"
+    "-readability-named-parameter"
+    "-readability-uppercase-literal-suffix"
+    "-cert-err34-c"
+    "-cert-err58-cpp"
+    "-bugprone-exception-escape"
+    )
+  string(REPLACE ";" "," CLANG_TIDY_FLAGS "${CLANG_TIDY_FLAGS}")
+  set(CMAKE_CXX_CLANG_TIDY ${CLANG_TIDY_EXE} "${CLANG_TIDY_FLAGS}")
+endif()
+
 add_compile_options(-Wall)

 configure_file(
@@ -409,24 +411,13 @@ if (BUILD_TESTS)
  include(CTest)
  enable_testing()
  message(STATUS "Unit tests are enabled")
-
-  set (TEST_JOB_COUNT "" CACHE STRING "Override number of parallel jobs to use while running tests")
-  if (TEST_JOB_COUNT)
-    message(STATUS "Running tests with ${TEST_JOB_COUNT} jobs")
-  elseif(CMAKE_VERSION VERSION_LESS "3.29")
-    execute_process(COMMAND "nproc" OUTPUT_STRIP_TRAILING_WHITESPACE OUTPUT_VARIABLE TEST_JOB_COUNT)
-  endif()
-  set(TEST_JOB_FLAG "-j${TEST_JOB_COUNT}")
 endif()

 add_subdirectory(FEXHeaderUtils/)
-add_subdirectory(CodeEmitter/)
 add_subdirectory(FEXCore/)

-if (NOT MINGW_BUILD)
-  # Binfmt_misc files must be installed prior to Source/ installs
-  add_subdirectory(Data/binfmts/)
-endif()
+# Binfmt_misc files must be installed prior to Source/ installs
+add_subdirectory(Data/binfmts/)

 add_subdirectory(Source/)
 add_subdirectory(Data/AppConfig/)
@@ -1,35 +0,0 @@
-# This is a reference AArch64 cross compile script
-# Pass in to cmake when building:
-# eg: cmake -DCMAKE_TOOLCHAIN_FILE=../CMakeToolchains/AArch64.cmake ..
-if (NOT DEFINED ENV{SYSROOT})
-  message(FATAL_ERROR "Need to have SYSROOT environment variable set")
-endif()
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-set(CMAKE_CROSSCOMPILING TRUE)
-
-# Target triple needs to match the binutils exactly
-set(TARGET_TRIPLE aarch64-linux-gnu)
-set(CMAKE_C_COMPILER "clang")
-set(CMAKE_CXX_COMPILER "clang++")
-set(CMAKE_C_COMPILER_AR "llvm-ar")
-set(CMAKE_CXX_COMPILER_AR "llvm-ar")
-set(CMAKE_C_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_CXX_COMPILER_RANLIB "llvm-ranlib")
-set(CMAKE_LINKER "ld.lld")
-
-set(CMAKE_C_COMPILER_TARGET ${TARGET_TRIPLE})
-set(CMAKE_CXX_COMPILER_TARGET ${TARGET_TRIPLE})
-
-# Set the environment variable SYSROOT to the aarch64 rootfs
-set(CMAKE_FIND_ROOT_PATH "$ENV{SYSROOT}")
-set(CMAKE_SYSROOT "$ENV{SYSROOT}")
-
-list(APPEND CMAKE_PREFIX_PATH "$ENV{SYSROOT}/usr/lib/${TARGET_TRIPLE}/cmake/")
-
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
@@ -1,2 +0,0 @@
-add_library(CodeEmitter INTERFACE)
-target_include_directories(CodeEmitter INTERFACE .)
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-
-namespace ARMEmitter {
-class Buffer {
-public:
-  Buffer() {
-    SetBuffer(nullptr, 0);
-  }
-
-  Buffer(uint8_t* Base, uint64_t BaseSize) {
-    SetBuffer(Base, BaseSize);
-  }
-
-  void SetBuffer(uint8_t* Base, uint64_t BaseSize) {
-    BufferBase = Base;
-    CurrentOffset = BufferBase;
-    Size = BaseSize;
-  }
-
-  void dc8(uint8_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc16(uint16_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc32(uint32_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-
-  void dc64(uint64_t Data) {
-    decltype(Data)* Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
-    *Memory = Data;
-    CurrentOffset += sizeof(Data);
-  }
-  void EmitString(const char* String) {
-    const auto StringLength = strlen(String);
-    memcpy(CurrentOffset, String, StringLength);
-    CurrentOffset += StringLength;
-  }
-
-  void Align() {
-    // Align the buffer to instruction size
-    auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & 0b11;
-    if (!CurrentAlignment) {
-      return;
-    }
-    CurrentOffset += 4 - CurrentAlignment;
-  }
-
-  template<typename T>
-  T GetCursorAddress() const {
-    return reinterpret_cast<T>(CurrentOffset);
-  }
-
-  static void ClearICache(void* Begin, std::size_t Length) {
-    __builtin___clear_cache(static_cast<char*>(Begin), static_cast<char*>(Begin) + Length);
-  }
-
-  size_t GetCursorOffset() const {
-    return static_cast<size_t>(CurrentOffset - BufferBase);
-  }
-
-  uint8_t* GetBufferBase() const {
-    return BufferBase;
-  }
-
-  void CursorIncrement(size_t Size) {
-    CurrentOffset += Size;
-  }
-
-  void SetCursorOffset(size_t Offset) {
-    CurrentOffset = BufferBase + Offset;
-  }
-
-  uint64_t GetBufferSize() const {
-    return Size;
-  }
-
-  template<typename T>
-  size_t GetCursorOffsetFromAddress(const T* Address) const {
-    return static_cast<size_t>(reinterpret_cast<const uint8_t*>(Address) - BufferBase);
-  }
-
-protected:
-
-  void ResetBuffer() {
-    CurrentOffset = BufferBase;
-  }
-
-  uint8_t* BufferBase;
-  uint8_t* CurrentOffset;
-  uint64_t Size;
-};
-} // namespace ARMEmitter
@@ -1,843 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-
-#include <FEXCore/Utils/CompilerDefs.h>
-#include <FEXCore/Utils/EnumUtils.h>
-#include <FEXCore/Utils/LogManager.h>
-#include <FEXCore/Utils/MathUtils.h>
-#include <FEXCore/fextl/vector.h>
-
-#include <FEXHeaderUtils/BitUtils.h>
-#include <CodeEmitter/Buffer.h>
-#include <CodeEmitter/Registers.h>
-
-#include <array>
-#include <cstdint>
-#include <utility>
-#include <type_traits>
-
-/*
- * Welcome to FEX-Emu's custom AArch64 emitter.
- * This was written specifically to avoid the performance cost of the vixl emitter.
- *
- * There are some specific design constraints in this design to target a couple features:
- *   - High performance
- *   - Low CPU cache performance hit
- *   - Significantly reduced code footprint
- *   - Low number of branches
- *
- * These requirements are mostly achieved by removing a bunch of developer conveniences
- * that vixl provides. The developer needs to take a lot of care to not shoot themselves in the foot.
- *
- * Misc design decisions:
- * - Registers are encoded as basic uint32_t enums.
- *   - Converting between different registers is zero-cost.
- *   - Passing around as arguments are as cheap as registers
- *     - Contrast to vixl where every register requires living on the stack.
- *   - Registers can get encoded in to instructions with a simple `BFM` instruction.
- *
- * - Instructions are very simply emitted, allowing direct inlining most of the time.
- *   - These are simple enough that multiple back-to-back instructions get optimized to 128-bit load-store operations.
- *     - Contrast to vixl where pretty much no instruction emitter gets inlined.
- *
- * - Instruction emitters are /mostly/ unsized. Most instructions take a size argument first, which gets encoded
- *   directly in to the instruction.
- *   - Contrast to vixl where the register arguments are how the instructions determine operating size.
- *   - Size argument allows FEX to use `CSEL` to select a size at runtime, instead of branching.
- *   - Some instructions are explicitly sized based on register type. Read comments in the respective `inl` files to
- *     see why.
- *     Some scalar/vector operations are an example of this.
- *
- * - Almost zero helper functions.
- *   - Primary exception to this rule is load-store operations. These will use a helper to make
- *     it easier to select the correct load-store instruction. Mostly because these are a nightmare selecting
- *     the right instruction.
- */
-namespace ARMEmitter {
-/*
- * This `Size` enum is used for most ALU operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class Size : uint32_t {
-  i32Bit = 0,
-  i64Bit,
-};
-
-// This allows us to get the `Size` enum in bits.
-[[nodiscard]]
-constexpr size_t RegSizeInBits(Size size) {
-  return size_t {32} << FEXCore::ToUnderlying(size);
-}
-
-/* This `SubRegSize` enum is used for most ASIMD operations.
- * These follow the AArch64 encoding style in most cases.
- */
-enum class SubRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-  i128Bit = 0b100,
-};
-
-// This allows us to get the `SubRegSize` in bits.
-[[nodiscard]]
-constexpr size_t SubRegSizeInBits(SubRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-/* This `ScalarRegSize` enum is used for most scalar float
- * operations.
- *
- * This is specifically duplicated from `SubRegSize` to have strongly
- * typed functions.
- *
- * `ScalarRegSize` specifically doesn't have `i128Bit` because scalar operations
- * can't operate at 128-bit.
- */
-enum class ScalarRegSize : uint32_t {
-  i8Bit = 0b00,
-  i16Bit = 0b01,
-  i32Bit = 0b10,
-  i64Bit = 0b11,
-};
-
-// This allows us to get the `ScalarRegSize` in bits.
-[[nodiscard]]
-constexpr size_t ScalarRegSizeInBits(ScalarRegSize size) {
-  return size_t {8} << FEXCore::ToUnderlying(size);
-}
-
-/* This `VectorRegSizePair` union allows us to have an overlapping type
- * to select a scalar operation or a vector depending on which operation
- * we pass in.
- * Useful in FEX's vector operations that behave as scalar or vector
- * depending on various factors. But since the operation will have the sa,e
- * element size, we want to choose the operation more easily
- */
-union VectorRegSizePair {
-  ScalarRegSize Scalar;
-  SubRegSize Vector;
-};
-
-// This allows us to create a `VectorRegSizePair` union.
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(SubRegSize size) {
-  return VectorRegSizePair {.Vector = size};
-}
-[[nodiscard]]
-constexpr VectorRegSizePair ToVectorSizePair(ScalarRegSize size) {
-  return VectorRegSizePair {.Scalar = size};
-}
-
-// This `ShiftType` enum is used for ALU shift-register encoded instructions.
-enum class ShiftType : uint32_t {
-  LSL = 0,
-  LSR,
-  ASR,
-  ROR,
-};
-
-// This `ExtendedType` enum is used for ALU extended-register encoded instructions.
-enum class ExtendedType : uint32_t {
-  UXTB = 0b000,
-  UXTH = 0b001,
-  UXTW = 0b010,
-  UXTX = 0b011,
-  SXTB = 0b100,
-  SXTH = 0b101,
-  SXTW = 0b110,
-  SXTX = 0b111,
-  LSL_32 = UXTW,
-  LSL_64 = UXTX,
-};
-
-// This `Condition` enum is used for various conditional instructions.
-enum class Condition : uint32_t {
-  // Meaning:   Int                    - Float
-  CC_EQ = 0, // Equal                  - Equal
-  CC_NE,     // Not Eq                 - Not Eq or unordered
-  CC_CS,     // Carry set              - Greater than, equal, or unordered
-  CC_CC,     // Carry clear            - Less than
-  CC_MI,     // Minus/Negative         - Less than
-  CC_PL,     // Plus, positive or zero - GT, equal, or unordered
-  CC_VS,     // Overflow               - Unordered
-  CC_VC,     // No Overflow            - Ordered
-  CC_HI,     // Unsigned higher        - GT, or unordered
-  CC_LS,     // Unsigned lower or same - LT or EQ
-  CC_GE,     // Signed GT or EQ        - GT or EQ
-  CC_LT,     // Signed LT              - LT or Unordered
-  CC_GT,     // Signed GT              - GT
-  CC_LE,     // Signed LT or EQ        - LT, EQ, or Unordered
-  CC_AL,     // Always                 - Always
-  CC_NV,     // Always                 - Always
-
-  // Aliases
-  CC_HS = CC_CS,
-  CC_LO = CC_CC,
-};
-
-/*
- * This `StatusFlags` enum is used for conditional compare encoded instructions.
- * These directly encode to the `nzcv` flags.
- */
-enum class StatusFlags : uint32_t {
-  None = 0,
-  Flag_V = 0b0001,
-  Flag_C = 0b0010,
-  Flag_Z = 0b0100,
-  Flag_N = 0b1000,
-
-  Flag_NZCV = Flag_N | Flag_Z | Flag_C | Flag_V,
-};
-
-
-/*
- * This `IndexType` enum is used for load-store instructions.
- * Not all load-store instructions use this, so the user needs to be careful.
- */
-enum class IndexType {
-  POST,
-  OFFSET,
-  PRE,
-
-  UNPRIVILEGED,
-};
-
-// Used with adr and scalar + vector load/store variants to denote
-// a modifier operation.
-enum class SVEModType : uint8_t {
-  MOD_UXTW,
-  MOD_SXTW,
-  MOD_LSL,
-  MOD_NONE,
-};
-
-/* This `SVEMemOperand` class is used for the helper SVE load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class SVEMemOperand final {
-public:
-  enum class Type {
-    ScalarPlusScalar,
-    ScalarPlusImm,
-    ScalarPlusVector,
-    VectorPlusImm,
-  };
-
-  SVEMemOperand(XRegister rn, XRegister rm = XReg::zr)
-    : rn {rn}
-    , MemType {Type::ScalarPlusScalar}
-    , MetaType {.ScalarScalarType {
-        .rm = rm,
-      }} {}
-  SVEMemOperand(XRegister rn, int32_t imm = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusImm}
-    , MetaType {.ScalarImmType {
-        .Imm = imm,
-      }} {}
-  SVEMemOperand(XRegister rn, ZRegister zm, SVEModType mod = SVEModType::MOD_NONE, uint8_t scale = 0)
-    : rn {rn}
-    , MemType {Type::ScalarPlusVector}
-    , MetaType {.ScalarVectorType {
-        .zm = zm,
-        .mod = mod,
-        .scale = scale,
-      }} {}
-  SVEMemOperand(ZRegister zn, uint32_t imm)
-    : rn {Register {zn.Idx()}}
-    , MemType {Type::VectorPlusImm}
-    , MetaType {.VectorImmType {
-        .Imm = imm,
-      }} {}
-
-  [[nodiscard]]
-  bool IsScalarPlusScalar() const {
-    return MemType == Type::ScalarPlusScalar;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusImm() const {
-    return MemType == Type::ScalarPlusImm;
-  }
-  [[nodiscard]]
-  bool IsScalarPlusVector() const {
-    return MemType == Type::ScalarPlusVector;
-  }
-  [[nodiscard]]
-  bool IsVectorPlusImm() const {
-    return MemType == Type::VectorPlusImm;
-  }
-
-  union Data {
-    struct {
-      Register rm;
-    } ScalarScalarType;
-
-    struct {
-      int32_t Imm;
-    } ScalarImmType;
-
-    struct {
-      ZRegister zm;
-      SVEModType mod;
-      uint8_t scale;
-    } ScalarVectorType;
-
-    struct {
-      // rn will be a ZRegister
-      uint32_t Imm;
-    } VectorImmType;
-  };
-
-  Register rn;
-  Type MemType;
-  Data MetaType;
-};
-
-/* This `ExtendedMemOperand` class is used for the helper load-store instructions.
- * Load-store instructions are quite expressive, so having a helper that handles these differences is worth it.
- */
-class ExtendedMemOperand final {
-public:
-  ExtendedMemOperand(XRegister rn, XRegister rm = XReg::zr, ExtendedType Option = ExtendedType::LSL_64, uint32_t Shift = 0)
-    : rn {rn}
-    , MetaType {.ExtendedType {
-        .Header = {.MemType = TYPE_EXTENDED},
-        .rm = rm,
-        .Option = Option,
-        .Shift = Shift,
-      }} {}
-  ExtendedMemOperand(XRegister rn, IndexType Index = IndexType::OFFSET, int32_t Imm = 0)
-    : rn {rn}
-    , MetaType {.ImmType {
-        .Header = {.MemType = TYPE_IMM},
-        .Index = Index,
-        .Imm = Imm,
-      }} {}
-
-  Register rn;
-  enum Type {
-    TYPE_EXTENDED,
-    TYPE_IMM,
-  };
-  struct HeaderStruct {
-    Type MemType;
-  };
-  union {
-    HeaderStruct Header;
-    struct {
-      HeaderStruct Header;
-      Register rm;
-      ExtendedType Option;
-      uint32_t Shift;
-    } ExtendedType;
-    struct {
-      HeaderStruct Header;
-      IndexType Index;
-      int32_t Imm;
-    } ImmType;
-  } MetaType;
-};
-
-template<uint32_t op0, uint32_t op1, uint32_t CRn, uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenSystemReg() {
-  return op0 << 19 | op1 << 16 | CRn << 12 | CRm << 8 | op2 << 5;
-};
-
-// This `SystemRegister` enum is used for the mrs/msr instructions.
-enum class SystemRegister : uint32_t {
-  CTR_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b001>(),
-  DCZID_EL0 = GenSystemReg<0b11, 0b011, 0b0000, 0b0000, 0b111>(),
-  TPIDR_EL0 = GenSystemReg<0b11, 0b011, 0b1101, 0b0000, 0b010>(),
-  RNDR = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b000>(),
-  RNDRRS = GenSystemReg<0b11, 0b011, 0b0010, 0b0100, 0b001>(),
-  NZCV = GenSystemReg<0b11, 0b011, 0b0100, 0b0010, 0b000>(),
-  FPCR = GenSystemReg<0b11, 0b011, 0b0100, 0b0100, 0b000>(),
-  CNTFRQ_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b000>(),
-  CNTVCT_EL0 = GenSystemReg<0b11, 0b011, 0b1110, 0b0000, 0b010>(),
-};
-
-template<uint32_t op1, uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenDCReg() {
-  return op1 << 16 | CRm << 8 | op2 << 5;
-};
-
-// This `DataCacheOperation` enum is used for the dc instruction.
-enum class DataCacheOperation : uint32_t {
-  IVAC = GenDCReg<0b000, 0b0110, 0b001>(),
-  ISW = GenDCReg<0b000, 0b0110, 0b010>(),
-  CSW = GenDCReg<0b000, 0b1010, 0b010>(),
-  CISW = GenDCReg<0b000, 0b1110, 0b010>(),
-  ZVA = GenDCReg<0b011, 0b0100, 0b001>(),
-  CVAC = GenDCReg<0b011, 0b1010, 0b001>(),
-  CVAU = GenDCReg<0b011, 0b1011, 0b001>(),
-  CIVAC = GenDCReg<0b011, 0b1110, 0b001>(),
-
-  // MTE2
-  IGVAC = GenDCReg<0b000, 0b0110, 0b011>(),
-  IGSW = GenDCReg<0b000, 0b0110, 0b100>(),
-  IGDVAC = GenDCReg<0b000, 0b0110, 0b101>(),
-  IGDSW = GenDCReg<0b000, 0b0110, 0b110>(),
-  CGSW = GenDCReg<0b000, 0b1010, 0b100>(),
-  CGDSW = GenDCReg<0b000, 0b1010, 0b110>(),
-  CIGSW = GenDCReg<0b000, 0b1110, 0b100>(),
-  CIGDSW = GenDCReg<0b000, 0b1110, 0b110>(),
-
-  // MTE
-  GVA = GenDCReg<0b011, 0b0100, 0b011>(),
-  GZVA = GenDCReg<0b011, 0b0100, 0b100>(),
-  CGVAC = GenDCReg<0b011, 0b1010, 0b011>(),
-  CGDVAC = GenDCReg<0b011, 0b1010, 0b101>(),
-  CGVAP = GenDCReg<0b011, 0b1100, 0b011>(),
-  CGDVAP = GenDCReg<0b011, 0b1100, 0b101>(),
-  CGVADP = GenDCReg<0b011, 0b1101, 0b011>(),
-  CGDVADP = GenDCReg<0b011, 0b1101, 0b101>(),
-  CIGVAC = GenDCReg<0b011, 0b1110, 0b011>(),
-  CIGDVAC = GenDCReg<0b011, 0b1110, 0b101>(),
-
-  // DPB
-  CVAP = GenDCReg<0b011, 0b1100, 0b001>(),
-
-  // DPB2
-  CVADP = GenDCReg<0b011, 0b1101, 0b001>(),
-};
-
-template<uint32_t CRm, uint32_t op2>
-constexpr uint32_t GenHintBarrierReg() {
-  return CRm << 8 | op2 << 5;
-}
-
-// This `HintRegister` enum is used for the hint instruction.
-enum class HintRegister : uint32_t {
-  NOP = GenHintBarrierReg<0b0000, 0b000>(),
-  YIELD = GenHintBarrierReg<0b0000, 0b001>(),
-  WFE = GenHintBarrierReg<0b0000, 0b010>(),
-  WFI = GenHintBarrierReg<0b0000, 0b011>(),
-  SEV = GenHintBarrierReg<0b0000, 0b100>(),
-  SEVL = GenHintBarrierReg<0b0000, 0b101>(),
-  DGH = GenHintBarrierReg<0b0000, 0b110>(),
-  CSDB = GenHintBarrierReg<0b0010, 0b100>(),
-};
-
-// This `BarrierRegister` enum is used for the various barrier instructions.
-enum class BarrierRegister : uint32_t {
-  CLREX = GenHintBarrierReg<0b0000, 0b010>(),
-  TCOMMIT = GenHintBarrierReg<0b0000, 0b011>(),
-  DSB = GenHintBarrierReg<0b0000, 0b100>(),
-  DMB = GenHintBarrierReg<0b0000, 0b101>(),
-  ISB = GenHintBarrierReg<0b0000, 0b110>(),
-  SB = GenHintBarrierReg<0b0000, 0b111>(),
-};
-
-// This `BarrierScope` enum is used for the dsb/dmb instructions.
-enum class BarrierScope : uint32_t {
-  // Outer shareable
-  OSHLD = 0b0001,
-  OSHST = 0b0010,
-  OSH = 0b0011,
-  // Non shareable
-  NSHLD = 0b0101,
-  NSHST = 0b0110,
-  NSH = 0b0111,
-  // Inner shareable
-  ISHLD = 0b1001,
-  ISHST = 0b1010,
-  ISH = 0b1011,
-  // Full System visibility
-  LD = 0b1101,
-  ST = 0b1110,
-  SY = 0b1111,
-};
-
-// This `Prefetch` enum is used for prefetch instructions.
-enum class Prefetch : uint32_t {
-  // Prefetch for load
-  PLDL1KEEP = 0b00000,
-  PLDL1STRM = 0b00001,
-  PLDL2KEEP = 0b00010,
-  PLDL2STRM = 0b00011,
-  PLDL3KEEP = 0b00100,
-  PLDL3STRM = 0b00101,
-
-  // Preload instructions
-  PLIL1KEEP = 0b01000,
-  PLIL1STRM = 0b01001,
-  PLIL2KEEP = 0b01010,
-  PLIL2STRM = 0b01011,
-  PLIL3KEEP = 0b01100,
-  PLIL3STRM = 0b01101,
-
-  // Preload for store
-  PSTL1KEEP = 0b10000,
-  PSTL1STRM = 0b10001,
-  PSTL2KEEP = 0b10010,
-  PSTL2STRM = 0b10011,
-  PSTL3KEEP = 0b10100,
-  PSTL3STRM = 0b10101,
-};
-
-// This `PredicatePattern` enun is used for some SVE instructions.
-enum class PredicatePattern : uint32_t {
-  SVE_POW2 = 0b00000,
-  SVE_VL1 = 0b00001,
-  SVE_VL2 = 0b00010,
-  SVE_VL3 = 0b00011,
-  SVE_VL4 = 0b00100,
-  SVE_VL5 = 0b00101,
-  SVE_VL6 = 0b00110,
-  SVE_VL7 = 0b00111,
-  SVE_VL8 = 0b01000,
-  SVE_VL16 = 0b01001,
-  SVE_VL32 = 0b01010,
-  SVE_VL64 = 0b01011,
-  SVE_VL128 = 0b01100,
-  SVE_VL256 = 0b01101,
-  SVE_MUL4 = 0b11101,
-  SVE_MUL3 = 0b11110,
-  SVE_ALL = 0b11111,
-};
-
-// Used with SVE FP immediate arithmetic instructions
-enum class SVEFAddSubImm : uint32_t {
-  _0_5,
-  _1_0,
-};
-enum class SVEFMulImm : uint32_t {
-  _0_5,
-  _2_0,
-};
-enum class SVEFMaxMinImm : uint32_t {
-  _0_0,
-  _1_0,
-};
-
-/* This `BackwardLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `below` an instruction that uses it.
- * Which means that a branch would jump backwards.
- */
-struct BackwardLabel {
-  uint8_t* Location {};
-};
-
-/* This `SingleUseForwardLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is logically `above` an instruction that uses it.
- * Which means that a branch would jump forwards.
- *
- * The `ForwardLabel` struct can be bound to multiple instructions, so it needs a vector for each bind instruction type.
- */
-struct SingleUseForwardLabel {
-  enum class InstType {
-    UNKNOWN,
-    ADR,
-    ADRP,
-    B,
-    BC,
-    TEST_BRANCH,
-    RELATIVE_LOAD,
-    LONG_ADDRESS_GEN,
-  };
-  uint8_t* Location {};
-  InstType Type = InstType::UNKNOWN;
-};
-
-struct ForwardLabel {
-  fextl::vector<SingleUseForwardLabel> Insts {};
-};
-
-/* This `BiDirectionalLabel` struct used for retaining a location for PC-Relative instructions.
- * This is specifically a label for a target that is in either direction of an instruction that uses it.
- * Which means a branch could jump backwards or forwards depending on situation.
- */
-struct BiDirectionalLabel {
-  BackwardLabel Backward;
-  ForwardLabel Forward;
-};
-
-static inline void AddLocationToLabel(SingleUseForwardLabel* Label, SingleUseForwardLabel&& Location) {
-  LOGMAN_THROW_A_FMT(Label->Type == SingleUseForwardLabel::InstType::UNKNOWN, "Trying to bind a SingleUseForwardLabel to multiple "
-                                                                              "locations. Use ForwardLabel instead.");
-  *Label = std::move(Location);
-}
-
-static inline void AddLocationToLabel(ForwardLabel* Label, SingleUseForwardLabel&& Location) {
-  Label->Insts.emplace_back(std::move(Location));
-}
-
-// Some FCMA ASIMD instructions support a rotation argument.
-enum class Rotation : uint32_t {
-  ROTATE_0 = 0b00,
-  ROTATE_90 = 0b01,
-  ROTATE_180 = 0b10,
-  ROTATE_270 = 0b11,
-};
-
-// Concept for contraining some instructions to accept only an XRegister or WRegister.
-// Particularly for operations that differ encodings depending on which one is used.
-template<typename T>
-concept IsXOrWRegister = std::is_same_v<T, XRegister> || std::is_same_v<T, WRegister>;
-
-// Whether or not a given set of vector registers are sequential
-// in increasing order as far as the register file is concerned (modulo its size)
-//
-// For example, a set of registers like:
-//
-// v1,  v2, v3 and
-// v31, v0, v1
-//
-// would both be considered sequential sequences, and some instructions in particular
-// limit register lists to these kind of sequences.
-//
-template<typename T, typename... Args>
-constexpr bool AreVectorsSequential(T first, const Args&... args) {
-  // Ensure we always have a pair of registers to compare against.
-  static_assert(sizeof...(args) >= 1, "Number of arguments must be greater than 1");
-
-  const auto fn = [](auto& lhs, const auto& rhs) {
-    const auto result = ((lhs.Idx() + 1) % 32) == rhs.Idx();
-    lhs = rhs;
-    return result;
-  };
-
-  return (fn(first, args) && ...);
-}
-
-// Returns if the immediate can fit in to add/sub immediate instruction encodings.
-constexpr bool IsImmAddSub(uint64_t imm) {
-  constexpr uint64_t U12Mask = 0xFFF;
-  auto FitsWithin12Bits = [](uint64_t imm) {
-    return (imm & ~U12Mask) == 0;
-  };
-  // Can fit in to the instruction encoding:
-  // - if only bits [11:0] are set.
-  // - if only bits [23:12] are set.
-  return FitsWithin12Bits(imm) || (FitsWithin12Bits(imm >> 12) && (imm & U12Mask) == 0);
-}
-
-// This is an emitter that is designed around the smallest code bloat as possible.
-// Eschewing most developer convenience in order to keep code as small as possible.
-
-// Choices:
-// - Size of ops passed as an argument rather than template to let the compiler use csel instead of branching.
-// - Registers are unsized so they can be passed in a GPR and not need conversion operations
-class Emitter : public ARMEmitter::Buffer {
-public:
-  Emitter() = default;
-
-  Emitter(uint8_t* Base, uint64_t BaseSize)
-    : Buffer(Base, BaseSize) {}
-
-  // Bind a backward label to an address.
-  // Address that is bound is the current emitter location.
-  void Bind(BackwardLabel* Label) {
-    LOGMAN_THROW_AA_FMT(Label->Location == nullptr, "Trying to bind a label twice");
-    Label->Location = GetCursorAddress<uint8_t*>();
-  }
-
-  void Bind(const SingleUseForwardLabel* Label) {
-    uint8_t* CurrentAddress = GetCursorAddress<uint8_t*>();
-    // Patch up the instructions
-    switch (Label->Type) {
-    case SingleUseForwardLabel::InstType::ADR: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(IsADRRange(Imm), "Unscaled offset too large");
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case SingleUseForwardLabel::InstType::ADRP: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(IsADRPRange(Imm) && IsADRPAligned(Imm), "Unscaled offset too large");
-      Imm >>= 12;
-      uint32_t InstMask = 0b11 << 29 | 0b1111'1111'1111'1111'111 << 5;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & 0x3F'FFFF;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= (Offset & 0b11) << 29;
-      Inst |= (Offset >> 2) << 5;
-      *Instruction = Inst;
-      break;
-    }
-
-    case SingleUseForwardLabel::InstType::B: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -134217728 && Imm <= 134217724 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FF'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~InstMask;
-      Inst |= Offset;
-      *Instruction = Inst;
-
-      break;
-    }
-
-    case SingleUseForwardLabel::InstType::TEST_BRANCH: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x3FFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-
-      break;
-    }
-    case SingleUseForwardLabel::InstType::BC:
-    case SingleUseForwardLabel::InstType::RELATIVE_LOAD: {
-      uint32_t* Instruction = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t Imm = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(Instruction);
-      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");
-      Imm >>= 2;
-      uint32_t InstMask = 0x7'FFFF;
-      uint32_t Offset = static_cast<uint32_t>(Imm) & InstMask;
-      uint32_t Inst = *Instruction & ~(InstMask << 5);
-      Inst |= Offset << 5;
-      *Instruction = Inst;
-      break;
-    }
-    case SingleUseForwardLabel::InstType::LONG_ADDRESS_GEN: {
-      uint32_t* Instructions = reinterpret_cast<uint32_t*>(Label->Location);
-      int64_t ImmInstOne = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[0]);
-      int64_t ImmInstTwo = reinterpret_cast<int64_t>(CurrentAddress) - reinterpret_cast<int64_t>(&Instructions[1]);
-      auto OriginalOffset = GetCursorOffset();
-
-      auto InstOffset = GetCursorOffsetFromAddress(Instructions);
-      SetCursorOffset(InstOffset);
-
-      // We encoded the destination register in to the first instruction space.
-      // Read it back.
-      ARMEmitter::Register DestReg(Instructions[0]);
-
-      if (IsADRRange(ImmInstTwo)) {
-        // If within ADR range from the second instruction, then we can emit NOP+ADR
-        nop();
-        adr(DestReg, static_cast<uint32_t>(ImmInstTwo) & 0x7FFF);
-      } else if (IsADRPRange(ImmInstOne)) {
-
-        // If within ADRP range from the first instruction, then we are /definitely/ in range for the second instruction.
-        // First check if we are in non-offset range for second instruction.
-        if (IsADRPAligned(reinterpret_cast<uint64_t>(CurrentAddress))) {
-          // We can emit nop + adrp
-          nop();
-          adrp(DestReg, static_cast<uint32_t>(ImmInstTwo >> 12) & 0x7FFF);
-        } else {
-          // Not aligned, need adrp + add
-          adrp(DestReg, static_cast<uint32_t>(ImmInstOne >> 12) & 0x7FFF);
-          add(ARMEmitter::Size::i64Bit, DestReg, DestReg, ImmInstOne & 0xFFF);
-        }
-      } else {
-        LOGMAN_MSG_A_FMT("Unscaled offset is too large");
-        FEX_UNREACHABLE;
-      }
-
-      SetCursorOffset(OriginalOffset);
-      break;
-    }
-    default: LOGMAN_MSG_A_FMT("Unexpected inst type in label fixup");
-    }
-  }
-
-  // Bind a forward label to a location.
-  // This walks all the instructions in the label's vector.
-  // Then backpatching all instructions that have used the label.
-  template<bool WarnAboutEmpty = false>
-  void Bind(ForwardLabel* Label) {
-    if constexpr (WarnAboutEmpty) {
-      LOGMAN_THROW_A_FMT(Label->Insts.empty() == false, "Binding forward label that didn't have any instructions using it");
-    }
-    for (auto& Inst : Label->Insts) {
-      Bind(&Inst);
-    }
-  }
-
-  // Bind a bidirectional location to a location.
-  // Binds both forwards and backwards depending on how the label was used.
-  void Bind(BiDirectionalLabel* Label) {
-    if (!Label->Backward.Location) {
-      Bind(&Label->Backward);
-    }
-    Bind<false>(&Label->Forward);
-  }
-
-#include <CodeEmitter/VixlUtils.inl>
-
-public:
-  // TODO: Implement SME when it matters.
-#include <CodeEmitter/ALUOps.inl>
-#include <CodeEmitter/BranchOps.inl>
-#include <CodeEmitter/LoadstoreOps.inl>
-#include <CodeEmitter/SystemOps.inl>
-#include <CodeEmitter/ScalarOps.inl>
-#include <CodeEmitter/ASIMDOps.inl>
-#include <CodeEmitter/SVEOps.inl>
-
-private:
-  template<typename T>
-  uint32_t Encode_ra(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  uint32_t Encode_ra(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rt2(T Reg) const {
-    return Reg.Idx() << 10;
-  }
-  template<>
-  uint32_t Encode_rt2(uint32_t Reg) const {
-    return Reg << 10;
-  }
-  template<typename T>
-  uint32_t Encode_rm(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rm(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rs(T Reg) const {
-    return Reg.Idx() << 16;
-  }
-  uint32_t Encode_rs(uint32_t Reg) const {
-    return Reg << 16;
-  }
-  template<typename T>
-  uint32_t Encode_rn(T Reg) const {
-    return Reg.Idx() << 5;
-  }
-  uint32_t Encode_rn(uint32_t Reg) const {
-    return Reg << 5;
-  }
-  template<typename T>
-  uint32_t Encode_rd(T Reg) const {
-    return Reg.Idx();
-  }
-  uint32_t Encode_rd(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_rt(T Reg) const {
-    return Reg.Idx();
-  }
-  template<>
-  uint32_t Encode_rt(Prefetch Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-  uint32_t Encode_rt(uint32_t Reg) const {
-    return Reg;
-  }
-  template<typename T>
-  uint32_t Encode_pd(T Reg) const {
-    return FEXCore::ToUnderlying(Reg);
-  }
-};
-} // namespace ARMEmitter
@@ -1,351 +0,0 @@
-// Collection of utilities from vixl.
-// Following is the vixl license.
-// Copyright 2015, VIXL authors
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are met:
-//
-//   * Redistributions of source code must retain the above copyright notice,
-//     this list of conditions and the following disclaimer.
-//   * Redistributions in binary form must reproduce the above copyright notice,
-//     this list of conditions and the following disclaimer in the documentation
-//     and/or other materials provided with the distribution.
-//   * Neither the name of ARM Limited nor the names of its contributors may be
-//     used to endorse or promote products derived from this software without
-//     specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
-// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
-// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-
-// Test if a given value can be encoded in the immediate field of a logical
-// instruction.
-// If it can be encoded, the function returns true, and values pointed to by n,
-// imm_s and imm_r are updated with immediates encoded in the format required
-// by the corresponding fields in the logical instruction.
-// If it can not be encoded, the function returns false, and the values pointed
-// to by n, imm_s and imm_r are undefined.
-static bool IsImmLogical(uint64_t value,
-                             unsigned width,
-                             unsigned* n = nullptr,
-                             unsigned* imm_s = nullptr,
-                             unsigned* imm_r = nullptr) {
-  [[maybe_unused]] constexpr auto kBRegSize = 8;
-  [[maybe_unused]] constexpr auto kHRegSize = 16;
-  [[maybe_unused]] constexpr auto kSRegSize = 32;
-  [[maybe_unused]] constexpr auto kDRegSize = 64;
-
-  constexpr auto kWRegSize = 32;
-  constexpr auto kXRegSize = 64;
-
-  LOGMAN_THROW_A_FMT((width == kBRegSize) || (width == kHRegSize) ||
-              (width == kSRegSize) || (width == kDRegSize), "Unexpected imm size");
-
-  bool negate = false;
-
-  // Logical immediates are encoded using parameters n, imm_s and imm_r using
-  // the following table:
-  //
-  //    N   imms    immr    size        S             R
-  //    1  ssssss  rrrrrr    64    UInt(ssssss)  UInt(rrrrrr)
-  //    0  0sssss  xrrrrr    32    UInt(sssss)   UInt(rrrrr)
-  //    0  10ssss  xxrrrr    16    UInt(ssss)    UInt(rrrr)
-  //    0  110sss  xxxrrr     8    UInt(sss)     UInt(rrr)
-  //    0  1110ss  xxxxrr     4    UInt(ss)      UInt(rr)
-  //    0  11110s  xxxxxr     2    UInt(s)       UInt(r)
-  // (s bits must not be all set)
-  //
-  // A pattern is constructed of size bits, where the least significant S+1 bits
-  // are set. The pattern is rotated right by R, and repeated across a 32 or
-  // 64-bit value, depending on destination register width.
-  //
-  // Put another way: the basic format of a logical immediate is a single
-  // contiguous stretch of 1 bits, repeated across the whole word at intervals
-  // given by a power of 2. To identify them quickly, we first locate the
-  // lowest stretch of 1 bits, then the next 1 bit above that; that combination
-  // is different for every logical immediate, so it gives us all the
-  // information we need to identify the only logical immediate that our input
-  // could be, and then we simply check if that's the value we actually have.
-  //
-  // (The rotation parameter does give the possibility of the stretch of 1 bits
-  // going 'round the end' of the word. To deal with that, we observe that in
-  // any situation where that happens the bitwise NOT of the value is also a
-  // valid logical immediate. So we simply invert the input whenever its low bit
-  // is set, and then we know that the rotated case can't arise.)
-
-  if (value & 1) {
-    // If the low bit is 1, negate the value, and set a flag to remember that we
-    // did (so that we can adjust the return values appropriately).
-    negate = true;
-    value = ~value;
-  }
-
-  if (width <= kWRegSize) {
-    // To handle 8/16/32-bit logical immediates, the very easiest thing is to repeat
-    // the input value to fill a 64-bit word. The correct encoding of that as a
-    // logical immediate will also be the correct encoding of the value.
-
-    // Avoid making the assumption that the most-significant 56/48/32 bits are zero by
-    // shifting the value left and duplicating it.
-    for (unsigned bits = width; bits <= kWRegSize; bits *= 2) {
-      value <<= bits;
-      uint64_t mask = (UINT64_C(1) << bits) - 1;
-      value |= ((value >> bits) & mask);
-    }
-  }
-
-  // The basic analysis idea: imagine our input word looks like this.
-  //
-  //    0011111000111110001111100011111000111110001111100011111000111110
-  //                                                          c  b    a
-  //                                                          |<--d-->|
-  //
-  // We find the lowest set bit (as an actual power-of-2 value, not its index)
-  // and call it a. Then we add a to our original number, which wipes out the
-  // bottommost stretch of set bits and replaces it with a 1 carried into the
-  // next zero bit. Then we look for the new lowest set bit, which is in
-  // position b, and subtract it, so now our number is just like the original
-  // but with the lowest stretch of set bits completely gone. Now we find the
-  // lowest set bit again, which is position c in the diagram above. Then we'll
-  // measure the distance d between bit positions a and c (using CLZ), and that
-  // tells us that the only valid logical immediate that could possibly be equal
-  // to this number is the one in which a stretch of bits running from a to just
-  // below b is replicated every d bits.
-  uint64_t a = LowestSetBit(value);
-  uint64_t value_plus_a = value + a;
-  uint64_t b = LowestSetBit(value_plus_a);
-  uint64_t value_plus_a_minus_b = value_plus_a - b;
-  uint64_t c = LowestSetBit(value_plus_a_minus_b);
-
-  int d, clz_a, out_n;
-  uint64_t mask;
-
-  if (c != 0) {
-    // The general case, in which there is more than one stretch of set bits.
-    // Compute the repeat distance d, and set up a bitmask covering the basic
-    // unit of repetition (i.e. a word with the bottom d bits set). Also, in all
-    // of these cases the N bit of the output will be zero.
-    clz_a = CountLeadingZeros(a, kXRegSize);
-    int clz_c = CountLeadingZeros(c, kXRegSize);
-    d = clz_a - clz_c;
-    mask = ((UINT64_C(1) << d) - 1);
-    out_n = 0;
-  } else {
-    // Handle degenerate cases.
-    //
-    // If any of those 'find lowest set bit' operations didn't find a set bit at
-    // all, then the word will have been zero thereafter, so in particular the
-    // last lowest_set_bit operation will have returned zero. So we can test for
-    // all the special case conditions in one go by seeing if c is zero.
-    if (a == 0) {
-      // The input was zero (or all 1 bits, which will come to here too after we
-      // inverted it at the start of the function), for which we just return
-      // false.
-      return false;
-    } else {
-      // Otherwise, if c was zero but a was not, then there's just one stretch
-      // of set bits in our word, meaning that we have the trivial case of
-      // d == 64 and only one 'repetition'. Set up all the same variables as in
-      // the general case above, and set the N bit in the output.
-      clz_a = CountLeadingZeros(a, kXRegSize);
-      d = 64;
-      mask = ~UINT64_C(0);
-      out_n = 1;
-    }
-  }
-
-  // If the repeat period d is not a power of two, it can't be encoded.
-  if (!IsPowerOf2(d)) {
-    return false;
-  }
-
-  if (((b - a) & ~mask) != 0) {
-    // If the bit stretch (b - a) does not fit within the mask derived from the
-    // repeat period, then fail.
-    return false;
-  }
-
-  // The only possible option is b - a repeated every d bits. Now we're going to
-  // actually construct the valid logical immediate derived from that
-  // specification, and see if it equals our original input.
-  //
-  // To repeat a value every d bits, we multiply it by a number of the form
-  // (1 + 2^d + 2^(2d) + ...), i.e. 0x0001000100010001 or similar. These can
-  // be derived using a table lookup on CLZ(d).
-  static const uint64_t multipliers[] = {
-      0x0000000000000001UL,
-      0x0000000100000001UL,
-      0x0001000100010001UL,
-      0x0101010101010101UL,
-      0x1111111111111111UL,
-      0x5555555555555555UL,
-  };
-  uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57];
-  uint64_t candidate = (b - a) * multiplier;
-
-  if (value != candidate) {
-    // The candidate pattern doesn't match our input value, so fail.
-    return false;
-  }
-
-  // We have a match! This is a valid logical immediate, so now we have to
-  // construct the bits and pieces of the instruction encoding that generates
-  // it.
-
-  // Count the set bits in our basic stretch. The special case of clz(0) == -1
-  // makes the answer come out right for stretches that reach the very top of
-  // the word (e.g. numbers like 0xffffc00000000000).
-  int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize);
-  int s = clz_a - clz_b;
-
-  // Decide how many bits to rotate right by, to put the low bit of that basic
-  // stretch in position a.
-  int r;
-  if (negate) {
-    // If we inverted the input right at the start of this function, here's
-    // where we compensate: the number of set bits becomes the number of clear
-    // bits, and the rotation count is based on position b rather than position
-    // a (since b is the location of the 'lowest' 1 bit after inversion).
-    s = d - s;
-    r = (clz_b + 1) & (d - 1);
-  } else {
-    r = (clz_a + 1) & (d - 1);
-  }
-
-  // Now we're done, except for having to encode the S output in such a way that
-  // it gives both the number of set bits and the length of the repeated
-  // segment. The s field is encoded like this:
-  //
-  //     imms    size        S
-  //    ssssss    64    UInt(ssssss)
-  //    0sssss    32    UInt(sssss)
-  //    10ssss    16    UInt(ssss)
-  //    110sss     8    UInt(sss)
-  //    1110ss     4    UInt(ss)
-  //    11110s     2    UInt(s)
-  //
-  // So we 'or' (2 * -d) with our computed s to form imms.
-  if ((n != NULL) || (imm_s != NULL) || (imm_r != NULL)) {
-    *n = out_n;
-    *imm_s = ((2 * -d) | (s - 1)) & 0x3f;
-    *imm_r = r;
-  }
-
-  return true;
-}
-
-static inline bool IsIntN(unsigned n, int64_t x) {
-  if (n == 64) return true;
-  int64_t limit = INT64_C(1) << (n - 1);
-  return (-limit <= x) && (x < limit);
-}
-
-static inline bool IsUintN(unsigned n, int64_t x) {
-  // Convert to an unsigned integer to avoid implementation-defined behavior.
-  return !(static_cast<uint64_t>(x) >> n);
-}
-
-// clang-format off
-#define INT_1_TO_32_LIST(V)                                                    \
-V(1)  V(2)  V(3)  V(4)  V(5)  V(6)  V(7)  V(8)                                 \
-V(9)  V(10) V(11) V(12) V(13) V(14) V(15) V(16)                                \
-V(17) V(18) V(19) V(20) V(21) V(22) V(23) V(24)                                \
-V(25) V(26) V(27) V(28) V(29) V(30) V(31) V(32)
-
-#define INT_33_TO_63_LIST(V)                                                   \
-V(33) V(34) V(35) V(36) V(37) V(38) V(39) V(40)                                \
-V(41) V(42) V(43) V(44) V(45) V(46) V(47) V(48)                                \
-V(49) V(50) V(51) V(52) V(53) V(54) V(55) V(56)                                \
-V(57) V(58) V(59) V(60) V(61) V(62) V(63)
-
-#define INT_1_TO_63_LIST(V) INT_1_TO_32_LIST(V) INT_33_TO_63_LIST(V)
-
-// clang-format on
-
-#define DECLARE_IS_INT_N(N)                                       \
-  static inline bool IsInt##N(int64_t x) { return IsIntN(N, x); }
-
-#define DECLARE_IS_UINT_N(N)                                        \
-  static inline bool IsUint##N(int64_t x) { return IsUintN(N, x); }
-
-INT_1_TO_63_LIST(DECLARE_IS_INT_N)
-INT_1_TO_63_LIST(DECLARE_IS_UINT_N)
-
-#undef DECLARE_IS_INT_N
-#undef DECLARE_IS_UINT_N
-
-private:
-
-template <typename V>
-static inline bool IsPowerOf2(V value) {
-  return (value != 0) && ((value & (value - 1)) == 0);
-}
-
-// Some compilers dislike negating unsigned integers,
-// so we provide an equivalent.
-template <typename T>
-static inline T UnsignedNegate(T value) {
-  static_assert(std::is_unsigned<T>::value);
-  return ~value + 1;
-}
-
-static inline uint64_t LowestSetBit(uint64_t value) {
-  return value & UnsignedNegate(value);
-}
-
-template <typename V>
-static inline int CountLeadingZeros(V value, int width = (sizeof(V) * 8)) {
-#if COMPILER_HAS_BUILTIN_CLZ
-  if (width == 32) {
-    return (value == 0) ? 32 : __builtin_clz(static_cast<unsigned>(value));
-  } else if (width == 64) {
-    return (value == 0) ? 64 : __builtin_clzll(value);
-  }
-#endif
-  return CountLeadingZerosFallBack(value, width);
-}
-
-static inline int CountLeadingZerosFallBack(uint64_t value, int width) {
-  LOGMAN_THROW_A_FMT(IsPowerOf2(width) && (width <= 64), "Invalid width");
-  if (value == 0) {
-    return width;
-  }
-  int count = 0;
-  value = value << (64 - width);
-  if ((value & UINT64_C(0xffffffff00000000)) == 0) {
-    count += 32;
-    value = value << 32;
-  }
-  if ((value & UINT64_C(0xffff000000000000)) == 0) {
-    count += 16;
-    value = value << 16;
-  }
-  if ((value & UINT64_C(0xff00000000000000)) == 0) {
-    count += 8;
-    value = value << 8;
-  }
-  if ((value & UINT64_C(0xf000000000000000)) == 0) {
-    count += 4;
-    value = value << 4;
-  }
-  if ((value & UINT64_C(0xc000000000000000)) == 0) {
-    count += 2;
-    value = value << 2;
-  }
-  if ((value & UINT64_C(0x8000000000000000)) == 0) {
-    count += 1;
-  }
-  count += (value == 0);
-  return count;
-}
-
-public:
@@ -1,6 +1,5 @@
 {
-  "Comment": "Bypasses libGL's glX and instead sends GLX requests directly via xcb",
-  "ThunksDB": {
-    "GL": 0
+  "Config": {
+    "AdditionalArguments": "--no-sandbox"
  }
 }
@@ -2,6 +2,9 @@
  "DB": {
    "GL": {
      "Library" : "libGL-guest.so",
+      "Depends": [
+        "X11"
+      ],
      "Overlay": [
        "@PREFIX_LIB@/libGL.so",
        "@PREFIX_LIB@/libGL.so.1",
@@ -30,10 +33,16 @@
    },
    "Vulkan": {
      "Library": "libvulkan-guest.so",
+      "Depends": [
+        "xcb"
+      ],
      "Overlay": [
        "@PREFIX_LIB@/libvulkan.so",
        "@PREFIX_LIB@/libvulkan.so.1",
        "@HOME@/.local/share/Steam/ubuntu12_32/steam-runtime/pinned_libs_64/libvulkan.so.1"
+      ],
+      "Comment": [
+        "Vulkan library relies on xcb, otherwise it crashes with jemalloc"
      ]
    },
    "xcb": {
@@ -13,14 +13,5 @@ function(GenBinFmt Name)
    DESTINATION ${CMAKE_INSTALL_PREFIX}/share/binfmts/)
 endfunction()

-if (NOT USE_LEGACY_BINFMTMISC)
-  configure_file(FEX-x86.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf)
-  configure_file(FEX-x86_64.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf)
-
-  install(
-    FILES ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf
-    DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/binfmt.d/)
-else()
-  GenBinFmt(FEX-x86.in)
-  GenBinFmt(FEX-x86_64.in)
-endif()
+GenBinFmt(FEX-x86.in)
+GenBinFmt(FEX-x86_64.in)
@@ -1 +0,0 @@
-:FEX-x86:M:0:\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF
@@ -1 +0,0 @@
-:FEX-x86_64:M:0:\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF
@@ -3,12 +3,11 @@ FROM ubuntu:20.04 as builder

 RUN DEBIAN_FRONTEND="noninteractive" apt-get update
 RUN DEBIAN_FRONTEND="noninteractive" apt install -y cmake \
-clang-10 llvm-10 nasm ninja-build pkg-config \
-libcap-dev libglfw3-dev libepoxy-dev python3-dev libsdl2-dev \
-python3 linux-headers-generic \
-git
+clang-10 llvm-10 nasm ninja-build \
+libcap-dev libglfw3-dev libepoxy-dev python3-dev \
+python3 linux-headers-generic

-RUN git clone --recurse-submodules https://github.com/FEX-Emu/FEX.git
+COPY . /opt/FEX

 CMD [ "mkdir /opt/FEX/build" ]

@@ -1,336 +0,0 @@
-#!/usr/bin/env python3
-#
-# ====- code-format-helper, runs code formatters from the ci or in a hook --*- python -*--==#
-#
-# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-# See https://llvm.org/LICENSE.txt for license information.
-# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-#
-# ==--------------------------------------------------------------------------------------==#
-
-import argparse
-import os
-import subprocess
-import sys
-from typing import List, Optional
-
-"""
-This script is run by GitHub actions to ensure that the code in PR's conform to
-the coding style of LLVM. It can also be installed as a pre-commit git hook to
-check the coding style before submitting it. The canonical source of this script
-is in the LLVM source tree under llvm/utils/git.
-
-For C/C++ code it uses clang-format.
-
-You can learn more about the LLVM coding style on llvm.org:
-https://llvm.org/docs/CodingStandards.html
-
-You can install this script as a git hook by symlinking it to the .git/hooks
-directory:
-
-ln -s $(pwd)/llvm/utils/git/code-format-helper.py .git/hooks/pre-commit
-
-You can control the exact path to clang-format with the following
-environment variable: $CLANG_FORMAT_PATH.
-"""
-
-
-class FormatArgs:
-    start_rev: str = None
-    end_rev: str = None
-    repo: str = None
-    changed_files: List[str] = []
-    token: str = None
-    verbose: bool = True
-    issue_number: int = 0
-    write_comment_to_file: str = None
-
-    def __init__(self, args: argparse.Namespace = None) -> None:
-        if not args is None:
-            self.start_rev = args.start_rev
-            self.end_rev = args.end_rev
-            self.repo = args.repo
-            self.token = args.token
-            self.changed_files = args.changed_files
-            self.issue_number = args.issue_number
-            self.write_comment_to_file = args.write_comment_to_file
-
-
-class FormatHelper:
-    COMMENT_TAG = "<!--CODE FORMAT COMMENT: {fmt}-->"
-    name: str
-    friendly_name: str
-    comment: dict = None
-
-    @property
-    def comment_tag(self) -> str:
-        return self.COMMENT_TAG.replace("fmt", self.name)
-
-    @property
-    def instructions(self) -> str:
-        raise NotImplementedError()
-
-    def has_tool(self) -> bool:
-        raise NotImplementedError()
-
-    def format_run(self, changed_files: List[str], args: FormatArgs) -> Optional[str]:
-        raise NotImplementedError()
-
-    def pr_comment_text_for_diff(self, diff: str) -> str:
-        return f"""
-:warning: {self.friendly_name}, {self.name} found issues in your code. :warning:
-
-<details>
-<summary>
-You can test this locally with the following command:
-</summary>
-
-``````````bash
-{self.instructions}
-``````````
-
-</details>
-
-<details>
-<summary>
-View the diff from {self.name} here.
-</summary>
-
-``````````diff
-{diff}
-``````````
-
-</details>
-"""
-
-    # TODO: any type should be replaced with the correct github type, but it requires refactoring to
-    # not require the github module to be installed everywhere.
-    def find_comment(self, pr: any) -> any:
-        for comment in pr.as_issue().get_comments():
-            if self.comment_tag in comment.body:
-                return comment
-        return None
-
-    def update_pr(self, comment_text: str, args: FormatArgs, create_new: bool) -> None:
-        import github
-        from github import IssueComment, PullRequest
-
-        repo = github.Github(args.token).get_repo(args.repo)
-        pr = repo.get_issue(args.issue_number).as_pull_request()
-
-        comment_text = self.comment_tag + "\n\n" + comment_text
-
-        existing_comment = self.find_comment(pr)
-
-        if args.write_comment_to_file:
-            if create_new or existing_comment:
-                self.comment = {"body": comment_text}
-            if existing_comment:
-                self.comment["id"] = existing_comment.id
-            return
-
-        if existing_comment:
-            existing_comment.edit(comment_text)
-        elif create_new:
-            pr.as_issue().create_comment(comment_text)
-
-    def run(self, changed_files: List[str], args: FormatArgs) -> bool:
-        changed_files = [arg for arg in changed_files if "third-party" not in arg]
-        diff = self.format_run(changed_files, args)
-        should_update_gh = args.token is not None and args.repo is not None
-
-        if diff is None:
-            if should_update_gh:
-                comment_text = (
-                    ":white_check_mark: With the latest revision "
-                    f"this PR passed the {self.friendly_name}."
-                )
-                self.update_pr(comment_text, args, create_new=False)
-            return True
-        elif len(diff) > 0:
-            if should_update_gh:
-                comment_text = self.pr_comment_text_for_diff(diff)
-                self.update_pr(comment_text, args, create_new=True)
-            else:
-                print(
-                    f"Warning: {self.friendly_name}, {self.name} detected "
-                    "some issues with your code formatting..."
-                )
-            return False
-        else:
-            # The formatter failed but didn't output a diff (e.g. some sort of
-            # infrastructure failure).
-            comment_text = (
-                f":warning: The {self.friendly_name} failed without printing "
-                "a diff. Check the logs for stderr output. :warning:"
-            )
-            self.update_pr(comment_text, args, create_new=False)
-            return False
-
-
-class ClangFormatHelper(FormatHelper):
-    name = "clang-format"
-    friendly_name = "C/C++ code formatter"
-
-    @property
-    def cformat_wrapper_path(self) -> str:
-        relpath = "../../Scripts/clang-format.py"
-        curpath = os.path.dirname(os.path.abspath(__file__))
-        return os.path.abspath(os.path.normpath(os.path.join(curpath, relpath)))
-
-    @property
-    def instructions(self) -> str:
-        return " ".join(self.cf_cmd)
-
-    def should_include_extensionless_file(self, path: str) -> bool:
-        return path.startswith("libcxx/include")
-
-    def filter_changed_files(self, changed_files: List[str]) -> List[str]:
-        filtered_files = []
-        for path in changed_files:
-            _, ext = os.path.splitext(path)
-            if ext in (".cpp", ".c", ".h", ".hpp", ".hxx", ".cxx", ".inc", ".cppm"):
-                filtered_files.append(path)
-            elif ext == "" and self.should_include_extensionless_file(path):
-                filtered_files.append(path)
-        return filtered_files
-
-    @property
-    def clang_fmt_path(self) -> str:
-        if "CLANG_FORMAT_PATH" in os.environ:
-            return os.environ["CLANG_FORMAT_PATH"]
-        return "git-clang-format"
-
-    def has_tool(self) -> bool:
-        cmd = [self.clang_fmt_path, "-h"]
-        proc = None
-        try:
-            proc = subprocess.run(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-        except:
-            return False
-        return proc.returncode == 0
-
-    def format_run(self, changed_files: List[str], args: FormatArgs) -> Optional[str]:
-        cpp_files = self.filter_changed_files(changed_files)
-        if not cpp_files:
-            return None
-
-        cf_cmd = [
-            self.clang_fmt_path,
-            f"--binary={self.cformat_wrapper_path}",
-            "--diff",
-        ]
-
-        if args.start_rev and args.end_rev:
-            cf_cmd.append(args.start_rev)
-            cf_cmd.append(args.end_rev)
-
-        cf_cmd.append("--")
-        cf_cmd += cpp_files
-
-        if args.verbose:
-            print(f"Running: {' '.join(cf_cmd)}")
-        self.cf_cmd = cf_cmd
-        proc = subprocess.run(cf_cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-        sys.stdout.write(proc.stderr.decode("utf-8"))
-
-        if proc.returncode != 0:
-            # formatting needed, or the command otherwise failed
-            if args.verbose:
-                print(f"error: {self.name} exited with code {proc.returncode}")
-                # Print the diff in the log so that it is viewable there
-                print(proc.stdout.decode("utf-8"))
-            return proc.stdout.decode("utf-8")
-        else:
-            return None
-
-ALL_FORMATTERS = [ClangFormatHelper()]
-
-def hook_main():
-    # fill out args
-    args = FormatArgs()
-    args.verbose = False
-
-    # find the changed files
-    cmd = ["git", "diff", "--cached", "--name-only", "--diff-filter=d"]
-    proc = subprocess.run(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-    output = proc.stdout.decode("utf-8")
-    for line in output.splitlines():
-        args.changed_files.append(line)
-
-    failed_fmts = []
-    for fmt in ALL_FORMATTERS:
-        if fmt.has_tool():
-            if not fmt.run(args.changed_files, args):
-                failed_fmts.append(fmt.name)
-            if fmt.comment:
-                comments.append(fmt.comment)
-        else:
-            print(f"Couldn't find {fmt.name}, can't check " + fmt.friendly_name.lower())
-
-    if len(failed_fmts) > 0:
-        sys.exit(1)
-
-    sys.exit(0)
-
-
-if __name__ == "__main__":
-    script_path = os.path.abspath(__file__)
-    if ".git/hooks" in script_path:
-        hook_main()
-        sys.exit(0)
-
-    parser = argparse.ArgumentParser()
-    parser.add_argument(
-        "--token", type=str, required=False, help="GitHub authentication token"
-    )
-    parser.add_argument(
-        "--repo",
-        type=str,
-        default=os.getenv("GITHUB_REPOSITORY", "llvm/llvm-project"),
-        help="The GitHub repository that we are working with in the form of <owner>/<repo> (e.g. llvm/llvm-project)",
-    )
-    parser.add_argument("--issue-number", type=int, required=True)
-    parser.add_argument(
-        "--start-rev",
-        type=str,
-        required=True,
-        help="Compute changes from this revision.",
-    )
-    parser.add_argument(
-        "--end-rev", type=str, required=True, help="Compute changes to this revision"
-    )
-    parser.add_argument(
-        "--changed-files",
-        type=str,
-        help="Comma separated list of files that has been changed",
-    )
-    parser.add_argument(
-        "--write-comment-to-file",
-        type=str,
-        help="Don't post comments on the PR, instead write the comments and metadata a file",
-    )
-
-    args = FormatArgs(parser.parse_args())
-
-    changed_files = []
-    if args.changed_files:
-        changed_files = args.changed_files.split(",")
-
-    failed_formatters = []
-    comments = []
-    for fmt in ALL_FORMATTERS:
-        if not fmt.run(changed_files, args):
-            failed_formatters.append(fmt.name)
-        if fmt.comment:
-            comments.append(fmt.comment)
-
-    if len(comments):
-        with open(args.write_comment_to_file, "w") as f:
-            import json
-
-            json.dump(comments, f)
-
-    if len(failed_formatters) > 0:
-        print(f"error: some formatters failed: {' '.join(failed_formatters)}")
-        sys.exit(1)
@@ -1,52 +0,0 @@
-#
-# This file is autogenerated by pip-compile with Python 3.11
-# by the following command:
-#
-#    pip-compile --output-file=llvm/utils/git/requirements_formatting.txt llvm/utils/git/requirements_formatting.txt.in
-#
-black==23.9.1
-    # via
-    #   -r llvm/utils/git/requirements_formatting.txt.in
-    #   darker
-certifi==2023.7.22
-    # via requests
-cffi==1.15.1
-    # via
-    #   cryptography
-    #   pynacl
-charset-normalizer==3.2.0
-    # via requests
-click==8.1.7
-    # via black
-cryptography==41.0.3
-    # via pyjwt
-darker==1.7.2
-    # via -r llvm/utils/git/requirements_formatting.txt.in
-deprecated==1.2.14
-    # via pygithub
-idna==3.4
-    # via requests
-mypy-extensions==1.0.0
-    # via black
-packaging==23.1
-    # via black
-pathspec==0.11.2
-    # via black
-platformdirs==3.10.0
-    # via black
-pycparser==2.21
-    # via cffi
-pygithub==1.59.1
-    # via -r llvm/utils/git/requirements_formatting.txt.in
-pyjwt[crypto]==2.8.0
-    # via pygithub
-pynacl==1.5.0
-    # via pygithub
-requests==2.31.0
-    # via pygithub
-toml==0.10.2
-    # via darker
-urllib3==2.0.4
-    # via requests
-wrapt==1.15.0
-    # via deprecated
@@ -1,3 +0,0 @@
-set(NAME tiny-json)
-set(SRCS tiny-json.c)
-add_library(${NAME} ${SRCS})
@@ -1,21 +0,0 @@
-MIT License
-
-Copyright (c) 2018 Rafa Garcia
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.
@@ -1,647 +0,0 @@
-
-/*
-
-<https://github.com/rafagafe/tiny-json>
-     
-  Licensed under the MIT License <http://opensource.org/licenses/MIT>.
-  SPDX-License-Identifier: MIT
-  Copyright (c) 2016-2018 Rafa Garcia <rafagarcia77@gmail.com>.
-
-  Permission is hereby  granted, free of charge, to any  person obtaining a copy
-  of this software and associated  documentation files (the "Software"), to deal
-  in the Software  without restriction, including without  limitation the rights
-  to  use, copy,  modify, merge,  publish, distribute,  sublicense, and/or  sell
-  copies  of  the Software,  and  to  permit persons  to  whom  the Software  is
-  furnished to do so, subject to the following conditions:
-
-  The above copyright notice and this permission notice shall be included in all
-  copies or substantial portions of the Software.
-
-  THE SOFTWARE  IS PROVIDED "AS  IS", WITHOUT WARRANTY  OF ANY KIND,  EXPRESS OR
-  IMPLIED,  INCLUDING BUT  NOT  LIMITED TO  THE  WARRANTIES OF  MERCHANTABILITY,
-  FITNESS FOR  A PARTICULAR PURPOSE AND  NONINFRINGEMENT. IN NO EVENT  SHALL THE
-  AUTHORS  OR COPYRIGHT  HOLDERS  BE  LIABLE FOR  ANY  CLAIM,  DAMAGES OR  OTHER
-  LIABILITY, WHETHER IN AN ACTION OF  CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-  OUT OF OR IN CONNECTION WITH THE SOFTWARE  OR THE USE OR OTHER DEALINGS IN THE
-  SOFTWARE.
-    
-*/
-
-#include <stdio.h>
-#include <string.h>
-#include <ctype.h>
-#include <stddef.h> // For NULL
-#include "tiny-json.h"
-
-/** Structure to handle a heap of JSON properties. */
-typedef struct jsonStaticPool_s {
-    json_t* const mem;      /**< Pointer to array of json properties.      */
-    unsigned int const qty; /**< Length of the array of json properties.   */
-    unsigned int nextFree;  /**< The index of the next free json property. */
-    jsonPool_t pool;
-} jsonStaticPool_t;
-
-/* Search a property by its name in a JSON object. */
-json_t const* json_getProperty( json_t const* obj, char const* property ) {
-    json_t const* sibling;
-    for( sibling = obj->u.c.child; sibling; sibling = sibling->sibling )
-        if ( sibling->name && !strcmp( sibling->name, property ) )
-            return sibling;
-    return 0;
-}
-
-/* Search a property by its name in a JSON object and return its value. */
-char const* json_getPropertyValue( json_t const* obj, char const* property ) {
-	json_t const* field = json_getProperty( obj, property );
-	if ( !field ) return 0;
-        jsonType_t type = json_getType( field );
-        if ( JSON_ARRAY >= type ) return 0;
-	return json_getValue( field );
-}
-
-/* Internal prototypes: */
-static char* goBlank( char* str );
-static char* goNum( char* str );
-static json_t* poolInit( jsonPool_t* pool );
-static json_t* poolAlloc( jsonPool_t* pool );
-static char* objValue( char* ptr, json_t* obj, jsonPool_t* pool );
-static char* setToNull( char* ch );
-static bool isEndOfPrimitive( char ch );
-
-/* Parse a string to get a json. */
-json_t const* json_createWithPool( char *str, jsonPool_t *pool ) {
-    char* ptr = goBlank( str );
-    if ( !ptr || *ptr != '{' ) return 0;
-    json_t* obj = pool->init( pool );
-    obj->name    = 0;
-    obj->sibling = 0;
-    obj->u.c.child = 0;
-    ptr = objValue( ptr, obj, pool );
-    if ( !ptr ) return 0;
-    return obj;
-}
-
-/* Parse a string to get a json. */
-json_t const* json_create( char* str, json_t mem[], unsigned int qty ) {
-    jsonStaticPool_t spool = {
-        .mem  = mem,
-        .qty  = qty,
-        .pool = {
-            .init = poolInit,
-            .alloc = poolAlloc
-        }
-    };
-    return json_createWithPool( str, &spool.pool );
-}
-
-/** Get a special character with its escape character. Examples:
-  * 'b' -> '\b', 'n' -> '\n', 't' -> '\t'
-  * @param ch The escape character.
-  * @return  The character code. */
-static char getEscape( char ch ) {
-    static struct { char ch; char code; } const pair[] = {
-        { '\"', '\"' }, { '\\', '\\' },
-        { '/',  '/'  }, { 'b',  '\b' },
-        { 'f',  '\f' }, { 'n',  '\n' },
-        { 'r',  '\r' }, { 't',  '\t' },
-    };
-    unsigned int i;
-    for( i = 0; i < sizeof pair / sizeof *pair; ++i )
-        if ( pair[i].ch == ch )
-            return pair[i].code;
-    return '\0';
-}
-
-/** Parse 4 characters.
-  * @Param str Pointer to  first digit.
-  * @retval '?' If the four characters are hexadecimal digits.
-  * @retcal '\0' In other cases. */
-static unsigned char getCharFromUnicode( unsigned char const* str ) {
-    unsigned int i;
-    for( i = 0; i < 4; ++i )
-        if ( !isxdigit( str[i] ) )
-            return '\0';
-    return '?';
-}
-
-/** Parse a string and replace the scape characters by their meaning characters.
-  * This parser stops when finds the character '\"'. Then replaces '\"' by '\0'.
-  * @param str Pointer to first character.
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* parseString( char* str ) {
-    unsigned char* head = (unsigned char*)str;
-    unsigned char* tail = (unsigned char*)str;
-    for( ; *head >= ' '; ++head, ++tail ) {
-        if ( *head == '\"' ) {
-            *tail = '\0';
-            return (char*)++head;
-        }
-        if ( *head == '\\' ) {
-            if ( *++head == 'u' ) {
-                char const ch = getCharFromUnicode( ++head );
-                if ( ch == '\0' ) return 0;
-                *tail = ch;
-                head += 3;
-            }
-            else {
-                char const esc = getEscape( *head );
-                if ( esc == '\0' ) return 0;
-                *tail = esc;
-            }
-        }
-        else *tail = *head;
-    }
-    return 0;
-}
-
-/** Parse a string to get the name of a property.
-  * @param str Pointer to first character.
-  * @param property The property to assign the name.
-  * @retval Pointer to first of property value. If success.
-  * @retval Null pointer if any error occur. */
-static char* propertyName( char* ptr, json_t* property ) {
-    property->name = ++ptr;
-    ptr = parseString( ptr );
-    if ( !ptr ) return 0;
-    ptr = goBlank( ptr );
-    if ( !ptr ) return 0;
-    if ( *ptr++ != ':' ) return 0;
-    return goBlank( ptr );
-}
-
-/** Parse a string to get the value of a property when its type is JSON_TEXT.
-  * @param str Pointer to first character ('\"').
-  * @param property The property to assign the name.
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* textValue( char* ptr, json_t* property ) {
-    ++property->u.value;
-    ptr = parseString( ++ptr );
-    if ( !ptr ) return 0;
-    property->type = JSON_TEXT;
-    return ptr;
-}
-
-/** Compare two strings until get the null character in the second one.
-  * @param ptr sub string
-  * @param str main string
-  * @retval Pointer to next character.
-  * @retval Null pointer if any error occur. */
-static char* checkStr( char* ptr, char const* str ) {
-    while( *str )
-        if ( *ptr++ != *str++ )
-            return 0;
-    return ptr;
-}
-
-/** Parser a string to get a primitive value.
-  * If the first character after the value is different of '}' or ']' is set to '\0'.
-  * @param str Pointer to first character.
-  * @param property Property handler to set the value and the type, (true, false or null).
-  * @param value String with the primitive literal.
-  * @param type The code of the type. ( JSON_BOOLEAN or JSON_NULL )
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* primitiveValue( char* ptr, json_t* property, char const* value, jsonType_t type ) {
-    ptr = checkStr( ptr, value );
-    if ( !ptr || !isEndOfPrimitive( *ptr ) ) return 0;
-    ptr = setToNull( ptr );
-    property->type = type;
-    return ptr;
-}
-
-/** Parser a string to get a true value.
-  * If the first character after the value is different of '}' or ']' is set to '\0'.
-  * @param str Pointer to first character.
-  * @param property Property handler to set the value and the type, (true, false or null).
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* trueValue( char* ptr, json_t* property ) {
-    return primitiveValue( ptr, property, "true", JSON_BOOLEAN );
-}
-
-/** Parser a string to get a false value.
-  * If the first character after the value is different of '}' or ']' is set to '\0'.
-  * @param str Pointer to first character.
-  * @param property Property handler to set the value and the type, (true, false or null).
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* falseValue( char* ptr, json_t* property ) {
-    return primitiveValue( ptr, property, "false", JSON_BOOLEAN );
-}
-
-/** Parser a string to get a null value.
-  * If the first character after the value is different of '}' or ']' is set to '\0'.
-  * @param str Pointer to first character.
-  * @param property Property handler to set the value and the type, (true, false or null).
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* nullValue( char* ptr, json_t* property ) {
-    return primitiveValue( ptr, property, "null", JSON_NULL );
-}
-
-/** Analyze the exponential part of a real number.
-  * @param str Pointer to first character.
-  * @retval Pointer to first non numerical after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* expValue( char* ptr ) {
-    if ( *ptr == '-' || *ptr == '+' ) ++ptr;
-    if ( !isdigit( *ptr ) ) return 0;
-    ptr = goNum( ++ptr );
-    return ptr;
-}
-
-/** Analyze the decimal part of a real number.
-  * @param str Pointer to first character.
-  * @retval Pointer to first non numerical after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* fraqValue( char* ptr ) {
-    if ( !isdigit( *ptr ) ) return 0;
-    ptr = goNum( ++ptr );
-    if ( !ptr ) return 0;
-    return ptr;
-}
-
-/** Parser a string to get a numerical value.
-  * If the first character after the value is different of '}' or ']' is set to '\0'.
-  * @param str Pointer to first character.
-  * @param property Property handler to set the value and the type: JSON_REAL or JSON_INTEGER.
-  * @retval Pointer to first non white space after the string. If success.
-  * @retval Null pointer if any error occur. */
-static char* numValue( char* ptr, json_t* property ) {
-    if ( *ptr == '-' ) ++ptr;
-    if ( !isdigit( *ptr ) ) return 0;
-    if ( *ptr != '0' ) {
-        ptr = goNum( ptr );
-        if ( !ptr ) return 0;
-    }
-    else if ( isdigit( *++ptr ) ) return 0;
-    property->type = JSON_INTEGER;
-    if ( *ptr == '.' ) {
-        ptr = fraqValue( ++ptr );
-        if ( !ptr ) return 0;
-        property->type = JSON_REAL;
-    }
-    if ( *ptr == 'e' || *ptr == 'E' ) {
-        ptr = expValue( ++ptr );
-        if ( !ptr ) return 0;
-        property->type = JSON_REAL;
-    }
-    if ( !isEndOfPrimitive( *ptr ) ) return 0;
-    if ( JSON_INTEGER == property->type ) {
-        char const* value = property->u.value;
-        bool const negative = *value == '-';
-        static char const min[] = "-9223372036854775808";
-        static char const max[] = "9223372036854775807";
-        unsigned int const maxdigits = ( negative? sizeof min: sizeof max ) - 1;
-        unsigned int const len = ptr - value;
-        if ( len > maxdigits ) return 0;
-        if ( len == maxdigits ) {
-            char const tmp = *ptr;
-            *ptr = '\0';
-            char const* const threshold = negative ? min: max;
-            if ( 0 > strcmp( threshold, value ) ) return 0;
-            *ptr = tmp;
-        }
-    }
-    ptr = setToNull( ptr );
-    return ptr;
-}
-
-/** Add a property to a JSON object or array.
-  * @param obj The handler of the JSON object or array.
-  * @param property The handler of the property to be added. */
-static void add( json_t* obj, json_t* property ) {
-    property->sibling = 0;
-    if ( !obj->u.c.child ){
-	    obj->u.c.child = property;
-	    obj->u.c.last_child = property;
-    } else {
-	    obj->u.c.last_child->sibling = property;
-	    obj->u.c.last_child = property;
-    }
-}
-
-/** Parser a string to get a json object value.
-  * @param str Pointer to first character.
-  * @param pool The handler of a json pool for creating json instances.
-  * @retval Pointer to first character after the value. If success.
-  * @retval Null pointer if any error occur. */
-static char* objValue( char* ptr, json_t* obj, jsonPool_t* pool ) {
-    obj->type    = JSON_OBJ;
-    obj->u.c.child = 0;
-    obj->sibling = 0;
-    ptr++;
-    for(;;) {
-        ptr = goBlank( ptr );
-        if ( !ptr ) return 0;
-        if ( *ptr == ',' ) {
-            ++ptr;
-            continue;
-        }
-        char const endchar = ( obj->type == JSON_OBJ )? '}': ']';
-        if ( *ptr == endchar ) {
-            *ptr = '\0';
-            json_t* parentObj = obj->sibling;
-            if ( !parentObj ) return ++ptr;
-            obj->sibling = 0;
-            obj = parentObj;
-            ++ptr;
-            continue;
-        }
-        json_t* property = pool->alloc( pool );
-        if ( !property ) return 0;
-        if( obj->type != JSON_ARRAY ) {
-            if ( *ptr != '\"' ) return 0;
-            ptr = propertyName( ptr, property );
-            if ( !ptr ) return 0;
-        }
-        else property->name = 0;
-        add( obj, property );
-        property->u.value = ptr;
-        switch( *ptr ) {
-            case '{':
-                property->type    = JSON_OBJ;
-                property->u.c.child = 0;
-                property->sibling = obj;
-                obj = property;
-                ++ptr;
-                break;
-            case '[':
-                property->type    = JSON_ARRAY;
-                property->u.c.child = 0;
-                property->sibling = obj;
-                obj = property;
-                ++ptr;
-                break;
-            case '\"': ptr = textValue( ptr, property );  break;
-            case 't':  ptr = trueValue( ptr, property );  break;
-            case 'f':  ptr = falseValue( ptr, property ); break;
-            case 'n':  ptr = nullValue( ptr, property );  break;
-            default:   ptr = numValue( ptr, property );   break;
-        }
-        if ( !ptr ) return 0;
-    }
-}
-
-/** Initialize a json pool.
-  * @param pool The handler of the pool.
-  * @return a instance of a json. */
-static json_t* poolInit( jsonPool_t* pool ) {
-    jsonStaticPool_t *spool = json_containerOf( pool, jsonStaticPool_t, pool );
-    spool->nextFree = 1;
-    return spool->mem;
-}
-
-/** Create an instance of a json from a pool.
-  * @param pool The handler of the pool.
-  * @retval The handler of the new instance if success.
-  * @retval Null pointer if the pool was empty. */
-static json_t* poolAlloc( jsonPool_t* pool ) {
-    jsonStaticPool_t *spool = json_containerOf( pool, jsonStaticPool_t, pool );
-    if ( spool->nextFree >= spool->qty ) return 0;
-    return spool->mem + spool->nextFree++;
-}
-
-/** Checks whether an character belongs to set.
-  * @param ch Character value to be checked.
-  * @param set Set of characters. It is just a null-terminated string.
-  * @return true or false there is membership or not. */
-static bool isOneOfThem( char ch, char const* set ) {
-    while( *set != '\0' )
-        if ( ch == *set++ )
-            return true;
-    return false;
-}
-
-/** Increases a pointer while it points to a character that belongs to a set.
-  * @param str The initial pointer value.
-  * @param set Set of characters. It is just a null-terminated string.
-  * @return The final pointer value or null pointer if the null character was found. */
-static char* goWhile( char* str, char const* set ) {
-    for(; *str != '\0'; ++str ) {
-        if ( !isOneOfThem( *str, set ) )
-            return str;
-    }
-    return 0;
-}
-
-/** Set of characters that defines a blank. */
-static char const* const blank = " \n\r\t\f";
-
-/** Increases a pointer while it points to a white space character.
-  * @param str The initial pointer value.
-  * @return The final pointer value or null pointer if the null character was found. */
-static char* goBlank( char* str ) {
-    return goWhile( str, blank );
-}
-
-/** Increases a pointer while it points to a decimal digit character.
-  * @param str The initial pointer value.
-  * @return The final pointer value or null pointer if the null character was found. */
-static char* goNum( char* str ) {
-    for( ; *str != '\0'; ++str ) {
-        if ( !isdigit( *str ) )
-            return str;
-    }
-    return 0;
-}
-
-/** Set of characters that defines the end of an array or a JSON object. */
-static char const* const endofblock = "}]";
-
-/** Set a char to '\0' and increase its pointer if the char is different to '}' or ']'.
-  * @param ch Pointer to character.
-  * @return  Final value pointer. */
-static char* setToNull( char* ch ) {
-    if ( !isOneOfThem( *ch, endofblock ) ) *ch++ = '\0';
-    return ch;
-}
-
-/** Indicate if a character is the end of a primitive value. */
-static bool isEndOfPrimitive( char ch ) {
-    return ch == ',' || isOneOfThem( ch, blank ) || isOneOfThem( ch, endofblock );
-}
-
-/** Add a character at the end of a string.
-  * @param dest Pointer to the null character of the string
-  * @param ch Value to be added.
-  * @return Pointer to the null character of the destination string. */
-static char* chtoa( char* dest, char ch ) {
-    *dest   = ch;
-    *++dest = '\0';
-    return dest;
-}
-
-/** Copy a null-terminated string.
-  * @param dest Destination memory block.
-  * @param src Source string.
-  * @return Pointer to the null character of the destination string. */
-static char* atoa( char* dest, char const* src ) {
-    for( ; *src != '\0'; ++dest, ++src )
-        *dest = *src;
-    *dest = '\0';
-    return dest;
-}
-
-/* Open a JSON object in a JSON string. */
-char* json_objOpen( char* dest, char const* name ) {
-    if ( NULL == name )
-        dest = chtoa( dest, '{' );
-    else {
-        dest = chtoa( dest, '\"' );
-        dest = atoa( dest, name );
-        dest = atoa( dest, "\":{" );
-    }
-    return dest;
-}
-
-/* Close a JSON object in a JSON string. */
-char* json_objClose( char* dest ) {
-    if ( dest[-1] == ',' )
-        --dest;
-    return atoa( dest, "}," );
-}
-
-/* Open an array in a JSON string. */
-char* json_arrOpen( char* dest, char const* name ) {
-    if ( NULL == name )
-        dest = chtoa( dest, '[' );
-    else {
-        dest = chtoa( dest, '\"' );
-        dest = atoa( dest, name );
-        dest = atoa( dest, "\":[" );
-    }
-    return dest;
-}
-
-/* Close an array in a JSON string. */
-char* json_arrClose( char* dest ) {
-    if ( dest[-1] == ',' )
-        --dest;
-    return atoa( dest, "]," );
-}
-
-/** Add the name of a text property.
-  * @param dest Destination memory.
-  * @param name The name of the property.
-  * @return Pointer to the next char. */
-static char* strname( char* dest, char const* name ) {
-    dest = chtoa( dest, '\"' );
-    if ( NULL != name ) {
-        dest = atoa( dest, name );
-        dest = atoa( dest, "\":\"" );
-    }
-    return dest;
-}
-
-/** Get the hexadecimal digit of the least significant nibble of a integer. */
-static int nibbletoch( int nibble ) {
-    return "0123456789ABCDEF"[ nibble % 16u ];
-}
-
-/** Get the escape character of a non-printable.
-  * @param ch Character source.
-  * @return The escape character or null character if error. */
-static int escape( int ch ) {
-    static struct { char code; char ch; } const pair[] = {
-        { '\"', '\"' }, { '\\', '\\' }, { '/',  '/'  }, { 'b',  '\b' },
-        { 'f',  '\f' }, { 'n',  '\n' }, { 'r',  '\r' }, { 't',  '\t' },
-    };
-    for( int i = 0; i < sizeof pair / sizeof *pair; ++i )
-        if ( ch == pair[i].ch )
-            return pair[i].code;
-    return '\0';
-}
-
-/** Copy a null-terminated string inserting escape characters if needed.
-  * @param dest Destination memory block.
-  * @param src Source string.
-  * @return Pointer to the null character of the destination string. */
-static char* atoesc( char* dest, char const* src ) {
-    for( ; *src != '\0'; ++dest, ++src ) {
-        if ( *src >= ' ' && *src != '\"' && *src != '\\' && *src != '/' )
-            *dest = *src;
-        else {
-            *dest++ = '\\';
-            int const esc = escape( *src );
-            if ( esc )
-                *dest = esc;
-            else {
-                *dest++ = 'u';
-                *dest++ = '0';
-                *dest++ = '0';
-                *dest++ = nibbletoch( *src / 16 );
-                *dest++ = nibbletoch( *src );
-            }
-        }
-    }
-    *dest = '\0';
-    return dest;
-}
-
-/* Add a text property in a JSON string. */
-char* json_str( char* dest, char const* name, char const* value ) {
-    dest = strname( dest, name );
-    dest = atoesc( dest, value );
-    dest = atoa( dest, "\"," );
-    return dest;
-}
-
-/** Add the name of a primitive property.
-  * @param dest Destination memory.
-  * @param name The name of the property.
-  * @return Pointer to the next char. */
-static char* primitivename( char* dest, char const* name ) {
-    if( NULL == name )
-        return dest;
-    dest = chtoa( dest, '\"' );
-    dest = atoa( dest, name );
-    dest = atoa( dest, "\":" );
-    return dest;
-}
-
-/*  Add a boolean property in a JSON string. */
-char* json_bool( char* dest, char const* name, int value ) {
-    dest = primitivename( dest, name );
-    dest = atoa( dest, value ? "true," : "false," );
-    return dest;
-}
-
-/* Add a null property in a JSON string. */
-char* json_null( char* dest, char const* name ) {
-    dest = primitivename( dest, name );
-    dest = atoa( dest, "null," );
-    return dest;
-}
-
-/* Used to finish the root JSON object. After call json_objClose(). */
-char* json_end( char* dest ) {
-    if ( ',' == dest[-1] ) {
-        dest[-1] = '\0';
-        --dest;
-    }
-    return dest;
-}
-
-#define ALL_TYPES \
-    X( json_int,      int,           "%d"   ) \
-    X( json_long,     long,          "%ld"  ) \
-    X( json_uint,     unsigned int,  "%u"   ) \
-    X( json_ulong,    unsigned long, "%lu"  ) \
-    X( json_verylong, long long,     "%lld" ) \
-    X( json_double,   double,        "%g"   ) \
-
-
-#define json_num( funcname, type, fmt )                         \
-char* funcname( char* dest, char const* name, type value ) {    \
-    dest = primitivename( dest, name );                         \
-    dest += sprintf( dest, fmt, value );                        \
-    dest = chtoa( dest, ',' );                                  \
-    return dest;                                                \
-}
-
-#define X( name, type, fmt ) json_num( name, type, fmt )
-ALL_TYPES
-#undef X
@@ -1,270 +0,0 @@
-
-/*
-
-<https://github.com/rafagafe/tiny-json>
-     
-  Licensed under the MIT License <http://opensource.org/licenses/MIT>.
-  SPDX-License-Identifier: MIT
-  Copyright (c) 2016-2018 Rafa Garcia <rafagarcia77@gmail.com>.
-
-  Permission is hereby  granted, free of charge, to any  person obtaining a copy
-  of this software and associated  documentation files (the "Software"), to deal
-  in the Software  without restriction, including without  limitation the rights
-  to  use, copy,  modify, merge,  publish, distribute,  sublicense, and/or  sell
-  copies  of  the Software,  and  to  permit persons  to  whom  the Software  is
-  furnished to do so, subject to the following conditions:
-
-  The above copyright notice and this permission notice shall be included in all
-  copies or substantial portions of the Software.
-
-  THE SOFTWARE  IS PROVIDED "AS  IS", WITHOUT WARRANTY  OF ANY KIND,  EXPRESS OR
-  IMPLIED,  INCLUDING BUT  NOT  LIMITED TO  THE  WARRANTIES OF  MERCHANTABILITY,
-  FITNESS FOR  A PARTICULAR PURPOSE AND  NONINFRINGEMENT. IN NO EVENT  SHALL THE
-  AUTHORS  OR COPYRIGHT  HOLDERS  BE  LIABLE FOR  ANY  CLAIM,  DAMAGES OR  OTHER
-  LIABILITY, WHETHER IN AN ACTION OF  CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-  OUT OF OR IN CONNECTION WITH THE SOFTWARE  OR THE USE OR OTHER DEALINGS IN THE
-  SOFTWARE.
-    
-*/
-
-#ifndef _TINY_JSON_H_
-#define	_TINY_JSON_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stddef.h>
-#include <stdlib.h>
-#include <stdbool.h>
-#include <stdint.h>
-
-#define json_containerOf( ptr, type, member ) \
-    ((type*)( (char*)ptr - offsetof( type, member ) ))
-
-/** @defgroup tinyJson Tiny JSON parser.
-  * @{ */
-
-/** Enumeration of codes of supported JSON properties types. */
-typedef enum {
-    JSON_OBJ, JSON_ARRAY, JSON_TEXT, JSON_BOOLEAN,
-    JSON_INTEGER, JSON_REAL, JSON_NULL
-} jsonType_t;
-
-/** Structure to handle JSON properties. */
-typedef struct json_s {
-    struct json_s* sibling;
-    const char* name;
-    union {
-      const char* value;
-      struct {
-        struct json_s* child;
-        struct json_s* last_child;
-        } c;
-    } u;
-    jsonType_t type;
-} json_t;
-
-/** Parse a string to get a json.
-  * @param str String pointer with a JSON object. It will be modified.
-  * @param mem Array of json properties to allocate.
-  * @param qty Number of elements of mem.
-  * @retval Null pointer if any was wrong in the parse process.
-  * @retval If the parser process was successfully a valid handler of a json.
-  *         This property is always unnamed and its type is JSON_OBJ. */
-const json_t* json_create(char* str, json_t mem[], unsigned int qty);
-
-/** Get the name of a json property.
-  * @param json A valid handler of a json property.
-  * @retval Pointer to null-terminated if property has name.
-  * @retval Null pointer if the property is unnamed. */
-static inline const char* json_getName(const json_t* json) {
-    return json->name;
-}
-
-/** Get the value of a json property.
-  * The type of property cannot be JSON_OBJ or JSON_ARRAY.
-  * @param json A valid handler of a json property.
-  * @return Pointer to null-terminated string with the value. */
-static inline const char* json_getValue(const json_t* property) {
-    return property->u.value;
-}
-
-/** Get the type of a json property.
-  * @param json A valid handler of a json property.
-  * @return The code of type.*/
-static inline jsonType_t json_getType(const json_t* json) {
-    return json->type;
-}
-
-/** Get the next sibling of a JSON property that is within a JSON object or array.
-  * @param json A valid handler of a json property.
-  * @retval The handler of the next sibling if found.
-  * @retval Null pointer if the json property is the last one. */
-static inline const json_t* json_getSibling(const json_t* json) {
-    return json->sibling;
-}
-
-/** Search a property by its name in a JSON object.
-  * @param obj A valid handler of a json object. Its type must be JSON_OBJ.
-  * @param property The name of property to get.
-  * @retval The handler of the json property if found.
-  * @retval Null pointer if not found. */
-const json_t* json_getProperty(const json_t* obj, const char* property);
-
-
-/** Search a property by its name in a JSON object and return its value.
-  * @param obj A valid handler of a json object. Its type must be JSON_OBJ.
-  * @param property The name of property to get.
-  * @retval If found a pointer to null-terminated string with the value.
-  * @retval Null pointer if not found or it is an array or an object. */
-const char* json_getPropertyValue(const json_t* obj, const char* property);
-
-/** Get the first property of a JSON object or array.
-  * @param json A valid handler of a json property.
-  *             Its type must be JSON_OBJ or JSON_ARRAY.
-  * @retval The handler of the first property if there is.
-  * @retval Null pointer if the json object has not properties. */
-static inline const json_t* json_getChild(const json_t* json) {
-    return json->u.c.child;
-}
-
-/** Get the value of a json boolean property.
-  * @param property A valid handler of a json object. Its type must be JSON_BOOLEAN.
-  * @return The value stdbool. */
-static inline bool json_getBoolean(const json_t* property) {
-    return *property->u.value == 't';
-}
-
-/** Get the value of a json integer property.
-  * @param property A valid handler of a json object. Its type must be JSON_INTEGER.
-  * @return The value stdint. */
-static inline int64_t json_getInteger(const json_t* property) {
-    return atoll( property->u.value );
-}
-
-/** Get the value of a json real property.
-  * @param property A valid handler of a json object. Its type must be JSON_REAL.
-  * @return The value. */
-static inline double json_getReal(const json_t* property) {
-    return atof( property->u.value );
-}
-
-
-/** Structure to handle a heap of JSON properties. */
-typedef struct jsonPool_s jsonPool_t;
-struct jsonPool_s {
-    json_t* (*init)( jsonPool_t* pool );
-    json_t* (*alloc)( jsonPool_t* pool );
-};
-
-/** Parse a string to get a json.
-  * @param str String pointer with a JSON object. It will be modified.
-  * @param pool Custom json pool pointer.
-  * @retval Null pointer if any was wrong in the parse process.
-  * @retval If the parser process was successfully a valid handler of a json.
-  *         This property is always unnamed and its type is JSON_OBJ. */
-const json_t* json_createWithPool(char* str, jsonPool_t* pool);
-
-/** @ } */
-
-/** @defgroup makejoson Make JSON.
- * @{ */
-
-/** Open a JSON object in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @return Pointer to the new end of JSON under construction. */
-char* json_objOpen(char* dest, const char* name);
-
-/** Close a JSON object in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @return Pointer to the new end of JSON under construction. */
-char* json_objClose(char* dest);
-
-/** Used to finish the root JSON object. After call json_objClose().
- * @param dest Pointer to the end of JSON under construction.
- * @return Pointer to the new end of JSON under construction. */
-char* json_end(char* dest);
-
-/** Open an array in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @return Pointer to the new end of JSON under construction. */
-char* json_arrOpen(char* dest, const char* name);
-
-/** Close an array in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @return Pointer to the new end of JSON under construction. */
-char* json_arrClose(char* dest);
-
-/** Add a text property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value A valid null-terminated string with the value.
- *              Backslash escapes will be added for special characters.
- * @return Pointer to the new end of JSON under construction. */
-char* json_str(char* dest, const char* name, const char* value);
-
-/** Add a boolean property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Zero for false. Non zero for true.
- * @return Pointer to the new end of JSON under construction. */
-char* json_bool(char* dest, const char* name, int value);
-
-/** Add a null property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @return Pointer to the new end of JSON under construction. */
-char* json_null(char* dest, const char* name);
-
-/** Add an integer property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_int(char* dest, const char* name, int value);
-
-/** Add an unsigned integer property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_uint(char* dest, const char* name, unsigned int value);
-
-/** Add a long integer property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_long(char* dest, const char* name, long int value);
-
-/** Add an unsigned long integer property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_ulong(char* dest, const char* name, unsigned long int value);
-
-/** Add a long long integer property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_verylong(char* dest, const char* name, long long int value);
-
-/** Add a double precision number property in a JSON string.
- * @param dest Pointer to the end of JSON under construction.
- * @param name Pointer to null-terminated string or null for unnamed.
- * @param value Value of the property.
- * @return Pointer to the new end of JSON under construction. */
-char* json_double(char* dest, const char* name, double value);
-
-/** @ } */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif	/* _TINY_JSON_H_ */
@@ -13,6 +13,8 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^aarch64|^arm64|^armv8\.*")
  set(_M_ARM_64 1)
 endif()

+option(ENABLE_CLANG_FORMAT "Run clang format over the source" FALSE)
+
 set(CMAKE_POSITION_INDEPENDENT_CODE ON)
 cmake_policy(SET CMP0083 NEW) # Follow new PIE policy
 include(CheckPIESupported)
@@ -24,6 +26,21 @@ include(CheckCXXCompilerFlag)
 include(CheckIncludeFileCXX)
 include(CheckCXXSourceCompiles)

+set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
+check_cxx_source_compiles(
+  "
+  __attribute__((preserve_all))
+  void Testy() {
+  }
+  int main() {
+  return 0;
+  }"
+  HAS_CLANG_PRESERVE_ALL)
+unset(CMAKE_REQUIRED_FLAGS)
+if (HAS_CLANG_PRESERVE_ALL)
+  message(STATUS "Has clang::preserve_all")
+endif ()
+
 if (EXISTS ${CMAKE_CURRENT_DIR}/External/vixl/)
    # Useful to have for freestanding libFEXCore
    add_subdirectory(External/vixl/)
@@ -148,8 +148,9 @@ def print_man_options(options):
            if (value_type == "strenum"):
                Enums = op_vals["Enums"]
                output_man.write("\\fBAvailable Options:\\fR\n")
-                output_man.write(", ".join(f"{enum_op_val}" for [_, enum_op_val] in Enums.items()))
-                output_man.write("\n.sp\n")
+                for enum_op_key, enum_op_vals in Enums.items():
+                    output_man.write("{}, ".format(enum_op_vals))
+                output_man.write("\n")

    output_man.write(".El\n")

@@ -178,8 +179,9 @@ def print_man_environment(options):
            if (value_type == "strenum"):
                Enums = op_vals["Enums"]
                output_man.write("\\fBAvailable Options:\\fR\n")
-                output_man.write(", ".join(f"{enum_op_val}" for [_, enum_op_val] in Enums.items()))
-                output_man.write("\n.sp\n")
+                for enum_op_key, enum_op_vals in Enums.items():
+                    output_man.write("{}, ".format(enum_op_vals))
+                output_man.write("\n")

    print_man_environment_tail()
    output_man.write(".El\n")
@@ -217,14 +219,6 @@ def print_man_environment_tail():
    ],
    "''", True)

-    print_man_env_option(
-    "FEX_PORTABLE",
-    [
-    "Allows FEX to run without installation. Global locations for configuration and binfmt_misc are ignored. These files are instead read from <FEXInterpreterPath>/fex-emu/ by default.",
-    "For further customization, see FEX_APP_CONFIG_LOCATION and FEX_APP_DATA_LOCATION."
-    ],
-    "''", True)
-
 def print_man_header():
    header ='''.Dd {0}
 .Dt FEX
@@ -447,24 +441,6 @@ def print_parse_envloader_options(options):
                output_argloader.write("}\n")
    output_argloader.write("#endif\n")

-def print_parse_jsonloader_options(options):
-    output_argloader.write("#ifdef JSONLOADER\n")
-    output_argloader.write("#undef JSONLOADER\n")
-    output_argloader.write("if (false) {}\n")
-    for op_group, group_vals in options.items():
-        for op_key, op_vals in group_vals.items():
-            value_type = op_vals["Type"]
-            if (value_type == "strenum"):
-                output_argloader.write("else if (KeyName == \"{0}\") {{\n".format(op_key))
-                output_argloader.write("Set(KeyOption, FEXCore::Config::EnumParser<FEXCore::Config::{}ConfigPair>(FEXCore::Config::{}_EnumPairs, Value_View));\n".format(op_key, op_key, op_key))
-                output_argloader.write("}\n")
-
-    output_argloader.write("else {{\n".format(op_key))
-    output_argloader.write("Set(KeyOption, ConfigString);\n")
-    output_argloader.write("}\n")
-
-    output_argloader.write("#endif\n")
-
 def print_parse_enum_options(options):
    output_argloader.write("#ifdef ENUMDEFINES\n")
    output_argloader.write("#undef ENUMDEFINES\n")
@@ -580,9 +556,6 @@ print_parse_argloader_options(options);
 # Generate environment loader code
 print_parse_envloader_options(options);

-# Generate json loader code
-print_parse_jsonloader_options(options);
-
 # Generate enum variable options
 print_parse_enum_options(options);

@@ -2,7 +2,6 @@
 import json
 import sys
 from dataclasses import dataclass, field
-import textwrap

 def ExitError(msg):
    print(msg)
@@ -54,10 +53,8 @@ class OpDefinition:
    SSAArgNum: int
    NonSSAArgNum: int
    DynamicDispatch: bool
-    LoweredX87: bool
    JITDispatch: bool
    JITDispatchOverride: str
-    TiedSource: int
    Arguments: list
    EmitValidation: list
    Desc: list
@@ -78,10 +75,8 @@ class OpDefinition:
        self.SSAArgNum = 0
        self.NonSSAArgNum = 0
        self.DynamicDispatch = False
-        self.LoweredX87 = False
        self.JITDispatch = True
        self.JITDispatchOverride = None
-        self.TiedSource = -1
        self.Arguments = []
        self.EmitValidation = []
        self.Desc = []
@@ -125,36 +120,21 @@ def parse_ops(ops):

            RHS = EqualSplit[0].strip()
            if len(EqualSplit) > 1:
-                LHS = EqualSplit[0].strip()
+                OpDef.HasDest = True
                RHS = EqualSplit[1].strip()

-                if ":" in LHS:
-                    # Named destinations. This is a hack, but so is the entire
-                    # multi-destination support bolten onto the old IR...
-                    #
-                    # Named destinations require side effects because they break
-                    # SSA hard. Validate that.
-                    assert("HasSideEffects" in op_val and op_val["HasSideEffects"])
-
-                    for Dest in LHS.split(","):
-                        Dest = Dest.strip()
-                        DType, Name = Dest.split(":$")
-
-                        # If the destination appears also as a source, it is
-                        # read-modify-write.
-                        if Dest in RHS:
-                            # Turn RMW into an in/out source
-                            RHS = RHS.replace(Dest.strip(), f"{DType}:$Inout{Name}")
-                        else:
-                            # Turn named destinations into an out source.
-                            RHS += f", {DType}:$Out{Name}"
+                # Parse the destination, must be one type of SSA, GPR, or FPR
+                ResultType = EqualSplit[0].strip()
+                if ResultType == "SSA":
+                    OpDef.DestType = "SSA" # We don't know this type right now
+                elif ResultType == "GPR":
+                    OpDef.DestType = "GPR"
+                elif ResultType == "GPRPair":
+                    OpDef.DestType = "GPRPair"
+                elif ResultType == "FPR":
+                    OpDef.DestType = "FPR"
                else:
-                    # Single anonymous destination
-                    if LHS not in ["SSA", "GPR", "GPRPair", "FPR"]:
-                        ExitError(f"Unknown destination class type {LHS}. Needs to be one of SSA, GPR, GPRPair, FPR")
-
-                    OpDef.HasDest = True
-                    OpDef.DestType = LHS
+                    ExitError("Unknown destination class type {}. Needs to be one of {SSA, GPR, GPRPair, FPR}".format(ResultType))

            # IR Op needs to start with a name
            RHS = RHS.split(" ", 1)
@@ -222,7 +202,7 @@ def parse_ops(ops):
                        (OpArg.Type == "GPR" or
                        OpArg.Type == "GPRPair" or
                        OpArg.Type == "FPR")):
-                        OpDef.EmitValidation.append(f"GetOpRegClass({ArgName}) == InvalidClass || WalkFindRegClass({ArgName}) == {OpArg.Type}Class")
+                        OpDef.EmitValidation.append("GetOpRegClass({}) == InvalidClass || WalkFindRegClass({}) == {}Class".format(NameWithPrefix, NameWithPrefix, OpArg.Type))

                    OpArg.Name = ArgName
                    OpArg.NameWithPrefix = NameWithPrefix
@@ -268,23 +248,17 @@ def parse_ops(ops):
            if "JITDispatchOverride" in op_val:
                OpDef.JITDispatchOverride = op_val["JITDispatchOverride"]

-            if "X87" in op_val:
-                OpDef.LoweredX87 = op_val["X87"]
-
-                # X87 implies !JITDispatch
-                assert("JITDispatch" not in op_val)
-                OpDef.JITDispatch = False
-
-            if "TiedSource" in op_val:
-                OpDef.TiedSource = op_val["TiedSource"]
-
            # Do some fixups of the data here
            if len(OpDef.EmitValidation) != 0:
                for i in range(len(OpDef.EmitValidation)):
                    # Patch up all the argument names
                    for Arg in OpDef.Arguments:
-                        # Temporary ops just replace all instances no prefix variant
-                        OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, Arg.Name)
+                        if Arg.Temporary:
+                            # Temporary ops just replace all instances no prefix variant
+                            OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, Arg.Name)
+                        else:
+                            # All other ops replace $ with _ variant for argument passed in
+                            OpDef.EmitValidation[i] = OpDef.EmitValidation[i].replace(Arg.NameWithPrefix, "_{}".format(Arg.Name))

            #OpDef.print()

@@ -389,28 +363,25 @@ def print_ir_sizes():
        if op.Name == "Last":
            output_file.write("\t-1ULL,\n")
        else:
-            output_file.write(f"\tsizeof(IROp_{op.Name}),\n")
+            output_file.write("\tsizeof(IROp_{}),\n".format(op.Name))

-    output_file.write(textwrap.dedent("""
-    };
+    output_file.write("};\n\n")

-    // Make sure our array maps directly to the IROps enum
-    static_assert(IRSizes[IROps::OP_LAST] == -1ULL);
+    output_file.write("// Make sure our array maps directly to the IROps enum\n")
+    output_file.write("static_assert(IRSizes[IROps::OP_LAST] == -1ULL);\n\n")

-    [[maybe_unused, nodiscard]] static size_t GetSize(IROps Op) { return IRSizes[Op]; }
-    [[nodiscard, gnu::const, gnu::visibility("default")]] std::string_view const& GetName(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] uint8_t GetArgs(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] uint8_t GetRAArgs(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] FEXCore::IR::RegisterClassType GetRegClass(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool HasSideEffects(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool ImplicitFlagClobber(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool GetHasDest(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] bool LoweredX87(IROps Op);
-    [[nodiscard, gnu::const, gnu::visibility("default")]] int8_t TiedSource(IROps Op);
+    output_file.write("[[maybe_unused, nodiscard]] static size_t GetSize(IROps Op) { return IRSizes[Op]; }\n\n")

-    #undef IROP_SIZES
-    #endif
-    """))
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] std::string_view const& GetName(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] uint8_t GetArgs(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] uint8_t GetRAArgs(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] FEXCore::IR::RegisterClassType GetRegClass(IROps Op);\n\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool HasSideEffects(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool ImplicitFlagClobber(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool GetHasDest(IROps Op);\n")
+
+    output_file.write("#undef IROP_SIZES\n")
+    output_file.write("#endif\n\n")

 def print_ir_reg_classes():
    output_file.write("#ifdef IROP_REG_CLASSES_IMPL\n")
@@ -500,27 +471,16 @@ def print_ir_getraargs():
 def print_ir_hassideeffects():
    output_file.write("#ifdef IROP_HASSIDEEFFECTS_IMPL\n")

-    for prop, T in [
-        ("HasSideEffects", "bool"),
-        ("ImplicitFlagClobber", "bool"),
-        ("LoweredX87", "bool"),
-        ("TiedSource", "int8_t"),
-    ]:
-        output_file.write(
-            f"constexpr std::array<{'uint8_t' if T == 'bool' else T}, OP_LAST + 1> {prop}_ = {{\n"
-        )
+    for array, prop in [("SideEffects", "HasSideEffects"),
+                        ("ImplicitFlagClobbers", "ImplicitFlagClobber")]:
+        output_file.write(f"constexpr std::array<uint8_t, OP_LAST + 1> {array} = {{\n")
        for op in IROps:
-            if T == "bool":
-                output_file.write(
-                    "\t{},\n".format(("true" if getattr(op, prop) else "false"))
-                )
-            else:
-                output_file.write(f"\t{getattr(op, prop)},\n")
+            output_file.write("\t{},\n".format(("true" if getattr(op, prop) else "false")))

        output_file.write("};\n\n")

-        output_file.write(f"{T} {prop}(IROps Op) {{\n")
-        output_file.write(f"  return {prop}_[Op];\n")
+        output_file.write(f"bool {prop}(IROps Op) {{\n")
+        output_file.write(f"  return {array}[Op];\n")
        output_file.write("}\n")

    output_file.write("#undef IROP_HASSIDEEFFECTS_IMPL\n")
@@ -560,20 +520,14 @@ def print_ir_arg_printer():
            output_file.write("\t*out << \" \";\n")

            SSAArgNum = 0
-            FirstArg = True
            for i in range(0, len(op.Arguments)):
                arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0

-                # No point printing temporaries that we can't recover
                if arg.Temporary:
-                    continue
-
-                if FirstArg:
-                    FirstArg = False
-                else:
-                    output_file.write('\t*out << ", ";\n')
-
-                if arg.IsSSA:
+                    # Temporary that we can't recover
+                    output_file.write("\t*out << \"{}:Tmp:{}\";\n".format(arg.Type, arg.Name))
+                elif arg.IsSSA:
                    # SSA value
                    output_file.write("\tPrintArg(out, IR, Op->Header.Args[{}], RAData);\n".format(SSAArgNum))
                    SSAArgNum = SSAArgNum + 1
@@ -581,6 +535,9 @@ def print_ir_arg_printer():
                    # User defined op that is stored
                    output_file.write("\tPrintArg(out, IR, Op->{});\n".format(arg.Name))

+                if not LastArg:
+                    output_file.write("\t*out << \", \";\n")
+
        output_file.write("break;\n")
        output_file.write("}\n")

@@ -679,11 +636,11 @@ def print_ir_allocator_helpers():
                    output_file.write("{} {}".format(CType, arg.Name));
                elif arg.IsSSA:
                    # SSA value
-                    output_file.write("OrderedNode *{}".format(arg.Name))
+                    output_file.write("OrderedNode *_{}".format(arg.Name))
                else:
                    # User defined op that is stored
                    CType = IRTypesToCXX[arg.Type].CXXName
-                    output_file.write("{} {}".format(CType, arg.Name));
+                    output_file.write("{} _{}".format(CType, arg.Name));

                if arg.DefaultInitializer != None:
                    output_file.write(" = {}".format(arg.DefaultInitializer))
@@ -695,30 +652,25 @@ def print_ir_allocator_helpers():

            # Save NZCV if needed before clobbering NZCV
            if op.ImplicitFlagClobber:
-                output_file.write("\t\tSaveNZCV(IROps::OP_{});".format(op.Name.upper()))
+                output_file.write("\t\tSaveNZCV();")

-            # We gather the "has x87?" flag as we go. This saves the user from
-            # having to keep track of whether they emitted any x87.
-            if op.LoweredX87:
-                output_file.write("\t\tRecordX87Use();\n")
-
-            output_file.write("\t\tauto _Op = AllocateOp<IROp_{}, IROps::OP_{}>();\n".format(op.Name, op.Name.upper()))
+            output_file.write("\t\tauto Op = AllocateOp<IROp_{}, IROps::OP_{}>();\n".format(op.Name, op.Name.upper()))

            if op.SSAArgNum != 0:
                output_file.write("\t\tauto ListDataBegin = DualListData.ListBegin();\n")
                for arg in op.Arguments:
                    if arg.IsSSA:
-                        output_file.write("\t\t_Op.first->{} = {}->Wrapped(ListDataBegin);\n".format(arg.Name, arg.Name))
+                        output_file.write("\t\tOp.first->{} = _{}->Wrapped(ListDataBegin);\n".format(arg.Name, arg.Name))

            if op.SSAArgNum != 0:
                for arg in op.Arguments:
                    if arg.IsSSA:
-                        output_file.write("\t\t{}->AddUse();\n".format(arg.Name))
+                        output_file.write("\t\t_{}->AddUse();\n".format(arg.Name))

            if len(op.Arguments) != 0:
                for arg in op.Arguments:
                    if not arg.Temporary and not arg.IsSSA:
-                        output_file.write("\t\t_Op.first->{} = {};\n".format(arg.Name, arg.Name))
+                        output_file.write("\t\tOp.first->{} = _{};\n".format(arg.Name, arg.Name))

            if (op.HasDest):
                # We can only infer a size if we have arguments
@@ -728,22 +680,22 @@ def print_ir_allocator_helpers():
                    if len(op.Arguments) != 0:
                        for arg in op.Arguments:
                            if arg.IsSSA:
-                                output_file.write("\t\tuint8_t Size{} = GetOpSize({});\n".format(arg.Name, arg.Name))
+                                output_file.write("\t\tuint8_t Size{} = GetOpSize(_{});\n".format(arg.Name, arg.Name))
                        for arg in op.Arguments:
                            if arg.IsSSA:
                                output_file.write("\t\tInferSize = std::max(InferSize, Size{});\n".format(arg.Name))

-                    output_file.write("\t\t_Op.first->Header.Size = InferSize;\n")
+                    output_file.write("\t\tOp.first->Header.Size = InferSize;\n")

            # Some ops without a destination still need an operating size
            # Effectively reusing the destination size value for operation size
            if op.DestSize != None:
-                output_file.write("\t\t_Op.first->Header.Size = {};\n".format(op.DestSize))
+                output_file.write("\t\tOp.first->Header.Size = {};\n".format(op.DestSize))

            if op.NumElements == None:
-                output_file.write("\t\t_Op.first->Header.ElementSize = _Op.first->Header.Size / ({});\n".format(1))
+                output_file.write("\t\tOp.first->Header.ElementSize = Op.first->Header.Size / ({});\n".format(1))
            else:
-                output_file.write("\t\t_Op.first->Header.ElementSize = _Op.first->Header.Size / ({});\n".format(op.NumElements))
+                output_file.write("\t\tOp.first->Header.ElementSize = Op.first->Header.Size / ({});\n".format(op.NumElements))

            # Insert validation here
            if op.EmitValidation != None:
@@ -754,12 +706,58 @@ def print_ir_allocator_helpers():
                    output_file.write("\tLOGMAN_THROW_A_FMT({}, \"{}\");\n".format(Validation, Sanitized))
                output_file.write("\t\t#endif\n")

-            output_file.write("\t\treturn _Op;\n")
+            output_file.write("\t\treturn Op;\n")
            output_file.write("\t}\n\n")

    output_file.write("#undef IROP_ALLOCATE_HELPERS\n")
    output_file.write("#endif\n")

+def print_ir_parser_switch_helper():
+    output_file.write("#ifdef IROP_PARSER_SWITCH_HELPERS\n")
+    for op in IROps:
+        if op.Name != "Last" and op.SwitchGen:
+            output_file.write("\tcase FEXCore::IR::IROps::OP_%s: {\n" % (op.Name.upper()))
+
+            for i in range(0, len(op.Arguments)):
+                arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0
+
+                if arg.Temporary:
+                    CType = IRTypesToCXX[arg.Type].CXXName
+                    output_file.write("\t\tauto arg{} = DecodeValue<{}>(Def.Args[{}]);\n".format(i, CType, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
+                elif arg.IsSSA:
+                    # SSA value
+                    output_file.write("\t\tauto arg{} = DecodeValue<OrderedNode*>(Def.Args[{}]);\n".format(i, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
+                else:
+                    # User defined op that is stored
+                    CType = IRTypesToCXX[arg.Type].CXXName
+                    output_file.write("\t\tauto arg{} = DecodeValue<{}>(Def.Args[{}]);\n".format(i, CType, i))
+                    output_file.write("\t\tif (!CheckPrintErrorArg(Def, arg{}.first, {})) return false;\n".format(i, i))
+
+            output_file.write("\t\tDef.Node = _{}(\n".format(op.Name))
+
+            for i in range(0, len(op.Arguments)):
+                arg = op.Arguments[i]
+                LastArg = len(op.Arguments) - i - 1 == 0
+                output_file.write("\t\t\targ{}.second".format(i))
+                if not LastArg:
+                    output_file.write(",\n")
+                else:
+                    output_file.write("\n")
+
+            output_file.write("\t\t);\n")
+
+            output_file.write("\t\tSSANameMapper[Def.Definition] = Def.Node;\n")
+
+            output_file.write("\t\tbreak;\n")
+            output_file.write("\t}\n")
+
+
+    output_file.write("#undef IROP_PARSER_SWITCH_HELPERS\n")
+    output_file.write("#endif\n")
+
 def print_ir_dispatcher_defs():
    output_dispatch_file.write("#ifdef IROP_DISPATCH_DEFS\n")
    for op in IROps:
@@ -818,6 +816,7 @@ print_ir_hassideeffects()
 print_ir_gethasdest()
 print_ir_arg_printer()
 print_ir_allocator_helpers()
+print_ir_parser_switch_helper()

 output_file.close()

@@ -1,4 +1,3 @@
-include(GNUInstallDirs)
 set (MAN_DIR share/man CACHE PATH "MAN_DIR")

 set (FEXCORE_BASE_SRCS
@@ -8,7 +7,6 @@ set (FEXCORE_BASE_SRCS
  Utils/FileLoading.cpp
  Utils/ForcedAssert.cpp
  Utils/LogManager.cpp
-  Utils/SpinWaitLock.cpp
  )

 if (NOT MINGW_BUILD)
@@ -68,6 +66,7 @@ set (SRCS
  Common/SoftFloat-3e/s_approxRecipSqrt32_1.c
  Common/SoftFloat-3e/s_approxRecipSqrt_1Ks.c
  Common/SoftFloat-3e/softfloat_raiseFlags.c
+  Common/SoftFloat-3e/softfloat_state.c
  Common/SoftFloat-3e/f64_to_extF80.c
  Common/SoftFloat-3e/s_commonNaNToExtF80UI.c
  Common/SoftFloat-3e/s_normSubnormalF64Sig.c
@@ -91,17 +90,20 @@ set (SRCS
  Interface/Core/CPUBackend.cpp
  Interface/Core/CPUID.cpp
  Interface/Core/Frontend.cpp
+  Interface/Core/GdbServer.cpp
+  Interface/Core/HostFeatures.cpp
  Interface/Core/ObjectCache/JobHandling.cpp
  Interface/Core/ObjectCache/NamedRegionObjectHandler.cpp
  Interface/Core/ObjectCache/ObjectCacheService.cpp
-  Interface/Core/OpcodeDispatcher/AVX_128.cpp
  Interface/Core/OpcodeDispatcher/Crypto.cpp
  Interface/Core/OpcodeDispatcher/Flags.cpp
  Interface/Core/OpcodeDispatcher/Vector.cpp
  Interface/Core/OpcodeDispatcher/X87.cpp
  Interface/Core/OpcodeDispatcher/X87F64.cpp
  Interface/Core/OpcodeDispatcher.cpp
+  Interface/Core/SignalDelegator.cpp
  Interface/Core/X86Tables.cpp
+  Interface/Core/X86DebugInfo.cpp
  Interface/Core/X86HelperGen.cpp
  Interface/Core/ArchHelpers/Arm64Emitter.cpp
  Interface/Core/Dispatcher/Dispatcher.cpp
@@ -112,6 +114,7 @@ set (SRCS
  Interface/Core/JIT/Arm64/BranchOps.cpp
  Interface/Core/JIT/Arm64/ConversionOps.cpp
  Interface/Core/JIT/Arm64/EncryptionOps.cpp
+  Interface/Core/JIT/Arm64/FlagOps.cpp
  Interface/Core/JIT/Arm64/MemoryOps.cpp
  Interface/Core/JIT/Arm64/MiscOps.cpp
  Interface/Core/JIT/Arm64/MoveOps.cpp
@@ -133,16 +136,23 @@ set (SRCS
  Interface/GDBJIT/GDBJIT.cpp
  Interface/IR/AOTIR.cpp
  Interface/IR/IRDumper.cpp
+  Interface/IR/IRParser.cpp
  Interface/IR/IREmitter.cpp
  Interface/IR/PassManager.cpp
  Interface/IR/Passes/ConstProp.cpp
+  Interface/IR/Passes/DeadCodeElimination.cpp
+  Interface/IR/Passes/DeadContextStoreElimination.cpp
+  Interface/IR/Passes/IRCompaction.cpp
  Interface/IR/Passes/IRDumperPass.cpp
  Interface/IR/Passes/IRValidation.cpp
  Interface/IR/Passes/RAValidation.cpp
+  Interface/IR/Passes/LongDivideRemovalPass.cpp
+  Interface/IR/Passes/ValueDominanceValidation.cpp
  Interface/IR/Passes/RedundantFlagCalculationElimination.cpp
  Interface/IR/Passes/DeadStoreElimination.cpp
  Interface/IR/Passes/RegisterAllocationPass.cpp
-  Interface/IR/Passes/x87StackOptimizationPass.cpp
+  Interface/IR/Passes/InlineCallOptimization.cpp
+  Utils/NetStream.cpp
  Utils/Telemetry.cpp
  Utils/Threads.cpp
  Utils/Profiler.cpp
@@ -159,7 +169,7 @@ if (ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT)
    Utils/AllocatorOverride.cpp)
 endif()

-set(DEFINES -DJIT_ARM64)
+set(DEFINES -DTHREAD_LOCAL=_Thread_local -DJIT_ARM64)

 if (_M_X86_64)
  list(APPEND DEFINES -D_M_X86_64=1)
@@ -169,6 +179,11 @@ if (_M_ARM_64)
  list(APPEND DEFINES -D_M_ARM_64=1)
 endif()

+if (ENABLE_VIXL_SIMULATOR)
+  # We can run the simulator on both x86-64 or AArch64 hosts
+  list(APPEND DEFINES -DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
+endif()
+
 if (ENABLE_VIXL_DISASSEMBLER)
  list(APPEND DEFINES -DVIXL_DISASSEMBLER=1)
 endif()
@@ -182,19 +197,12 @@ endif()
 # Some defines for the softfloat library
 list(APPEND DEFINES "-DSOFTFLOAT_BUILTIN_CLZ")

-set (LIBS fmt::fmt xxHash::xxhash FEXHeaderUtils CodeEmitter)
-
-if (ENABLE_VIXL_DISASSEMBLER OR ENABLE_VIXL_SIMULATOR)
-  list (APPEND LIBS vixl)
-endif()
+set (LIBS fmt::fmt vixl xxhash FEXHeaderUtils)

 if (NOT MINGW_BUILD)
  list (APPEND LIBS dl)
 else()
  list (APPEND LIBS synchronization)
-  if (_M_ARM_64EC)
-    list (APPEND LIBS kernelbase)
-  endif()
 endif()

 if (ENABLE_JEMALLOC)
@@ -365,6 +373,16 @@ function(AddLibrary Name Type)
  target_link_libraries(${Name} FEXCore_Base)
  target_compile_options(${Name} PRIVATE ${FEX_TUNE_COMPILE_FLAGS})
  set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore)
+  if (MINGW_BUILD)
+    # Mingw build isn't building a linux shared library, so it can't have a SONAME.
+    set_target_properties(${Name} PROPERTIES NO_SONAME ON)
+    # Change the suffixes otherwise cmake continues using .a and .so
+    if (${Type} STREQUAL SHARED)
+      set_target_properties(${Name} PROPERTIES SUFFIX ".dll")
+    elseif(${Type} STREQUAL STATIC)
+      set_target_properties(${Name} PROPERTIES SUFFIX ".lib")
+    endif()
+  endif()

  AddDefaultOptionsToTarget(${Name})
 endfunction()
@@ -374,8 +392,11 @@ AddLibrary(${PROJECT_NAME} STATIC)
 AddLibrary(${PROJECT_NAME}_shared SHARED)

 if (NOT MINGW_BUILD)
-  install(TARGETS ${PROJECT_NAME}_shared
+  install(TARGETS ${PROJECT_NAME} ${PROJECT_NAME}_shared
    LIBRARY
-      DESTINATION ${CMAKE_INSTALL_LIBDIR}
+      DESTINATION lib
+      COMPONENT Libraries
+    ARCHIVE
+      DESTINATION lib
      COMPONENT Libraries)
 endif()
@@ -18,14 +18,14 @@ struct BitSet final {
  constexpr static size_t MinimumSize = sizeof(ElementType);
  constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;

-  ElementType* Memory;
+  ElementType *Memory;
  void Allocate(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
    LOGMAN_THROW_AA_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
    Memory = static_cast<ElementType*>(FEXCore::Allocator::malloc(AllocateSize));
  }
  void Realloc(size_t Elements) {
-    size_t AllocateSize = ToBytes(Elements);
+    size_t AllocateSize = AlignUp(Elements, MinimumSizeBits) / MinimumSize;
    LOGMAN_THROW_AA_FMT((AllocateSize * MinimumSize) >= Elements, "Fail");
    Memory = static_cast<ElementType*>(FEXCore::Allocator::realloc(Memory, AllocateSize));
  }
@@ -43,13 +43,10 @@ struct BitSet final {
    Memory[Element / MinimumSizeBits] &= (1ULL << (Element % MinimumSizeBits));
  }
  void MemClear(size_t Elements) {
-    memset(Memory, 0, ToBytes(Elements));
+    memset(Memory, 0, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
  }
  void MemSet(size_t Elements) {
-    memset(Memory, 0xFF, ToBytes(Elements));
-  }
-  uint32_t ToBytes(size_t Elements) {
-    return AlignUp(Elements, MinimumSizeBits) / MinimumSize;
+    memset(Memory, 0xFF, AlignUp(Elements / MinimumSizeBits, MinimumSizeBits));
  }

  // This very explicitly doesn't let you take an address
@@ -65,10 +62,11 @@ struct BitSetView final {
  constexpr static size_t MinimumSize = sizeof(ElementType);
  constexpr static size_t MinimumSizeBits = sizeof(ElementType) * 8;

-  ElementType* Memory;
+  ElementType *Memory;

-  void GetView(BitSet<T>& Set, uint64_t ElementOffset) {
-    LOGMAN_THROW_AA_FMT((ElementOffset % MinimumSize) == 0, "Bitset view offset needs to be aligned to size of backing element");
+  void GetView(BitSet<T> &Set, uint64_t ElementOffset) {
+    LOGMAN_THROW_AA_FMT((ElementOffset % MinimumSize) == 0,
+                       "Bitset view offset needs to be aligned to size of backing element");
    Memory = &Set.Memory[ElementOffset / MinimumSizeBits];
  }

@@ -7,142 +7,133 @@
 #include <unistd.h>

 namespace FEXCore {
-JITSymbols::JITSymbols() {}
-
-JITSymbols::~JITSymbols() {
-  if (fd != -1) {
-    close(fd);
-  }
-}
-
-void JITSymbols::InitFile() {
-  // We can't use FILE here since we must be robust against forking processes closing our FD from under us.
-#ifdef __ANDROID__
-  // Android simpleperf looks in /data/local/tmp instead of /tmp
-  const auto PerfMap = fextl::fmt::format("/data/local/tmp/perf-{}.map", getpid());
-#else
-  const auto PerfMap = fextl::fmt::format("/tmp/perf-{}.map", getpid());
-#endif
-  fd = open(PerfMap.c_str(), O_CREAT | O_TRUNC | O_WRONLY | O_APPEND, 0644);
-}
-
-void JITSymbols::RegisterNamedRegion(const void* HostAddr, uint32_t CodeSize, std::string_view Name) {
-  if (fd == -1) {
-    return;
+  JITSymbols::JITSymbols() {
  }

-  // Linux perf format is very straightforward
-  // `<HostPtr> <Size> <Name>\n`
-  const auto Buffer = fextl::fmt::format("{} {:x} {}\n", HostAddr, CodeSize, Name);
-  auto Result = write(fd, Buffer.c_str(), Buffer.size());
-  if (Result == -1 && errno == EBADF) {
-    fd = -1;
-  }
-}
-
-void JITSymbols::RegisterJITSpace(const void* HostAddr, uint32_t CodeSize) {
-  if (fd == -1) {
-    return;
-  }
-
-  // Linux perf format is very straightforward
-  // `<HostPtr> <Size> <Name>\n`
-  const auto Buffer = fextl::fmt::format("{} {:x} FEXJIT\n", HostAddr, CodeSize);
-  auto Result = write(fd, Buffer.c_str(), Buffer.size());
-  if (Result == -1 && errno == EBADF) {
-    fd = -1;
-  }
-}
-
-// Buffered JIT symbols.
-void JITSymbols::Register(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint64_t GuestAddr, uint32_t CodeSize) {
-  if (fd == -1) {
-    return;
-  }
-
-  // Calculate remaining sizes.
-  const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
-  const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
-
-  // Linux perf format is very straightforward
-  // `<HostPtr> <Size> <Name>\n`
-  const auto FMTResult = fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} JIT_0x{:x}_{}\n", HostAddr, CodeSize, GuestAddr, HostAddr);
-  if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
-    // Couldn't fit, need to force a write.
-    WriteBuffer(Buffer, true);
-    // Rerun
-    Register(Buffer, HostAddr, GuestAddr, CodeSize);
-    return;
-  }
-
-  Buffer->Offset += FMTResult.size;
-  WriteBuffer(Buffer);
-}
-
-void JITSymbols::Register(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset) {
-  if (fd == -1) {
-    return;
-  }
-
-  // Calculate remaining sizes.
-  const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
-  const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
-
-  // Linux perf format is very straightforward
-  // `<HostPtr> <Size> <Name>\n`
-  const auto FMTResult =
-    fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} {}+0x{:x} ({})\n", HostAddr, CodeSize, Name, Offset, HostAddr);
-  if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
-    // Couldn't fit, need to force a write.
-    WriteBuffer(Buffer, true);
-    // Rerun
-    Register(Buffer, HostAddr, CodeSize, Name, Offset);
-    return;
-  }
-
-  Buffer->Offset += FMTResult.size;
-  WriteBuffer(Buffer);
-}
-
-void JITSymbols::RegisterNamedRegion(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint32_t CodeSize, std::string_view Name) {
-  if (fd == -1) {
-    return;
-  }
-
-  // Calculate remaining sizes.
-  const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
-  const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
-
-  // Linux perf format is very straightforward
-  // `<HostPtr> <Size> <Name>\n`
-  const auto FMTResult = fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} {}\n", HostAddr, CodeSize, Name);
-  if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
-    // Couldn't fit, need to force a write.
-    WriteBuffer(Buffer, true);
-    // Rerun
-    RegisterNamedRegion(Buffer, HostAddr, CodeSize, Name);
-    return;
-  }
-
-  Buffer->Offset += FMTResult.size;
-  WriteBuffer(Buffer);
-}
-
-void JITSymbols::WriteBuffer(Core::JITSymbolBuffer* Buffer, bool ForceWrite) {
-  auto Now = std::chrono::steady_clock::now();
-  if (!ForceWrite) {
-    if (((Buffer->LastWrite - Now) < Buffer->MAXIMUM_THRESHOLD) && Buffer->Offset < Buffer->NEEDS_WRITE_DISTANCE) {
-      // Still buffering, no need to write.
-      return;
+  JITSymbols::~JITSymbols() {
+    if (fd != -1) {
+      close(fd);
    }
  }

-  Buffer->LastWrite = Now;
-  auto Result = write(fd, Buffer->Buffer, Buffer->Offset);
-  if (Result == -1 && errno == EBADF) {
-    fd = -1;
+  void JITSymbols::InitFile() {
+    // We can't use FILE here since we must be robust against forking processes closing our FD from under us.
+#ifdef __ANDROID__
+    // Android simpleperf looks in /data/local/tmp instead of /tmp
+    const auto PerfMap = fextl::fmt::format("/data/local/tmp/perf-{}.map", getpid());
+#else
+    const auto PerfMap = fextl::fmt::format("/tmp/perf-{}.map", getpid());
+#endif
+    fd = open(PerfMap.c_str(), O_CREAT | O_TRUNC | O_WRONLY | O_APPEND, 0644);
  }

-  Buffer->Offset = 0;
-}
+  void JITSymbols::RegisterNamedRegion(const void *HostAddr, uint32_t CodeSize, std::string_view Name) {
+    if (fd == -1) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    const auto Buffer = fextl::fmt::format("{} {:x} {}\n", HostAddr, CodeSize, Name);
+    auto Result = write(fd, Buffer.c_str(), Buffer.size());
+    if (Result == -1 && errno == EBADF) {
+      fd = -1;
+    }
+  }
+
+  void JITSymbols::RegisterJITSpace(const void *HostAddr, uint32_t CodeSize) {
+    if (fd == -1) return;
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    const auto Buffer = fextl::fmt::format("{} {:x} FEXJIT\n", HostAddr, CodeSize);
+    auto Result = write(fd, Buffer.c_str(), Buffer.size());
+    if (Result == -1 && errno == EBADF) {
+      fd = -1;
+    }
+  }
+
+  // Buffered JIT symbols.
+  void JITSymbols::Register(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize) {
+    if (fd == -1) return;
+
+    // Calculate remaining sizes.
+    const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
+    const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    const auto FMTResult = fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} JIT_0x{:x}_{}\n", HostAddr, CodeSize, GuestAddr, HostAddr);
+    if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
+      // Couldn't fit, need to force a write.
+      WriteBuffer(Buffer, true);
+      // Rerun
+      Register(Buffer, HostAddr, GuestAddr, CodeSize);
+      return;
+    }
+
+    Buffer->Offset += FMTResult.size;
+    WriteBuffer(Buffer);
+  }
+
+  void JITSymbols::Register(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset) {
+    if (fd == -1) return;
+
+    // Calculate remaining sizes.
+    const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
+    const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    const auto FMTResult = fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} {}+0x{:x} ({})\n", HostAddr, CodeSize, Name, Offset, HostAddr);
+    if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
+      // Couldn't fit, need to force a write.
+      WriteBuffer(Buffer, true);
+      // Rerun
+      Register(Buffer, HostAddr, CodeSize, Name, Offset);
+      return;
+    }
+
+    Buffer->Offset += FMTResult.size;
+    WriteBuffer(Buffer);
+  }
+
+  void JITSymbols::RegisterNamedRegion(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint32_t CodeSize, std::string_view Name) {
+    if (fd == -1) return;
+
+    // Calculate remaining sizes.
+    const auto RemainingSize = Buffer->BUFFER_SIZE - Buffer->Offset;
+    const auto CurrentBufferOffset = &Buffer->Buffer[Buffer->Offset];
+
+    // Linux perf format is very straightforward
+    // `<HostPtr> <Size> <Name>\n`
+    const auto FMTResult = fmt::format_to_n(CurrentBufferOffset, RemainingSize, "{} {:x} {}\n", HostAddr, CodeSize, Name);
+    if (FMTResult.out >= &Buffer->Buffer[Buffer->BUFFER_SIZE]) {
+      // Couldn't fit, need to force a write.
+      WriteBuffer(Buffer, true);
+      // Rerun
+      RegisterNamedRegion(Buffer, HostAddr, CodeSize, Name);
+      return;
+    }
+
+    Buffer->Offset += FMTResult.size;
+    WriteBuffer(Buffer);
+  }
+
+  void JITSymbols::WriteBuffer(Core::JITSymbolBuffer *Buffer, bool ForceWrite) {
+    auto Now = std::chrono::steady_clock::now();
+    if (!ForceWrite) {
+      if (((Buffer->LastWrite - Now) < Buffer->MAXIMUM_THRESHOLD) &&
+          Buffer->Offset < Buffer->NEEDS_WRITE_DISTANCE) {
+        // Still buffering, no need to write.
+        return;
+      }
+    }
+
+    Buffer->LastWrite = Now;
+    auto Result = write(fd, Buffer->Buffer, Buffer->Offset);
+    if (Result == -1 && errno == EBADF) {
+      fd = -1;
+    }
+
+    Buffer->Offset = 0;
+  }
 } // namespace FEXCore
@@ -17,20 +17,20 @@ public:
  ~JITSymbols();

  void InitFile();
-  void RegisterNamedRegion(const void* HostAddr, uint32_t CodeSize, std::string_view Name);
-  void RegisterJITSpace(const void* HostAddr, uint32_t CodeSize);
+  void RegisterNamedRegion(const void *HostAddr, uint32_t CodeSize, std::string_view Name);
+  void RegisterJITSpace(const void *HostAddr, uint32_t CodeSize);

  // Allocate JIT buffer.
  static fextl::unique_ptr<Core::JITSymbolBuffer> AllocateBuffer() {
    return fextl::make_unique<Core::JITSymbolBuffer>();
  }

-  void Register(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint64_t GuestAddr, uint32_t CodeSize);
-  void Register(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset);
-  void RegisterNamedRegion(Core::JITSymbolBuffer* Buffer, const void* HostAddr, uint32_t CodeSize, std::string_view Name);
+  void Register(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint64_t GuestAddr, uint32_t CodeSize);
+  void Register(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint32_t CodeSize, std::string_view Name, uintptr_t Offset);
+  void RegisterNamedRegion(Core::JITSymbolBuffer *Buffer, const void *HostAddr, uint32_t CodeSize, std::string_view Name);

 private:
-  int fd {-1};
-  void WriteBuffer(Core::JITSymbolBuffer* Buffer, bool ForceWrite = false);
+  int fd{-1};
+  void WriteBuffer(Core::JITSymbolBuffer *Buffer, bool ForceWrite = false);
 };
-} // namespace FEXCore
+}
@@ -41,7 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -53,7 +53,7 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
    bool signB;
    extFloat80_t
        (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

    uA.f = a;
    uiA64 = uA.s.signExp;
@@ -65,6 +65,6 @@ extFloat80_t extF80_add( struct softfloat_state *state, extFloat80_t a, extFloat
    signB = signExtF80UI64( uiB64 );
    magsFuncPtr =
        (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 }

@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -107,7 +107,7 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
        if ( ! sigB ) {
            if ( ! sigA ) goto invalid;
-            softfloat_raiseFlags( state, softfloat_flag_infinite );
+            softfloat_raiseFlags( softfloat_flag_infinite );
            goto infinity;
        }
        normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
@@ -169,18 +169,18 @@ extFloat80_t extF80_div( struct softfloat_state *state, extFloat80_t a, extFloat
    sigZExtra = (uint64_t) ((uint_fast64_t) q<<41);
    return
        softfloat_roundPackToExtF80(
-            state, signZ, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
    uiZ64 = uiZ.v64;
    uiZ0  = uiZ.v0;
    goto uiZ;
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    uiZ64 = defaultNaNExtF80UI64;
    uiZ0  = defaultNaNExtF80UI0;
    goto uiZ;
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_eq( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -62,7 +62,7 @@ bool extF80_eq( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
        ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
        }
        return false;
    }
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+bool extF80_lt( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -59,7 +59,7 @@ bool extF80_lt( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
    uiB64 = uB.s.signExp;
    uiB0  = uB.s.signif;
    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        return false;
    }
    signA = signExtF80UI64( uiA64 );
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -125,11 +125,11 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
    }
    return
        softfloat_roundPackToExtF80(
-            state, signZ, expZ, sig128Z.v64, sig128Z.v0, state->roundingPrecision );
+            signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
    uiZ64 = uiZ.v64;
    uiZ0  = uiZ.v0;
    goto uiZ;
@@ -137,7 +137,7 @@ extFloat80_t extF80_mul( struct softfloat_state *state, extFloat80_t a, extFloat
    *------------------------------------------------------------------------*/
 infArg:
    if ( ! magBits ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        uiZ64 = defaultNaNExtF80UI64;
        uiZ0  = defaultNaNExtF80UI0;
    } else {
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -193,18 +193,18 @@ extFloat80_t extF80_rem( struct softfloat_state *state, extFloat80_t a, extFloat
    }
    return
        softfloat_normRoundPackToExtF80(
-            state, signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
+            signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
    uiZ64 = uiZ.v64;
    uiZ0  = uiZ.v0;
    goto uiZ;
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    uiZ64 = defaultNaNExtF80UI64;
    uiZ0  = defaultNaNExtF80UI0;
    goto uiZ;
@@ -43,7 +43,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
- extF80_roundToInt( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64, signUI64;
@@ -80,7 +80,7 @@ extFloat80_t
    if ( 0x403E <= exp ) {
        if ( exp == 0x7FFF ) {
            if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-                uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, sigA, 0, 0 );
+                uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 );
                uiZ64 = uiZ.v64;
                sigZ  = uiZ.v0;
                goto uiZ;
@@ -93,7 +93,7 @@ extFloat80_t
        goto uiZ;
    }
    if ( exp <= 0x3FFE ) {
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
        switch ( roundingMode ) {
         case softfloat_round_near_even:
            if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;
@@ -145,7 +145,7 @@ extFloat80_t
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
    }
 uiZ:
    uZ.s.signExp = uiZ64;
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
+extFloat80_t extF80_sqrt( extFloat80_t a )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -74,7 +74,7 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
    *------------------------------------------------------------------------*/
    if ( expA == 0x7FFF ) {
        if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, 0, 0 );
+            uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 );
            uiZ64 = uiZ.v64;
            uiZ0  = uiZ.v0;
            goto uiZ;
@@ -155,11 +155,11 @@ extFloat80_t extF80_sqrt( struct softfloat_state *state, extFloat80_t a )
    }
    return
        softfloat_roundPackToExtF80(
-            state, 0, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            0, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    uiZ64 = defaultNaNExtF80UI64;
    uiZ0  = defaultNaNExtF80UI0;
    goto uiZ;
@@ -41,7 +41,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat80_t b )
+extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -54,7 +54,7 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
 #if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
    extFloat80_t
        (*magsFuncPtr)(
-            struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 #endif

    uA.f = a;
@@ -67,14 +67,14 @@ extFloat80_t extF80_sub( struct softfloat_state *state, extFloat80_t a, extFloat
    signB = signExtF80UI64( uiB64 );
 #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
    if ( signA == signB ) {
-        return softfloat_subMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
    } else {
-        return softfloat_addMagsExtF80( state, uiA64, uiA0, uiB64, uiB0, signA );
+        return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
    }
 #else
    magsFuncPtr =
        (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;
-    return (*magsFuncPtr)( state, uiA64, uiA0, uiB64, uiB0, signA );
+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
 #endif

 }
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
+float128_t extF80_to_f128( extFloat80_t a )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -61,7 +61,7 @@ float128_t extF80_to_f128( struct softfloat_state *state, extFloat80_t a )
    exp = expExtF80UI64( uiA64 );
    frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
    if ( (exp == 0x7FFF) && frac ) {
-        softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+        softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
        uiZ = softfloat_commonNaNToF128UI( &commonNaN );
    } else {
        sign = signExtF80UI64( uiA64 );
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
+float32_t extF80_to_f32( extFloat80_t a )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -66,7 +66,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
    *------------------------------------------------------------------------*/
    if ( exp == 0x7FFF ) {
        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
            uiZ = softfloat_commonNaNToF32UI( &commonNaN );
        } else {
            uiZ = packToF32UI( sign, 0xFF, 0 );
@@ -86,7 +86,7 @@ float32_t extF80_to_f32( struct softfloat_state *state, extFloat80_t a )
    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
        if ( exp < -0x1000 ) exp = -0x1000;
    }
-    return softfloat_roundPackToF32( state, sign, exp, sig32 );
+    return softfloat_roundPackToF32( sign, exp, sig32 );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 uiZ:
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
+float64_t extF80_to_f64( extFloat80_t a )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -72,7 +72,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
    *------------------------------------------------------------------------*/
    if ( exp == 0x7FFF ) {
        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
-            softfloat_extF80UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
            uiZ = softfloat_commonNaNToF64UI( &commonNaN );
        } else {
            uiZ = packToF64UI( sign, 0x7FF, 0 );
@@ -86,7 +86,7 @@ float64_t extF80_to_f64( struct softfloat_state *state, extFloat80_t a )
    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
        if ( exp < -0x1000 ) exp = -0x1000;
    }
-    return softfloat_roundPackToF64( state, sign, exp, sig );
+    return softfloat_roundPackToF64( sign, exp, sig );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 uiZ:
@@ -43,7 +43,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 int_fast32_t
- extF80_to_i32( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -68,7 +68,7 @@ int_fast32_t
 #elif (i32_fromNaN == i32_fromNegOverflow)
        sign = 1;
 #else
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        return i32_fromNaN;
 #endif
    }
@@ -78,7 +78,7 @@ int_fast32_t
    shiftDist = 0x4032 - exp;
    if ( shiftDist <= 0 ) shiftDist = 1;
    sig = softfloat_shiftRightJam64( sig, shiftDist );
-    return softfloat_roundToI32( state, sign, sig, roundingMode, exact );
+    return softfloat_roundToI32( sign, sig, roundingMode, exact );

 }

@@ -43,7 +43,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
- extF80_to_i64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -68,7 +68,7 @@ int_fast64_t
        /*--------------------------------------------------------------------
        *--------------------------------------------------------------------*/
        if ( shiftDist ) {
-            softfloat_raiseFlags( state, softfloat_flag_invalid );
+            softfloat_raiseFlags( softfloat_flag_invalid );
            return
                (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                    ? i64_fromNaN
@@ -84,7 +84,7 @@ int_fast64_t
        sig = sig64Extra.v;
        sigExtra = sig64Extra.extra;
    }
-    return softfloat_roundToI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact );

 }

@@ -43,7 +43,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 uint_fast64_t
- extF80_to_ui64( struct softfloat_state *state, extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+ extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
 {
    union { struct extFloat80M s; extFloat80_t f; } uA;
    uint_fast16_t uiA64;
@@ -65,7 +65,7 @@ uint_fast64_t
    *------------------------------------------------------------------------*/
    shiftDist = 0x403E - exp;
    if ( shiftDist < 0 ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        return
            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                ? ui64_fromNaN
@@ -79,7 +79,7 @@ uint_fast64_t
        sig = sig64Extra.v;
        sigExtra = sig64Extra.extra;
    }
-    return softfloat_roundToUI64( state, sign, sig, sigExtra, roundingMode, exact );
+    return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact );

 }

@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
+extFloat80_t f128_to_extF80( float128_t a )
 {
    union ui128_f128 uA;
    uint_fast64_t uiA64, uiA0;
@@ -70,7 +70,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
    *------------------------------------------------------------------------*/
    if ( exp == 0x7FFF ) {
        if ( frac64 | frac0 ) {
-            softfloat_f128UIToCommonNaN( state, uiA64, uiA0, &commonNaN );
+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );
            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
            uiZ64 = uiZ.v64;
            uiZ0  = uiZ.v0;
@@ -98,7 +98,7 @@ extFloat80_t f128_to_extF80( struct softfloat_state *state, float128_t a )
    sig128 =
        softfloat_shortShiftLeft128(
            frac64 | UINT64_C( 0x0001000000000000 ), frac0, 15 );
-    return softfloat_roundPackToExtF80( state, sign, exp, sig128.v64, sig128.v0, 80 );
+    return softfloat_roundPackToExtF80( sign, exp, sig128.v64, sig128.v0, 80 );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 uiZ:
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
+extFloat80_t f32_to_extF80( float32_t a )
 {
    union ui32_f32 uA;
    uint_fast32_t uiA;
@@ -67,7 +67,7 @@ extFloat80_t f32_to_extF80( struct softfloat_state *state, float32_t a )
    *------------------------------------------------------------------------*/
    if ( exp == 0xFF ) {
        if ( frac ) {
-            softfloat_f32UIToCommonNaN( state, uiA, &commonNaN );
+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );
            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
            uiZ64 = uiZ.v64;
            uiZ0  = uiZ.v0;
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include "softfloat.h"

 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f64_to_extF80( struct softfloat_state *state, float64_t a )
+extFloat80_t f64_to_extF80( float64_t a )
 {
    union ui64_f64 uA;
    uint_fast64_t uiA;
@@ -67,7 +67,7 @@ extFloat80_t f64_to_extF80( struct softfloat_state *state, float64_t a )
    *------------------------------------------------------------------------*/
    if ( exp == 0x7FF ) {
        if ( frac ) {
-            softfloat_f64UIToCommonNaN( state, uiA, &commonNaN );
+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );
            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );
            uiZ64 = uiZ.v64;
            uiZ0  = uiZ.v0;
@@ -63,19 +63,19 @@ uint_fast32_t softfloat_roundToUI32( bool, uint_fast64_t, uint_fast8_t, bool );
 #ifdef SOFTFLOAT_FAST_INT64
 uint_fast64_t
 softfloat_roundToUI64(
-     struct softfloat_state *, bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
 #else
 uint_fast64_t softfloat_roundMToUI64( bool, uint32_t *, uint_fast8_t, bool );
 #endif

 FEXCORE_PRESERVE_ALL_ATTR
-int_fast32_t softfloat_roundToI32( struct softfloat_state *, bool, uint_fast64_t, uint_fast8_t, bool );
+int_fast32_t softfloat_roundToI32( bool, uint_fast64_t, uint_fast8_t, bool );

 #ifdef SOFTFLOAT_FAST_INT64
 FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
 softfloat_roundToI64(
-     struct softfloat_state *, bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
 #else
 int_fast64_t softfloat_roundMToI64( bool, uint32_t *, uint_fast8_t, bool );
 #endif
@@ -115,7 +115,7 @@ FEXCORE_PRESERVE_ALL_ATTR
 struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );

 FEXCORE_PRESERVE_ALL_ATTR
-float32_t softfloat_roundPackToF32( struct softfloat_state *, bool, int_fast16_t, uint_fast32_t );
+float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t );
 float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t );

 float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t );
@@ -138,7 +138,7 @@ FEXCORE_PRESERVE_ALL_ATTR
 struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );

 FEXCORE_PRESERVE_ALL_ATTR
-float64_t softfloat_roundPackToF64( struct softfloat_state *, bool, int_fast16_t, uint_fast64_t );
+float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t );
 float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t );

 float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );
@@ -167,18 +167,18 @@ struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t );
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
 softfloat_roundPackToExtF80(
-     struct softfloat_state *, bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
 softfloat_normRoundPackToExtF80(
-     struct softfloat_state *, bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );

 extFloat80_t
 softfloat_addMagsExtF80(
-     struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
 extFloat80_t
 softfloat_subMagsExtF80(
-     struct softfloat_state *, uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

 /*----------------------------------------------------------------------------
 *----------------------------------------------------------------------------*/
@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 extFloat80_t
 softfloat_addMagsExtF80(
-     struct softfloat_state *state,
     uint_fast16_t uiA64,
     uint_fast64_t uiA0,
     uint_fast16_t uiB64,
@@ -141,11 +140,11 @@ extFloat80_t
 roundAndPack:
    return
        softfloat_roundPackToExtF80(
-            state, signZ, expZ, sigZ, sigZExtra, state->roundingPrecision );
+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
    uiZ64 = uiZ.v64;
    uiZ0  = uiZ.v0;
 uiZ:
@@ -49,11 +49,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 void
 softfloat_extF80UIToCommonNaN(
-     struct softfloat_state *state, uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
 {

    if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
    }
    zPtr->sign = uiA64>>15;
    zPtr->v64  = uiA0<<1;
@@ -50,12 +50,12 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 void
 softfloat_f128UIToCommonNaN(
-     struct softfloat_state *state, uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
 {
    struct uint128 NaNSig;

    if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
    }
    NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );
    zPtr->sign = uiA64>>63;
@@ -46,11 +46,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | exception is raised.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f32UIToCommonNaN( struct softfloat_state *state, uint_fast32_t uiA, struct commonNaN *zPtr )
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )
 {

    if ( softfloat_isSigNaNF32UI( uiA ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
    }
    zPtr->sign = uiA>>31;
    zPtr->v64  = (uint_fast64_t) uiA<<41;
@@ -46,11 +46,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | exception is raised.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f64UIToCommonNaN( struct softfloat_state *state, uint_fast64_t uiA, struct commonNaN *zPtr )
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )
 {

    if ( softfloat_isSigNaNF64UI( uiA ) ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
    }
    zPtr->sign = uiA>>63;
    zPtr->v64  = uiA<<12;
@@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
 softfloat_normRoundPackToExtF80(
-     struct softfloat_state *state,
     bool sign,
     int_fast32_t exp,
     uint_fast64_t sig,
@@ -67,7 +66,7 @@ extFloat80_t
    }
    return
        softfloat_roundPackToExtF80(
-            state, sign, exp, sig, sigExtra, roundingPrecision );
+            sign, exp, sig, sigExtra, roundingPrecision );

 }

@@ -53,7 +53,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
 softfloat_propagateNaNExtF80UI(
-     struct softfloat_state *state,
     uint_fast16_t uiA64,
     uint_fast64_t uiA0,
     uint_fast16_t uiB64,
@@ -77,7 +76,7 @@ struct uint128
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
    if ( isSigNaNA | isSigNaNB ) {
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        if ( isSigNaNA ) {
            if ( isSigNaNB ) goto returnLargerMag;
            if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB;
@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 extFloat80_t
 softfloat_roundPackToExtF80(
-     struct softfloat_state *state,
     bool sign,
     int_fast32_t exp,
     uint_fast64_t sig,
@@ -60,7 +59,7 @@ extFloat80_t

    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
-    roundingMode = state->roundingMode;
+    roundingMode = softfloat_roundingMode;
    roundNearEven = (roundingMode == softfloat_round_near_even);
    if ( roundingPrecision == 80 ) goto precision80;
    if ( roundingPrecision == 64 ) {
@@ -88,15 +87,15 @@ extFloat80_t
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            isTiny =
-                   (state->detectTininess
+                   (softfloat_detectTininess
                        == softfloat_tininess_beforeRounding)
                || (exp < 0)
                || (sig <= (uint64_t) (sig + roundIncrement));
            sig = softfloat_shiftRightJam64( sig, 1 - exp );
            roundBits = sig & roundMask;
            if ( roundBits ) {
-                if ( isTiny ) softfloat_raiseFlags( state, softfloat_flag_underflow );
-                state->exceptionFlags |= softfloat_flag_inexact;
+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );
+                softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
                if ( roundingMode == softfloat_round_odd ) {
                    sig |= roundMask + 1;
@@ -122,7 +121,7 @@ extFloat80_t
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
    if ( roundBits ) {
-        state->exceptionFlags |= softfloat_flag_inexact;
+        softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) {
            sig = (sig & ~roundMask) | (roundMask + 1);
@@ -158,7 +157,7 @@ extFloat80_t
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            isTiny =
-                   (state->detectTininess
+                   (softfloat_detectTininess
                        == softfloat_tininess_beforeRounding)
                || (exp < 0)
                || ! doIncrement
@@ -169,8 +168,8 @@ extFloat80_t
            sig = sig64Extra.v;
            sigExtra = sig64Extra.extra;
            if ( sigExtra ) {
-                if ( isTiny ) softfloat_raiseFlags( state, softfloat_flag_underflow );
-                state->exceptionFlags |= softfloat_flag_inexact;
+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );
+                softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
                if ( roundingMode == softfloat_round_odd ) {
                    sig |= 1;
@@ -208,7 +207,7 @@ extFloat80_t
            roundMask = 0;
 overflow:
            softfloat_raiseFlags(
-                state, softfloat_flag_overflow | softfloat_flag_inexact );
+                softfloat_flag_overflow | softfloat_flag_inexact );
            if (
                   roundNearEven
                || (roundingMode == softfloat_round_near_maxMag)
@@ -227,7 +226,7 @@ extFloat80_t
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
    if ( sigExtra ) {
-        state->exceptionFlags |= softfloat_flag_inexact;
+        softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) {
            sig |= 1;
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 float32_t
- softfloat_roundPackToF32( struct softfloat_state *state, bool sign, int_fast16_t exp, uint_fast32_t sig )
+ softfloat_roundPackToF32( bool sign, int_fast16_t exp, uint_fast32_t sig )
 {
    uint_fast8_t roundingMode;
    bool roundNearEven;
@@ -53,7 +53,7 @@ float32_t

    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
-    roundingMode = state->roundingMode;
+    roundingMode = softfloat_roundingMode;
    roundNearEven = (roundingMode == softfloat_round_near_even);
    roundIncrement = 0x40;
    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {
@@ -71,19 +71,19 @@ float32_t
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            isTiny =
-                (state->detectTininess == softfloat_tininess_beforeRounding)
+                (softfloat_detectTininess == softfloat_tininess_beforeRounding)
                    || (exp < -1) || (sig + roundIncrement < 0x80000000);
            sig = softfloat_shiftRightJam32( sig, -exp );
            exp = 0;
            roundBits = sig & 0x7F;
            if ( isTiny && roundBits ) {
-                softfloat_raiseFlags( state, softfloat_flag_underflow );
+                softfloat_raiseFlags( softfloat_flag_underflow );
            }
        } else if ( (0xFD < exp) || (0x80000000 <= sig + roundIncrement) ) {
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            softfloat_raiseFlags(
-                state, softfloat_flag_overflow | softfloat_flag_inexact );
+                softfloat_flag_overflow | softfloat_flag_inexact );
            uiZ = packToF32UI( sign, 0xFF, 0 ) - ! roundIncrement;
            goto uiZ;
        }
@@ -92,7 +92,7 @@ float32_t
    *------------------------------------------------------------------------*/
    sig = (sig + roundIncrement)>>7;
    if ( roundBits ) {
-        state->exceptionFlags |= softfloat_flag_inexact;
+        softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) {
            sig |= 1;
@@ -42,7 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 FEXCORE_PRESERVE_ALL_ATTR
 float64_t
- softfloat_roundPackToF64( struct softfloat_state *state, bool sign, int_fast16_t exp, uint_fast64_t sig )
+ softfloat_roundPackToF64( bool sign, int_fast16_t exp, uint_fast64_t sig )
 {
    uint_fast8_t roundingMode;
    bool roundNearEven;
@@ -53,7 +53,7 @@ float64_t

    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
-    roundingMode = state->roundingMode;
+    roundingMode = softfloat_roundingMode;
    roundNearEven = (roundingMode == softfloat_round_near_even);
    roundIncrement = 0x200;
    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {
@@ -71,14 +71,14 @@ float64_t
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            isTiny =
-                (state->detectTininess == softfloat_tininess_beforeRounding)
+                (softfloat_detectTininess == softfloat_tininess_beforeRounding)
                    || (exp < -1)
                    || (sig + roundIncrement < UINT64_C( 0x8000000000000000 ));
            sig = softfloat_shiftRightJam64( sig, -exp );
            exp = 0;
            roundBits = sig & 0x3FF;
            if ( isTiny && roundBits ) {
-                softfloat_raiseFlags( state, softfloat_flag_underflow );
+                softfloat_raiseFlags( softfloat_flag_underflow );
            }
        } else if (
            (0x7FD < exp)
@@ -87,7 +87,7 @@ float64_t
            /*----------------------------------------------------------------
            *----------------------------------------------------------------*/
            softfloat_raiseFlags(
-                state, softfloat_flag_overflow | softfloat_flag_inexact );
+                softfloat_flag_overflow | softfloat_flag_inexact );
            uiZ = packToF64UI( sign, 0x7FF, 0 ) - ! roundIncrement;
            goto uiZ;
        }
@@ -96,7 +96,7 @@ float64_t
    *------------------------------------------------------------------------*/
    sig = (sig + roundIncrement)>>10;
    if ( roundBits ) {
-        state->exceptionFlags |= softfloat_flag_inexact;
+        softfloat_exceptionFlags |= softfloat_flag_inexact;
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) {
            sig |= 1;
@@ -44,7 +44,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 int_fast32_t
 softfloat_roundToI32(
-     struct softfloat_state *state, bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact )
+     bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact )
 {
    uint_fast16_t roundIncrement, roundBits;
    uint_fast32_t sig32;
@@ -86,13 +86,13 @@ int_fast32_t
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) z |= 1;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
    }
    return z;
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    return sign ? i32_fromNegOverflow : i32_fromPosOverflow;

 }
@@ -44,7 +44,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 FEXCORE_PRESERVE_ALL_ATTR
 int_fast64_t
 softfloat_roundToI64(
-     struct softfloat_state *state,
     bool sign,
     uint_fast64_t sig,
     uint_fast64_t sigExtra,
@@ -90,13 +89,13 @@ int_fast64_t
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) z |= 1;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
    }
    return z;
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    return sign ? i64_fromNegOverflow : i64_fromPosOverflow;

 }
@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 uint_fast64_t
 softfloat_roundToUI64(
-     struct softfloat_state *state,
     bool sign,
     uint_fast64_t sig,
     uint_fast64_t sigExtra,
@@ -85,13 +84,13 @@ uint_fast64_t
 #ifdef SOFTFLOAT_ROUND_ODD
        if ( roundingMode == softfloat_round_odd ) sig |= 1;
 #endif
-        if ( exact ) state->exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
    }
    return sig;
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 invalid:
-    softfloat_raiseFlags( state, softfloat_flag_invalid );
+    softfloat_raiseFlags( softfloat_flag_invalid );
    return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

 }
@@ -43,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 extFloat80_t
 softfloat_subMagsExtF80(
-     struct softfloat_state *state,
     uint_fast16_t uiA64,
     uint_fast64_t uiA0,
     uint_fast16_t uiB64,
@@ -78,7 +77,7 @@ extFloat80_t
        if ( (sigA | sigB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
            goto propagateNaN;
        }
-        softfloat_raiseFlags( state, softfloat_flag_invalid );
+        softfloat_raiseFlags( softfloat_flag_invalid );
        uiZ64 = defaultNaNExtF80UI64;
        uiZ0  = defaultNaNExtF80UI0;
        goto uiZ;
@@ -91,7 +90,7 @@ extFloat80_t
    if ( sigB < sigA ) goto aBigger;
    if ( sigA < sigB ) goto bBigger;
    uiZ64 =
-        packToExtF80UI64( (state->roundingMode == softfloat_round_min), 0 );
+        packToExtF80UI64( (softfloat_roundingMode == softfloat_round_min), 0 );
    uiZ0 = 0;
    goto uiZ;
    /*------------------------------------------------------------------------
@@ -143,11 +142,11 @@ extFloat80_t
 normRoundPack:
    return
        softfloat_normRoundPackToExtF80(
-            state, signZ, expZ, sig128.v64, sig128.v0, state->roundingPrecision );
+            signZ, expZ, sig128.v64, sig128.v0, extF80_roundingPrecision );
    /*------------------------------------------------------------------------
    *------------------------------------------------------------------------*/
 propagateNaN:
-    uiZ = softfloat_propagateNaNExtF80UI( state, uiA64, uiA0, uiB64, uiB0 );
+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
    uiZ64 = uiZ.v64;
    uiZ0  = uiZ.v0;
 uiZ:
@@ -50,11 +50,50 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <stdint.h>
 #include "softfloat_types.h"

+#ifndef THREAD_LOCAL
+#define THREAD_LOCAL
+#endif
+
+/*----------------------------------------------------------------------------
+| Software floating-point underflow tininess-detection mode.
+*----------------------------------------------------------------------------*/
+extern THREAD_LOCAL uint_fast8_t softfloat_detectTininess;
+enum {
+    softfloat_tininess_beforeRounding = 0,
+    softfloat_tininess_afterRounding  = 1
+};
+
+/*----------------------------------------------------------------------------
+| Software floating-point rounding mode.  (Mode "odd" is supported only if
+| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.)
+*----------------------------------------------------------------------------*/
+extern THREAD_LOCAL uint_fast8_t softfloat_roundingMode;
+enum {
+    softfloat_round_near_even   = 0,
+    softfloat_round_minMag      = 1,
+    softfloat_round_min         = 2,
+    softfloat_round_max         = 3,
+    softfloat_round_near_maxMag = 4,
+    softfloat_round_odd         = 6
+};
+
+/*----------------------------------------------------------------------------
+| Software floating-point exception flags.
+*----------------------------------------------------------------------------*/
+extern THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags;
+enum {
+    softfloat_flag_inexact   =  1,
+    softfloat_flag_underflow =  2,
+    softfloat_flag_overflow  =  4,
+    softfloat_flag_infinite  =  8,
+    softfloat_flag_invalid   = 16
+};
+
 /*----------------------------------------------------------------------------
 | Routine to raise any or all of the software floating-point exception flags.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_raiseFlags( struct softfloat_state *, uint_fast8_t );
+void softfloat_raiseFlags( uint_fast8_t );

 /*----------------------------------------------------------------------------
 | Integer-to-floating-point conversion routines.
@@ -148,7 +187,7 @@ float16_t f32_to_f16( float32_t );
 float64_t f32_to_f64( float32_t );
 #ifdef SOFTFLOAT_FAST_INT64
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f32_to_extF80( struct softfloat_state *, float32_t );
+extFloat80_t f32_to_extF80( float32_t );
 float128_t f32_to_f128( float32_t );
 #endif
 void f32_to_extF80M( float32_t, extFloat80_t * );
@@ -184,7 +223,7 @@ float16_t f64_to_f16( float64_t );
 float32_t f64_to_f32( float64_t );
 #ifdef SOFTFLOAT_FAST_INT64
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f64_to_extF80( struct softfloat_state *, float64_t );
+extFloat80_t f64_to_extF80( float64_t );
 float128_t f64_to_f128( float64_t );
 #endif
 void f64_to_extF80M( float64_t, extFloat80_t * );
@@ -205,47 +244,53 @@ bool f64_le_quiet( float64_t, float64_t );
 bool f64_lt_quiet( float64_t, float64_t );
 bool f64_isSignalingNaN( float64_t );

+/*----------------------------------------------------------------------------
+| Rounding precision for 80-bit extended double-precision floating-point.
+| Valid values are 32, 64, and 80.
+*----------------------------------------------------------------------------*/
+extern THREAD_LOCAL uint_fast8_t extF80_roundingPrecision;
+
 /*----------------------------------------------------------------------------
 | 80-bit extended double-precision floating-point operations.
 *----------------------------------------------------------------------------*/
 #ifdef SOFTFLOAT_FAST_INT64
 uint_fast32_t extF80_to_ui32( extFloat80_t, uint_fast8_t, bool );
 FEXCORE_PRESERVE_ALL_ATTR
-uint_fast64_t extF80_to_ui64( struct softfloat_state *, extFloat80_t, uint_fast8_t, bool );
+uint_fast64_t extF80_to_ui64( extFloat80_t, uint_fast8_t, bool );
 FEXCORE_PRESERVE_ALL_ATTR
-int_fast32_t extF80_to_i32( struct softfloat_state *, extFloat80_t, uint_fast8_t, bool );
+int_fast32_t extF80_to_i32( extFloat80_t, uint_fast8_t, bool );
 FEXCORE_PRESERVE_ALL_ATTR
-int_fast64_t extF80_to_i64( struct softfloat_state *, extFloat80_t, uint_fast8_t, bool );
+int_fast64_t extF80_to_i64( extFloat80_t, uint_fast8_t, bool );
 uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t, bool );
 uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t, bool );
 int_fast32_t extF80_to_i32_r_minMag( extFloat80_t, bool );
 int_fast64_t extF80_to_i64_r_minMag( extFloat80_t, bool );
 float16_t extF80_to_f16( extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-float32_t extF80_to_f32( struct softfloat_state *, extFloat80_t );
+float32_t extF80_to_f32( extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-float64_t extF80_to_f64( struct softfloat_state *, extFloat80_t );
+float64_t extF80_to_f64( extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-float128_t extF80_to_f128( struct softfloat_state *, extFloat80_t );
+float128_t extF80_to_f128( extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_roundToInt( struct softfloat_state *, extFloat80_t, uint_fast8_t, bool );
+extFloat80_t extF80_roundToInt( extFloat80_t, uint_fast8_t, bool );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_add( struct softfloat_state *, extFloat80_t, extFloat80_t );
+extFloat80_t extF80_add( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sub( struct softfloat_state *, extFloat80_t, extFloat80_t );
+extFloat80_t extF80_sub( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_mul( struct softfloat_state *, extFloat80_t, extFloat80_t );
+extFloat80_t extF80_mul( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_div( struct softfloat_state *, extFloat80_t, extFloat80_t );
+extFloat80_t extF80_div( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_rem( struct softfloat_state *, extFloat80_t, extFloat80_t );
+extFloat80_t extF80_rem( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t extF80_sqrt( struct softfloat_state *, extFloat80_t );
+extFloat80_t extF80_sqrt( extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_eq( struct softfloat_state *, extFloat80_t, extFloat80_t );
+bool extF80_eq( extFloat80_t, extFloat80_t );
 bool extF80_le( extFloat80_t, extFloat80_t );
 FEXCORE_PRESERVE_ALL_ATTR
-bool extF80_lt( struct softfloat_state *, extFloat80_t, extFloat80_t );
+bool extF80_lt( extFloat80_t, extFloat80_t );
 bool extF80_eq_signaling( extFloat80_t, extFloat80_t );
 bool extF80_le_quiet( extFloat80_t, extFloat80_t );
 bool extF80_lt_quiet( extFloat80_t, extFloat80_t );
@@ -296,7 +341,7 @@ float16_t f128_to_f16( float128_t );
 float32_t f128_to_f32( float128_t );
 float64_t f128_to_f64( float128_t );
 FEXCORE_PRESERVE_ALL_ATTR
-extFloat80_t f128_to_extF80( struct softfloat_state *, float128_t );
+extFloat80_t f128_to_extF80( float128_t );
 float128_t f128_roundToInt( float128_t, uint_fast8_t, bool );
 float128_t f128_add( float128_t, float128_t );
 float128_t f128_sub( float128_t, float128_t );
@@ -44,10 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 | should be simply `softfloat_exceptionFlags |= flags;'.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_raiseFlags( struct softfloat_state *state, uint_fast8_t flags )
+void softfloat_raiseFlags( uint_fast8_t flags )
 {

-    state->exceptionFlags |= flags;
+    softfloat_exceptionFlags |= flags;

 }

@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California.  All Rights Reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifndef THREAD_LOCAL
+#define THREAD_LOCAL
+#endif
+
+THREAD_LOCAL uint_fast8_t softfloat_roundingMode = softfloat_round_near_even;
+THREAD_LOCAL uint_fast8_t softfloat_detectTininess = init_detectTininess;
+THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags = 0;
+
+THREAD_LOCAL uint_fast8_t extF80_roundingPrecision = 80;
+
@@ -77,50 +77,5 @@ struct extFloat80M { uint16_t signExp; uint64_t signif; };
 *----------------------------------------------------------------------------*/
 typedef struct extFloat80M extFloat80_t;

-enum {
-    softfloat_tininess_beforeRounding = 0,
-    softfloat_tininess_afterRounding  = 1
-};
-
-enum {
-    softfloat_round_near_even   = 0,
-    softfloat_round_minMag      = 1,
-    softfloat_round_min         = 2,
-    softfloat_round_max         = 3,
-    softfloat_round_near_maxMag = 4,
-    softfloat_round_odd         = 6
-};
-
-enum {
-    softfloat_flag_inexact   =  1,
-    softfloat_flag_underflow =  2,
-    softfloat_flag_overflow  =  4,
-    softfloat_flag_infinite  =  8,
-    softfloat_flag_invalid   = 16
-};
-
-struct softfloat_state {
-/*----------------------------------------------------------------------------
-| Software floating-point underflow tininess-detection mode.
-*----------------------------------------------------------------------------*/
-uint8_t detectTininess; /* = init_detectTininess */
-/*----------------------------------------------------------------------------
-| Software floating-point rounding mode.  (Mode "odd" is supported only if
-| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.)
-*----------------------------------------------------------------------------*/
-uint8_t roundingMode; /* = softfloat_round_near_even */
-
-/*----------------------------------------------------------------------------
-| Software floating-point exception flags.
-*----------------------------------------------------------------------------*/
-uint8_t exceptionFlags; /* = 0 */
-
-/*----------------------------------------------------------------------------
-| Rounding precision for 80-bit extended double-precision floating-point.
-| Valid values are 32, 64, and 80.
-*----------------------------------------------------------------------------*/
-uint8_t roundingPrecision; /* = 80 */
-};
-
 #endif

@@ -136,7 +136,7 @@ uint_fast16_t
 | exception is raised.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f32UIToCommonNaN( struct softfloat_state *, uint_fast32_t uiA, struct commonNaN *zPtr );
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );

 /*----------------------------------------------------------------------------
 | Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
@@ -173,7 +173,7 @@ uint_fast32_t
 | exception is raised.
 *----------------------------------------------------------------------------*/
 FEXCORE_PRESERVE_ALL_ATTR
-void softfloat_f64UIToCommonNaN( struct softfloat_state *, uint_fast64_t uiA, struct commonNaN *zPtr );
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );

 /*----------------------------------------------------------------------------
 | Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
@@ -222,7 +222,7 @@ uint_fast64_t
 FEXCORE_PRESERVE_ALL_ATTR
 void
 softfloat_extF80UIToCommonNaN(
-     struct softfloat_state *, uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

 /*----------------------------------------------------------------------------
 | Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
@@ -244,7 +244,6 @@ struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
 FEXCORE_PRESERVE_ALL_ATTR
 struct uint128
 softfloat_propagateNaNExtF80UI(
-     struct softfloat_state *,
     uint_fast16_t uiA64,
     uint_fast64_t uiA0,
     uint_fast16_t uiB64,
@@ -275,7 +274,7 @@ struct uint128
 FEXCORE_PRESERVE_ALL_ATTR
 void
 softfloat_f128UIToCommonNaN(
-     struct softfloat_state *, uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

 /*----------------------------------------------------------------------------
 | Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
@@ -1,10 +1,10 @@
 // SPDX-License-Identifier: MIT
 #pragma once

+#include <FEXCore/Utils/BitUtils.h>
 #include <FEXCore/Utils/LogManager.h>
 #include <FEXCore/fextl/sstream.h>
 #include <FEXCore/fextl/string.h>
-#include <FEXHeaderUtils/BitUtils.h>

 #include <cmath>
 #include <cstring>
@@ -45,13 +45,13 @@ struct FEX_PACKED X80SoftFloat {
  uint16_t Exponent    : 15;
  uint16_t Sign        : 1;

-  X80SoftFloat() {
-    memset(this, 0, sizeof(*this));
-  }
+  X80SoftFloat() { memset(this, 0, sizeof(*this)); }
  X80SoftFloat(uint16_t _Sign, uint16_t _Exponent, uint64_t _Significand)
    : Significand {_Significand}
    , Exponent {_Exponent}
-    , Sign {_Sign} {}
+    , Sign {_Sign}
+    {
+  }

  fextl::string str() const {
    fextl::ostringstream string;
@@ -63,90 +63,99 @@ struct FEX_PACKED X80SoftFloat {
  }

  // Ops
-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FADD(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FADD(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
    faddp;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_add(state, lhs, rhs);
+    return extF80_add(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FSUB(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FSUB(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
    fsubp;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_sub(state, lhs, rhs);
+    return extF80_sub(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FMUL(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FMUL(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
    fmulp;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_mul(state, lhs, rhs);
+    return extF80_mul(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FDIV(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FDIV(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
    fdivp;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_div(state, lhs, rhs);
+    return extF80_div(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FREM(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FREM(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #if defined(DEBUG_X86_FLOAT)
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
@@ -154,20 +163,22 @@ struct FEX_PACKED X80SoftFloat {
    fstpt %[result];
    ffreep %%st(0);
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_rem(state, lhs, rhs);
+    return extF80_rem(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FREM1(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FREM1(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
 #if defined(DEBUG_X86_FLOAT)
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
@@ -175,37 +186,41 @@ struct FEX_PACKED X80SoftFloat {
    fstpt %[result];
    ffreep %%st(0);
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    return extF80_rem(state, lhs, rhs);
+    return extF80_rem(lhs, rhs);
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FRNDINT(softfloat_state* state, const X80SoftFloat& lhs) {
-    return extF80_roundToInt(state, lhs, state->roundingMode, false);
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FRNDINT(X80SoftFloat const &lhs) {
+    return extF80_roundToInt(lhs, softfloat_roundingMode, false);
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FRNDINT(softfloat_state* state, const X80SoftFloat& lhs, uint_fast8_t RoundMode) {
-    return extF80_roundToInt(state, lhs, RoundMode, false);
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FRNDINT(X80SoftFloat const &lhs, uint_fast8_t RoundMode) {
+    return extF80_roundToInt(lhs, RoundMode, false);
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FXTRACT_SIG(const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FXTRACT_SIG(X80SoftFloat const &lhs) {
 #if defined(DEBUG_X86_FLOAT)
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fxtract;
    fstpt %[result];
    ffreep %%st(0);
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st", "st(1)");

    return Result;
 #else
@@ -216,19 +231,20 @@ struct FEX_PACKED X80SoftFloat {
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FXTRACT_EXP(const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FXTRACT_EXP(X80SoftFloat const &lhs) {
 #if defined(DEBUG_X86_FLOAT)
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fxtract;
    ffreep %%st(0);
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st", "st(1)");

    return Result;
 #else
@@ -237,18 +253,19 @@ struct FEX_PACKED X80SoftFloat {
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static void
-  FCMP(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs, bool* eq, bool* lt, bool* nan) {
-    *eq = extF80_eq(state, lhs, rhs);
-    *lt = extF80_lt(state, lhs, rhs);
+  FEXCORE_PRESERVE_ALL_ATTR
+  static void FCMP(X80SoftFloat const &lhs, X80SoftFloat const &rhs, bool *eq, bool *lt, bool *nan) {
+    *eq = extF80_eq(lhs, rhs);
+    *lt = extF80_lt(lhs, rhs);
    *nan = IsNan(lhs) || IsNan(rhs);
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FSCALE(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FSCALE(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
    WARN_ONCE_FMT("x87: Application used FSCALE which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st1
    fldt %[lhs]; # st0
@@ -256,223 +273,240 @@ struct FEX_PACKED X80SoftFloat {
    fstpt %[result];
    ffreep %%st(0);
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    X80SoftFloat Int = FRNDINT(state, rhs, softfloat_round_minMag);
-    LIBRARY_PRECISION Src2_d = Int.ToFMax(state);
+    X80SoftFloat Int = FRNDINT(rhs, softfloat_round_minMag);
+    LIBRARY_PRECISION Src2_d = Int;
    Src2_d = exp2l(Src2_d);
-    X80SoftFloat Src2_X80(state, Src2_d);
-    X80SoftFloat Result = extF80_mul(state, lhs, Src2_X80);
+    X80SoftFloat Src2_X80 = Src2_d;
+    X80SoftFloat Result = extF80_mul(lhs, Src2_X80);
    return Result;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat F2XM1(softfloat_state* state, const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat F2XM1(X80SoftFloat const &lhs) {
    WARN_ONCE_FMT("x87: Application used F2XM1 which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    f2xm1; # st0 = 2^st(0) - 1
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st");

    return Result;
 #else
-    LIBRARY_PRECISION Src1_d = lhs.ToFMax(state);
+    LIBRARY_PRECISION Src1_d = lhs;
    LIBRARY_PRECISION Result = exp2l(Src1_d);
    Result -= 1.0;
-    return X80SoftFloat(state, Result);
+    return Result;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FYL2X(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FYL2X(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
    WARN_ONCE_FMT("x87: Application used FYL2X which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[rhs]; # st(1)
    fldt %[lhs]; # st(0)
    fyl2x; # st(1) * log2l(st(0))
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    LIBRARY_PRECISION Src1_d = lhs.ToFMax(state);
-    LIBRARY_PRECISION Src2_d = rhs.ToFMax(state);
+    LIBRARY_PRECISION Src1_d = lhs;
+    LIBRARY_PRECISION Src2_d = rhs;
    LIBRARY_PRECISION Tmp = Src2_d * log2l(Src1_d);
-    return X80SoftFloat(state, Tmp);
+    return Tmp;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FATAN(softfloat_state* state, const X80SoftFloat& lhs, const X80SoftFloat& rhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FATAN(X80SoftFloat const &lhs, X80SoftFloat const &rhs) {
    WARN_ONCE_FMT("x87: Application used FATAN which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs];
    fldt %[rhs];
    fpatan;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs), [rhs] "m"(rhs)
-        : "st", "st(1)");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    , [rhs] "m" (rhs)
+    : "st", "st(1)");

    return Result;
 #else
-    LIBRARY_PRECISION Src1_d = lhs.ToFMax(state);
-    LIBRARY_PRECISION Src2_d = rhs.ToFMax(state);
+    LIBRARY_PRECISION Src1_d = lhs;
+    LIBRARY_PRECISION Src2_d = rhs;
    LIBRARY_PRECISION Tmp = atan2l(Src1_d, Src2_d);
-    return X80SoftFloat(state, Tmp);
+    return Tmp;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FTAN(softfloat_state* state, const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FTAN(X80SoftFloat const &lhs) {
    WARN_ONCE_FMT("x87: Application used FTAN which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fptan;
    ffreep %%st(0);
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st");

    return Result;
 #else
-    LIBRARY_PRECISION Src_d = lhs.ToFMax(state);
+    LIBRARY_PRECISION Src_d = lhs;
    Src_d = tanl(Src_d);
-    return X80SoftFloat(state, Src_d);
+    return Src_d;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FSIN(softfloat_state* state, const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FSIN(X80SoftFloat const &lhs) {
    WARN_ONCE_FMT("x87: Application used FSIN which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fsin;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st");

    return Result;
 #else
-    LIBRARY_PRECISION Src_d = lhs.ToFMax(state);
+    LIBRARY_PRECISION Src_d = lhs;
    Src_d = sinl(Src_d);
-    return X80SoftFloat(state, Src_d);
+    return Src_d;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FCOS(softfloat_state* state, const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FCOS(X80SoftFloat const &lhs) {
    WARN_ONCE_FMT("x87: Application used FCOS which may have accuracy problems");
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fcos;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st");

    return Result;
 #else
-    LIBRARY_PRECISION Src_d = lhs.ToFMax(state);
+    LIBRARY_PRECISION Src_d = lhs;
    Src_d = cosl(Src_d);
-    return X80SoftFloat(state, Src_d);
+    return Src_d;
 #endif
  }

-  FEXCORE_PRESERVE_ALL_ATTR static X80SoftFloat FSQRT(softfloat_state* state, const X80SoftFloat& lhs) {
+  FEXCORE_PRESERVE_ALL_ATTR
+  static X80SoftFloat FSQRT(X80SoftFloat const &lhs) {
 #ifdef DEBUG_X86_FLOAT
    BIGFLOAT Result;
-    asm(R"(
+    asm (R"(
    fninit;
    fldt %[lhs]; # st0
    fsqrt;
    fstpt %[result];
    )"
-        : [result] "=m"(Result)
-        : [lhs] "m"(lhs)
-        : "st");
+    : [result] "=m" (Result)
+    : [lhs] "m" (lhs)
+    : "st");

    return Result;
 #else
-    return extF80_sqrt(state, lhs);
+    return extF80_sqrt(lhs);
 #endif
  }

-  float ToF32(softfloat_state* state) const {
-    const float32_t Result = extF80_to_f32(state, *this);
+  operator float() const {
+    const float32_t Result = extF80_to_f32(*this);
    return FEXCore::BitCast<float>(Result);
  }

-  double ToF64(softfloat_state* state) const {
-    const float64_t Result = extF80_to_f64(state, *this);
+  operator double() const {
+    const float64_t Result = extF80_to_f64(*this);
    return FEXCore::BitCast<double>(Result);
  }

-  LIBRARY_PRECISION ToFMax(softfloat_state* state) const {
-#ifdef _WIN32
-    return ToF64(state);
-#else
+#ifndef _WIN32
+  operator BIGFLOAT() const {
 #if BIGFLOATSIZE == 16
-    const float128_t Result = extF80_to_f128(state, *this);
+    const float128_t Result = extF80_to_f128(*this);
    return FEXCore::BitCast<BIGFLOAT>(Result);
 #else
-    BIGFLOAT result {};
+    BIGFLOAT result{};
    memcpy(&result, this, sizeof(result));
    return result;
-#endif
 #endif
  }
+#endif

-  int16_t ToI16(softfloat_state* state) const {
-    auto rv = extF80_to_i32(state, *this, state->roundingMode, false);
-    if (rv > INT16_MAX || rv < INT16_MIN) {
-      ///< Indefinite value for 16-bit conversions.
+  operator int16_t() const {
+    auto rv = extF80_to_i32(*this, softfloat_roundingMode, false);
+    if (rv > INT16_MAX) {
+      return INT16_MAX;
+    } else if (rv < INT16_MIN) {
      return INT16_MIN;
    } else {
      return rv;
    }
  }

-  int32_t ToI32(softfloat_state* state) const {
-    return extF80_to_i32(state, *this, state->roundingMode, false);
+  operator int32_t() const {
+    return extF80_to_i32(*this, softfloat_roundingMode, false);
  }

-  int64_t ToI64(softfloat_state* state) const {
-    return extF80_to_i64(state, *this, state->roundingMode, false);
+  operator int64_t() const {
+    return extF80_to_i64(*this, softfloat_roundingMode, false);
  }

-  uint64_t ToUI64(softfloat_state* state) const {
-    return extF80_to_ui64(state, *this, state->roundingMode, false);
+  operator uint64_t() const {
+    return extF80_to_ui64(*this, softfloat_roundingMode, false);
+  }
+
+  void operator=(const float rhs) {
+    *this = f32_to_extF80(FEXCore::BitCast<float32_t>(rhs));
+  }
+
+  void operator=(const double rhs) {
+    *this = f64_to_extF80(FEXCore::BitCast<float64_t>(rhs));
  }

  void operator=(const int16_t rhs) {
@@ -503,18 +537,18 @@ struct FEX_PACKED X80SoftFloat {
    Sign = rhs.signExp >> 15;
  }

-  X80SoftFloat(softfloat_state* state, const float rhs) {
-    *this = f32_to_extF80(state, FEXCore::BitCast<float32_t>(rhs));
+  X80SoftFloat(const float rhs) {
+    *this = f32_to_extF80(FEXCore::BitCast<float32_t>(rhs));
  }

-  X80SoftFloat(softfloat_state* state, const double rhs) {
-    *this = f64_to_extF80(state, FEXCore::BitCast<float64_t>(rhs));
+  X80SoftFloat(const double rhs) {
+    *this = f64_to_extF80(FEXCore::BitCast<float64_t>(rhs));
  }

 #ifndef _WIN32
-  X80SoftFloat(softfloat_state* state, BIGFLOAT rhs) {
+  X80SoftFloat(BIGFLOAT rhs) {
 #if BIGFLOATSIZE == 16
-    *this = f128_to_extF80(state, FEXCore::BitCast<float128_t>(rhs));
+    *this = f128_to_extF80(FEXCore::BitCast<float128_t>(rhs));
 #else
    *this = FEXCore::BitCast<long double>(rhs);
 #endif
@@ -536,17 +570,19 @@ struct FEX_PACKED X80SoftFloat {
  }

  operator extFloat80_t() const {
-    extFloat80_t Result {};
+    extFloat80_t Result{};
    Result.signif = Significand;
    Result.signExp = Exponent | (Sign << 15);
    return Result;
  }

-  static bool IsNan(const X80SoftFloat& lhs) {
-    return (lhs.Exponent == 0x7FFF) && (lhs.Significand & IntegerBit) && (lhs.Significand & Bottom62Significand);
+  static bool IsNan(X80SoftFloat const &lhs) {
+    return (lhs.Exponent == 0x7FFF) &&
+      (lhs.Significand & IntegerBit) &&
+      (lhs.Significand & Bottom62Significand);
  }

-  static bool SignBit(const X80SoftFloat& lhs) {
+  static bool SignBit(X80SoftFloat const &lhs) {
    return lhs.Sign;
  }

@@ -7,51 +7,44 @@
 #include <optional>

 namespace FEXCore::StrConv {
-[[maybe_unused]]
-static bool Conv(std::string_view Value, bool* Result) {
-  *Result = std::strtoull(Value.data(), nullptr, 0);
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, bool *Result) {
+    *Result = std::strtoull(Value.data(), nullptr, 0);
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, uint8_t* Result) {
-  *Result = std::strtoul(Value.data(), nullptr, 0);
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, uint8_t *Result) {
+    *Result = std::strtoul(Value.data(), nullptr, 0);
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, uint16_t* Result) {
-  *Result = std::strtoul(Value.data(), nullptr, 0);
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, uint16_t *Result) {
+    *Result = std::strtoul(Value.data(), nullptr, 0);
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, uint32_t* Result) {
-  *Result = std::strtoul(Value.data(), nullptr, 0);
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, uint32_t *Result) {
+    *Result = std::strtoul(Value.data(), nullptr, 0);
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, int32_t* Result) {
-  *Result = std::strtol(Value.data(), nullptr, 0);
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, int32_t *Result) {
+    *Result = std::strtol(Value.data(), nullptr, 0);
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, uint64_t* Result) {
-  *Result = std::strtoull(Value.data(), nullptr, 0);
-  return true;
-}
-template<typename T, typename = std::enable_if<std::is_enum<T>::value, T>>
-[[maybe_unused]]
-static bool Conv(std::string_view Value, T* Result) {
-  *Result = static_cast<T>(std::stoull(Value.data(), nullptr, 0));
-  return true;
-}
+  [[maybe_unused]] static bool Conv(std::string_view Value, uint64_t *Result) {
+    *Result = std::strtoull(Value.data(), nullptr, 0);
+    return true;
+  }
+  template <typename T,
+    typename = std::enable_if<std::is_enum<T>::value, T>>
+  [[maybe_unused]] static bool Conv(std::string_view Value, T *Result) {
+    *Result = static_cast<T>(std::stoull(Value.data(), nullptr, 0));
+    return true;
+  }

-[[maybe_unused]]
-static bool Conv(std::string_view Value, fextl::string* Result) {
-  *Result = Value;
-  return true;
+  [[maybe_unused]] static bool Conv(std::string_view Value, fextl::string *Result) {
+    *Result = Value;
+    return true;
+  }
 }
-} // namespace FEXCore::StrConv
@@ -29,7 +29,7 @@
 #include <utility>

 namespace FEXCore::Context {
-class Context;
+  class Context;
 }

 namespace FEXCore::Config {
@@ -40,464 +40,482 @@ namespace DefaultValues {
 #define OPT_STRARRAY(group, enum, json, default) OPT_STR(group, enum, json, default)
 #define OPT_STRENUM(group, enum, json, default) const uint64_t P(enum) = FEXCore::ToUnderlying(P(default));
 #include <FEXCore/Config/ConfigValues.inl>
-} // namespace DefaultValues
-
-enum Paths {
-  PATH_DATA_DIR = 0,
-  PATH_CONFIG_DIR_LOCAL,
-  PATH_CONFIG_DIR_GLOBAL,
-  PATH_CONFIG_FILE_LOCAL,
-  PATH_CONFIG_FILE_GLOBAL,
-  PATH_CONFIG_TELEMETRY_FOLDER,
-  PATH_LAST,
-};
-static std::array<fextl::string, Paths::PATH_LAST> Paths;
-
-void SetDataDirectory(const std::string_view Path) {
-  Paths[PATH_DATA_DIR] = Path;
 }

-void SetConfigDirectory(const std::string_view Path, bool Global) {
-  Paths[PATH_CONFIG_DIR_LOCAL + Global] = Path;
-}
+  enum Paths {
+    PATH_DATA_DIR = 0,
+    PATH_CONFIG_DIR_LOCAL,
+    PATH_CONFIG_DIR_GLOBAL,
+    PATH_CONFIG_FILE_LOCAL,
+    PATH_CONFIG_FILE_GLOBAL,
+    PATH_LAST,
+  };
+  static std::array<fextl::string, Paths::PATH_LAST> Paths;

-void SetConfigFileLocation(const std::string_view Path, bool Global) {
-  Paths[PATH_CONFIG_FILE_LOCAL + Global] = Path;
-}
+  void SetDataDirectory(const std::string_view Path) {
+    Paths[PATH_DATA_DIR] = Path;
+  }

-const fextl::string& GetTelemetryDirectory() {
-  auto& Path = Paths[PATH_CONFIG_TELEMETRY_FOLDER];
-  if (Path.empty()) {
-    FEX_CONFIG_OPT(TelemetryDirectory, TELEMETRYDIRECTORY);
-    if (!TelemetryDirectory().empty()) {
-      Path = TelemetryDirectory;
-      Path += "/";
-    } else {
-      Path = Config::GetDataDirectory() + "Telemetry/";
+  void SetConfigDirectory(const std::string_view Path, bool Global) {
+    Paths[PATH_CONFIG_DIR_LOCAL + Global] = Path;
+  }
+
+  void SetConfigFileLocation(const std::string_view Path, bool Global) {
+    Paths[PATH_CONFIG_FILE_LOCAL + Global] = Path;
+  }
+
+  fextl::string const& GetDataDirectory() {
+    return Paths[PATH_DATA_DIR];
+  }
+
+  fextl::string const& GetConfigDirectory(bool Global) {
+    return Paths[PATH_CONFIG_DIR_LOCAL + Global];
+  }
+
+  fextl::string const& GetConfigFileLocation(bool Global) {
+    return Paths[PATH_CONFIG_FILE_LOCAL + Global];
+  }
+
+  fextl::string GetApplicationConfig(const std::string_view Program, bool Global) {
+    fextl::string ConfigFile = GetConfigDirectory(Global);
+
+    if (!Global &&
+        !FHU::Filesystem::Exists(ConfigFile) &&
+        !FHU::Filesystem::CreateDirectories(ConfigFile)) {
+      LogMan::Msg::DFmt("Couldn't create config directory: '{}'", ConfigFile);
+      // Let's go local in this case
+      return fextl::fmt::format("./{}.json", Program);
    }
-  }

-  return Path;
-}
+    ConfigFile += "AppConfig/";

-const fextl::string& GetDataDirectory() {
-  return Paths[PATH_DATA_DIR];
-}
-
-const fextl::string& GetConfigDirectory(bool Global) {
-  return Paths[PATH_CONFIG_DIR_LOCAL + Global];
-}
-
-const fextl::string& GetConfigFileLocation(bool Global) {
-  return Paths[PATH_CONFIG_FILE_LOCAL + Global];
-}
-
-fextl::string GetApplicationConfig(const std::string_view Program, bool Global) {
-  fextl::string ConfigFile = GetConfigDirectory(Global);
-
-  if (!Global && !FHU::Filesystem::Exists(ConfigFile) && !FHU::Filesystem::CreateDirectories(ConfigFile)) {
-    LogMan::Msg::DFmt("Couldn't create config directory: '{}'", ConfigFile);
-    // Let's go local in this case
-    return fextl::fmt::format("./{}.json", Program);
-  }
-
-  ConfigFile += "AppConfig/";
-
-  // Attempt to create the local folder if it doesn't exist
-  if (!Global && !FHU::Filesystem::Exists(ConfigFile) && !FHU::Filesystem::CreateDirectories(ConfigFile)) {
-    // Let's go local in this case
-    return fextl::fmt::format("./{}.json", Program);
-  }
-
-  return fextl::fmt::format("{}{}.json", ConfigFile, Program);
-}
-
-void SetConfig(FEXCore::Context::Context* CTX, ConfigOption Option, uint64_t Config) {}
-
-void SetConfig(FEXCore::Context::Context* CTX, ConfigOption Option, const fextl::string& Config) {}
-
-uint64_t GetConfig(FEXCore::Context::Context* CTX, ConfigOption Option) {
-  return 0;
-}
-
-static fextl::map<FEXCore::Config::LayerType, fextl::unique_ptr<FEXCore::Config::Layer>> ConfigLayers;
-static FEXCore::Config::Layer* Meta {};
-
-constexpr std::array<FEXCore::Config::LayerType, 10> LoadOrder = {
-  FEXCore::Config::LayerType::LAYER_GLOBAL_MAIN,      FEXCore::Config::LayerType::LAYER_MAIN,
-  FEXCore::Config::LayerType::LAYER_GLOBAL_STEAM_APP, FEXCore::Config::LayerType::LAYER_GLOBAL_APP,
-  FEXCore::Config::LayerType::LAYER_LOCAL_STEAM_APP,  FEXCore::Config::LayerType::LAYER_LOCAL_APP,
-  FEXCore::Config::LayerType::LAYER_ARGUMENTS,        FEXCore::Config::LayerType::LAYER_USER_OVERRIDE,
-  FEXCore::Config::LayerType::LAYER_ENVIRONMENT,      FEXCore::Config::LayerType::LAYER_TOP};
-
-Layer::Layer(const LayerType _Type)
-  : Type {_Type} {}
-
-Layer::~Layer() {}
-
-class MetaLayer final : public FEXCore::Config::Layer {
-public:
-  MetaLayer(const LayerType _Type)
-    : FEXCore::Config::Layer(_Type) {}
-  ~MetaLayer() {}
-  void Load();
-
-private:
-  void MergeConfigMap(const LayerOptions& Options);
-  void MergeEnvironmentVariables(const ConfigOption& Option, const LayerValue& Value);
-};
-
-void MetaLayer::Load() {
-  OptionMap.clear();
-
-  for (auto CurrentLayer = LoadOrder.begin(); CurrentLayer != LoadOrder.end(); ++CurrentLayer) {
-    auto it = ConfigLayers.find(*CurrentLayer);
-    if (it != ConfigLayers.end() && *CurrentLayer != Type) {
-      // Merge this layer's options to this layer
-      MergeConfigMap(it->second->GetOptionMap());
+    // Attempt to create the local folder if it doesn't exist
+    if (!Global &&
+        !FHU::Filesystem::Exists(ConfigFile) &&
+        !FHU::Filesystem::CreateDirectories(ConfigFile)) {
+      // Let's go local in this case
+      return fextl::fmt::format("./{}.json", Program);
    }
-  }
-}

-
-void MetaLayer::MergeEnvironmentVariables(const ConfigOption& Option, const LayerValue& Value) {
-  // Environment variables need a bit of additional work
-  // We want to merge the arrays rather than overwrite entirely
-  auto MetaEnvironment = OptionMap.find(Option);
-  if (MetaEnvironment == OptionMap.end()) {
-    // Doesn't exist, just insert
-    OptionMap.insert_or_assign(Option, Value);
-    return;
+    return fextl::fmt::format("{}{}.json", ConfigFile, Program);
  }

-  // If an environment variable exists in both current meta and in the incoming layer then the meta layer value is overwritten
-  fextl::unordered_map<fextl::string, fextl::string> LookupMap;
-  const auto AddToMap = [&LookupMap](const FEXCore::Config::LayerValue& Value) {
-    for (const auto& EnvVar : Value) {
-      const auto ItEq = EnvVar.find_first_of('=');
-      if (ItEq == fextl::string::npos) {
-        // Broken environment variable
-        // Skip
-        continue;
-      }
-      auto Key = fextl::string(EnvVar.begin(), EnvVar.begin() + ItEq);
-      auto Value = fextl::string(EnvVar.begin() + ItEq + 1, EnvVar.end());
+  void SetConfig(FEXCore::Context::Context *CTX, ConfigOption Option, uint64_t Config) {
+  }

-      // Add the key to the map, overwriting whatever previous value was there
-      LookupMap.insert_or_assign(std::move(Key), std::move(Value));
-    }
+  void SetConfig(FEXCore::Context::Context *CTX, ConfigOption Option, fextl::string const &Config) {
+  }
+
+  uint64_t GetConfig(FEXCore::Context::Context *CTX, ConfigOption Option) {
+    return 0;
+  }
+
+  static fextl::map<FEXCore::Config::LayerType, fextl::unique_ptr<FEXCore::Config::Layer>> ConfigLayers;
+  static FEXCore::Config::Layer *Meta{};
+
+  constexpr std::array<FEXCore::Config::LayerType, 9> LoadOrder = {
+    FEXCore::Config::LayerType::LAYER_GLOBAL_MAIN,
+    FEXCore::Config::LayerType::LAYER_MAIN,
+    FEXCore::Config::LayerType::LAYER_GLOBAL_STEAM_APP,
+    FEXCore::Config::LayerType::LAYER_GLOBAL_APP,
+    FEXCore::Config::LayerType::LAYER_LOCAL_STEAM_APP,
+    FEXCore::Config::LayerType::LAYER_LOCAL_APP,
+    FEXCore::Config::LayerType::LAYER_ARGUMENTS,
+    FEXCore::Config::LayerType::LAYER_ENVIRONMENT,
+    FEXCore::Config::LayerType::LAYER_TOP
  };

-  AddToMap(MetaEnvironment->second);
-  AddToMap(Value);
-
-  // Now with the two layers merged in the map
-  // Add all the values to the option
-  Erase(Option);
-  for (auto& Val : LookupMap) {
-    // Set will emplace multiple options in to its list
-    Set(Option, Val.first + "=" + Val.second);
+  Layer::Layer(const LayerType _Type)
+    : Type {_Type} {
  }
-}

-void MetaLayer::MergeConfigMap(const LayerOptions& Options) {
-  // Insert this layer's options, overlaying previous options that exist here
-  for (auto& it : Options) {
-    if (it.first == FEXCore::Config::ConfigOption::CONFIG_ENV || it.first == FEXCore::Config::ConfigOption::CONFIG_HOSTENV) {
-      MergeEnvironmentVariables(it.first, it.second);
-    } else {
-      OptionMap.insert_or_assign(it.first, it.second);
+  Layer::~Layer() {
+  }
+
+  class MetaLayer final : public FEXCore::Config::Layer {
+  public:
+    MetaLayer(const LayerType _Type)
+      : FEXCore::Config::Layer (_Type) {
    }
-  }
-}
-
-void Initialize() {
-  AddLayer(fextl::make_unique<MetaLayer>(FEXCore::Config::LayerType::LAYER_TOP));
-  Meta = ConfigLayers.begin()->second.get();
-}
-
-void Shutdown() {
-  ConfigLayers.clear();
-  Meta = nullptr;
-}
-
-void Load() {
-  for (auto CurrentLayer = LoadOrder.begin(); CurrentLayer != LoadOrder.end(); ++CurrentLayer) {
-    auto it = ConfigLayers.find(*CurrentLayer);
-    if (it != ConfigLayers.end()) {
-      it->second->Load();
+    ~MetaLayer() {
    }
-  }
-}
+    void Load();

-fextl::string ExpandPath(const fextl::string& ContainerPrefix, fextl::string PathName) {
-  if (PathName.empty()) {
-    return {};
+  private:
+    void MergeConfigMap(const LayerOptions &Options);
+    void MergeEnvironmentVariables(ConfigOption const &Option, LayerValue const &Value);
+  };
+
+  void MetaLayer::Load() {
+    OptionMap.clear();
+
+    for (auto CurrentLayer = LoadOrder.begin(); CurrentLayer != LoadOrder.end(); ++CurrentLayer) {
+      auto it = ConfigLayers.find(*CurrentLayer);
+      if (it != ConfigLayers.end() && *CurrentLayer != Type) {
+        // Merge this layer's options to this layer
+        MergeConfigMap(it->second->GetOptionMap());
+      }
+    }
  }


-  // Expand home if it exists
-  if (FHU::Filesystem::IsRelative(PathName)) {
-    fextl::string Home = getenv("HOME") ?: "";
-    // Home expansion only works if it is the first character
-    // This matches bash behaviour
-    if (PathName.at(0) == '~') {
-      PathName.replace(0, 1, Home);
-      return PathName;
+  void MetaLayer::MergeEnvironmentVariables(ConfigOption const &Option, LayerValue const &Value) {
+    // Environment variables need a bit of additional work
+    // We want to merge the arrays rather than overwrite entirely
+    auto MetaEnvironment = OptionMap.find(Option);
+    if (MetaEnvironment == OptionMap.end()) {
+      // Doesn't exist, just insert
+      OptionMap.insert_or_assign(Option, Value);
+      return;
    }

-    // Expand relative path to absolute
-    char ExistsTempPath[PATH_MAX];
-    char* RealPath = FHU::Filesystem::Absolute(PathName.c_str(), ExistsTempPath);
-    if (RealPath) {
-      PathName = RealPath;
+    // If an environment variable exists in both current meta and in the incoming layer then the meta layer value is overwritten
+    fextl::unordered_map<fextl::string, fextl::string> LookupMap;
+    const auto AddToMap = [&LookupMap](FEXCore::Config::LayerValue const &Value) {
+      for (const auto &EnvVar : Value) {
+        const auto ItEq = EnvVar.find_first_of('=');
+        if (ItEq == fextl::string::npos) {
+          // Broken environment variable
+          // Skip
+          continue;
+        }
+        auto Key = fextl::string(EnvVar.begin(), EnvVar.begin() + ItEq);
+        auto Value = fextl::string(EnvVar.begin() + ItEq + 1, EnvVar.end());
+
+        // Add the key to the map, overwriting whatever previous value was there
+        LookupMap.insert_or_assign(std::move(Key), std::move(Value));
+      }
+    };
+
+    AddToMap(MetaEnvironment->second);
+    AddToMap(Value);
+
+    // Now with the two layers merged in the map
+    // Add all the values to the option
+    Erase(Option);
+    for (auto &Val : LookupMap) {
+      // Set will emplace multiple options in to its list
+      Set(Option, Val.first + "=" + Val.second);
+    }
+  }
+
+  void MetaLayer::MergeConfigMap(const LayerOptions &Options) {
+    // Insert this layer's options, overlaying previous options that exist here
+    for (auto &it : Options) {
+      if (it.first == FEXCore::Config::ConfigOption::CONFIG_ENV ||
+          it.first == FEXCore::Config::ConfigOption::CONFIG_HOSTENV) {
+        MergeEnvironmentVariables(it.first, it.second);
+      }
+      else {
+        OptionMap.insert_or_assign(it.first, it.second);
+      }
+    }
+  }
+
+  void Initialize() {
+    AddLayer(fextl::make_unique<MetaLayer>(FEXCore::Config::LayerType::LAYER_TOP));
+    Meta = ConfigLayers.begin()->second.get();
+  }
+
+  void Shutdown() {
+    ConfigLayers.clear();
+    Meta = nullptr;
+  }
+
+  void Load() {
+    for (auto CurrentLayer = LoadOrder.begin(); CurrentLayer != LoadOrder.end(); ++CurrentLayer) {
+      auto it = ConfigLayers.find(*CurrentLayer);
+      if (it != ConfigLayers.end()) {
+        it->second->Load();
+      }
+    }
+  }
+
+  fextl::string ExpandPath(fextl::string const &ContainerPrefix, fextl::string PathName) {
+    if (PathName.empty()) {
+      return {};
    }

-    // Only return if it exists
-    if (FHU::Filesystem::Exists(PathName)) {
-      return PathName;
+
+    // Expand home if it exists
+    if (FHU::Filesystem::IsRelative(PathName)) {
+      fextl::string Home = getenv("HOME") ?: "";
+      // Home expansion only works if it is the first character
+      // This matches bash behaviour
+      if (PathName.at(0) == '~') {
+        PathName.replace(0, 1, Home);
+        return PathName;
+      }
+
+      // Expand relative path to absolute
+      char ExistsTempPath[PATH_MAX];
+      char *RealPath = FHU::Filesystem::Absolute(PathName.c_str(), ExistsTempPath);
+      if (RealPath) {
+        PathName = RealPath;
+      }
+
+      // Only return if it exists
+      if (FHU::Filesystem::Exists(PathName)) {
+        return PathName;
+      }
    }
-  } else {
-    // If the containerprefix and pathname isn't empty
-    // Then we check if the pathname exists in our current namespace
-    // If the path DOESN'T exist but DOES exist with the prefix applied
-    // then redirect to the prefix
-    //
-    // This might not be expected behaviour for some edge cases but since
-    // all paths aren't mounted inside the container, then it'll be fine
-    //
-    // Main catch case for this is the default thunk install folders
-    // HostThunks: $CMAKE_INSTALL_PREFIX/lib/fex-emu/HostThunks/
-    // GuestThunks: $CMAKE_INSTALL_PREFIX/share/fex-emu/GuestThunks/
-    if (!ContainerPrefix.empty() && !PathName.empty()) {
-      if (!FHU::Filesystem::Exists(PathName)) {
-        auto ContainerPath = ContainerPrefix + PathName;
-        if (FHU::Filesystem::Exists(ContainerPath)) {
-          return ContainerPath;
+    else {
+      // If the containerprefix and pathname isn't empty
+      // Then we check if the pathname exists in our current namespace
+      // If the path DOESN'T exist but DOES exist with the prefix applied
+      // then redirect to the prefix
+      //
+      // This might not be expected behaviour for some edge cases but since
+      // all paths aren't mounted inside the container, then it'll be fine
+      //
+      // Main catch case for this is the default thunk install folders
+      // HostThunks: $CMAKE_INSTALL_PREFIX/lib/fex-emu/HostThunks/
+      // GuestThunks: $CMAKE_INSTALL_PREFIX/share/fex-emu/GuestThunks/
+      if (!ContainerPrefix.empty() && !PathName.empty()) {
+        if (!FHU::Filesystem::Exists(PathName)) {
+          auto ContainerPath = ContainerPrefix + PathName;
+          if (FHU::Filesystem::Exists(ContainerPath)) {
+            return ContainerPath;
+          }
        }
      }
    }
+    return {};
  }
-  return {};
-}

-constexpr char ContainerManager[] = "/run/host/container-manager";
+  constexpr char ContainerManager[] = "/run/host/container-manager";

-fextl::string FindContainer() {
-  // We only support pressure-vessel at the moment
-  if (FHU::Filesystem::Exists(ContainerManager)) {
-    fextl::vector<char> Manager {};
-    if (FEXCore::FileLoading::LoadFile(Manager, ContainerManager)) {
-      // Trim the whitespace, may contain a newline
-      fextl::string ManagerStr = Manager.data();
-      ManagerStr = FEXCore::StringUtils::Trim(ManagerStr);
-      return ManagerStr;
-    }
-  }
-  return {};
-}
-
-fextl::string FindContainerPrefix() {
-  // We only support pressure-vessel at the moment
-  if (FHU::Filesystem::Exists(ContainerManager)) {
-    fextl::vector<char> Manager {};
-    if (FEXCore::FileLoading::LoadFile(Manager, ContainerManager)) {
-      // Trim the whitespace, may contain a newline
-      fextl::string ManagerStr = Manager.data();
-      ManagerStr = FEXCore::StringUtils::Trim(ManagerStr);
-      if (strncmp(ManagerStr.data(), "pressure-vessel", Manager.size()) == 0) {
-        // We are running inside of pressure vessel
-        // Our $CMAKE_INSTALL_PREFIX paths are now inside of /run/host/$CMAKE_INSTALL_PREFIX
-        return "/run/host/";
+  fextl::string FindContainer() {
+    // We only support pressure-vessel at the moment
+    if (FHU::Filesystem::Exists(ContainerManager)) {
+      fextl::vector<char> Manager{};
+      if (FEXCore::FileLoading::LoadFile(Manager, ContainerManager)) {
+        // Trim the whitespace, may contain a newline
+        fextl::string ManagerStr = Manager.data();
+        ManagerStr = FEXCore::StringUtils::Trim(ManagerStr);
+        return ManagerStr;
      }
    }
+    return {};
  }
-  return {};
-}

-void ReloadMetaLayer() {
-  Meta->Load();
+  fextl::string FindContainerPrefix() {
+    // We only support pressure-vessel at the moment
+    if (FHU::Filesystem::Exists(ContainerManager)) {
+      fextl::vector<char> Manager{};
+      if (FEXCore::FileLoading::LoadFile(Manager, ContainerManager)) {
+        // Trim the whitespace, may contain a newline
+        fextl::string ManagerStr = Manager.data();
+        ManagerStr = FEXCore::StringUtils::Trim(ManagerStr);
+        if (strncmp(ManagerStr.data(), "pressure-vessel", Manager.size()) == 0) {
+          // We are running inside of pressure vessel
+          // Our $CMAKE_INSTALL_PREFIX paths are now inside of /run/host/$CMAKE_INSTALL_PREFIX
+          return "/run/host/";
+        }
+      }
+    }
+    return {};
+  }

-  // Do configuration option fix ups after everything is reloaded
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_CORE)) {
-    // Sanitize Core option
-    FEX_CONFIG_OPT(Core, CORE);
+  void ReloadMetaLayer() {
+    Meta->Load();
+
+    // Do configuration option fix ups after everything is reloaded
+    {
+      // Always fix up the number of threads and create the configuration
+      // Otherwise the application could receive zero as the number of threads
+      FEX_CONFIG_OPT(Cores, THREADS);
+      if (Cores == 0) {
+        // When the number of emulated CPU cores is zero then auto detect
+        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_THREADS, fextl::fmt::format("{}", FEXCore::CPUInfo::CalculateNumberOfCPUs()));
+      }
+    }
+
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_CORE)) {
+      // Sanitize Core option
+      FEX_CONFIG_OPT(Core, CORE);
 #if (_M_X86_64)
-    constexpr uint32_t MaxCoreNumber = 1;
+      constexpr uint32_t MaxCoreNumber = 1;
 #else
-    constexpr uint32_t MaxCoreNumber = 0;
+      constexpr uint32_t MaxCoreNumber = 0;
 #endif
-    if (Core > MaxCoreNumber) {
-      // Sanitize the core option by setting the core to the JIT if invalid
-      FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_CORE, fextl::fmt::format("{}", static_cast<uint32_t>(FEXCore::Config::CONFIG_IRJIT)));
-    }
-  }
-
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_CACHEOBJECTCODECOMPILATION)) {
-    FEX_CONFIG_OPT(CacheObjectCodeCompilation, CACHEOBJECTCODECOMPILATION);
-    FEX_CONFIG_OPT(Core, CORE);
-  }
-
-  fextl::string ContainerPrefix {FindContainerPrefix()};
-  auto ExpandPathIfExists = [&ContainerPrefix](FEXCore::Config::ConfigOption Config, fextl::string PathName) {
-    auto NewPath = ExpandPath(ContainerPrefix, PathName);
-    if (!NewPath.empty()) {
-      FEXCore::Config::EraseSet(Config, NewPath);
-    }
-  };
-
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_ROOTFS)) {
-    FEX_CONFIG_OPT(PathName, ROOTFS);
-    auto ExpandedString = ExpandPath(ContainerPrefix, PathName());
-    if (!ExpandedString.empty()) {
-      // Adjust the path if it ended up being relative
-      FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_ROOTFS, ExpandedString);
-    } else if (!PathName().empty()) {
-      // If the filesystem doesn't exist then let's see if it exists in the fex-emu folder
-      fextl::string NamedRootFS = GetDataDirectory() + "RootFS/" + PathName();
-      if (FHU::Filesystem::Exists(NamedRootFS)) {
-        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_ROOTFS, NamedRootFS);
+      if (Core > MaxCoreNumber) {
+        // Sanitize the core option by setting the core to the JIT if invalid
+        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_CORE, fextl::fmt::format("{}", static_cast<uint32_t>(FEXCore::Config::CONFIG_IRJIT)));
      }
    }
-  }
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKHOSTLIBS)) {
-    FEX_CONFIG_OPT(PathName, THUNKHOSTLIBS);
-    ExpandPathIfExists(FEXCore::Config::CONFIG_THUNKHOSTLIBS, PathName());
-  }
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKGUESTLIBS)) {
-    FEX_CONFIG_OPT(PathName, THUNKGUESTLIBS);
-    ExpandPathIfExists(FEXCore::Config::CONFIG_THUNKGUESTLIBS, PathName());
-  }
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKCONFIG)) {
-    FEX_CONFIG_OPT(PathName, THUNKCONFIG);
-    auto ExpandedString = ExpandPath(ContainerPrefix, PathName());
-    if (!ExpandedString.empty()) {
-      // Adjust the path if it ended up being relative
-      FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_THUNKCONFIG, ExpandedString);
-    } else if (!PathName().empty()) {
-      // If the filesystem doesn't exist then let's see if it exists in the fex-emu folder
-      fextl::string NamedConfig = GetDataDirectory() + "ThunkConfigs/" + PathName();
-      if (FHU::Filesystem::Exists(NamedConfig)) {
-        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_THUNKCONFIG, NamedConfig);
+
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_CACHEOBJECTCODECOMPILATION)) {
+      FEX_CONFIG_OPT(CacheObjectCodeCompilation, CACHEOBJECTCODECOMPILATION);
+      FEX_CONFIG_OPT(Core, CORE);
+    }
+
+    fextl::string ContainerPrefix { FindContainerPrefix() };
+    auto ExpandPathIfExists = [&ContainerPrefix](FEXCore::Config::ConfigOption Config, fextl::string PathName) {
+      auto NewPath = ExpandPath(ContainerPrefix, PathName);
+      if (!NewPath.empty()) {
+        FEXCore::Config::EraseSet(Config, NewPath);
+      }
+    };
+
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_ROOTFS)) {
+      FEX_CONFIG_OPT(PathName, ROOTFS);
+      auto ExpandedString = ExpandPath(ContainerPrefix,PathName());
+      if (!ExpandedString.empty()) {
+        // Adjust the path if it ended up being relative
+        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_ROOTFS, ExpandedString);
+      }
+      else if (!PathName().empty()) {
+        // If the filesystem doesn't exist then let's see if it exists in the fex-emu folder
+        fextl::string NamedRootFS = GetDataDirectory() + "RootFS/" + PathName();
+        if (FHU::Filesystem::Exists(NamedRootFS)) {
+          FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_ROOTFS, NamedRootFS);
+        }
      }
    }
-  }
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_OUTPUTLOG)) {
-    FEX_CONFIG_OPT(PathName, OUTPUTLOG);
-    if (PathName() != "stdout" && PathName() != "stderr" && PathName() != "server") {
-      ExpandPathIfExists(FEXCore::Config::CONFIG_OUTPUTLOG, PathName());
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKHOSTLIBS)) {
+      FEX_CONFIG_OPT(PathName, THUNKHOSTLIBS);
+      ExpandPathIfExists(FEXCore::Config::CONFIG_THUNKHOSTLIBS, PathName());
+    }
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKGUESTLIBS)) {
+      FEX_CONFIG_OPT(PathName, THUNKGUESTLIBS);
+      ExpandPathIfExists(FEXCore::Config::CONFIG_THUNKGUESTLIBS, PathName());
+    }
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_THUNKCONFIG)) {
+      FEX_CONFIG_OPT(PathName, THUNKCONFIG);
+      auto ExpandedString = ExpandPath(ContainerPrefix, PathName());
+      if (!ExpandedString.empty()) {
+        // Adjust the path if it ended up being relative
+        FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_THUNKCONFIG, ExpandedString);
+      }
+      else if (!PathName().empty()) {
+        // If the filesystem doesn't exist then let's see if it exists in the fex-emu folder
+        fextl::string NamedConfig = GetDataDirectory() + "ThunkConfigs/" + PathName();
+        if (FHU::Filesystem::Exists(NamedConfig)) {
+          FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_THUNKCONFIG, NamedConfig);
+        }
+      }
+    }
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_OUTPUTLOG)) {
+      FEX_CONFIG_OPT(PathName, OUTPUTLOG);
+      if (PathName() != "stdout" && PathName() != "stderr" && PathName() != "server") {
+        ExpandPathIfExists(FEXCore::Config::CONFIG_OUTPUTLOG, PathName());
+      }
+    }
+
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_DUMPIR) &&
+        !FEXCore::Config::Exists(FEXCore::Config::CONFIG_PASSMANAGERDUMPIR)) {
+      // If DumpIR is set but no PassManagerDumpIR configuration is set, then default to `afteropt`
+      FEX_CONFIG_OPT(PathName, DUMPIR);
+      if (PathName() != "no") {
+        EraseSet(FEXCore::Config::ConfigOption::CONFIG_PASSMANAGERDUMPIR, fextl::fmt::format("{}", static_cast<uint64_t>(FEXCore::Config::PassManagerDumpIR::AFTEROPT)));
+      }
+    }
+
+    if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_SINGLESTEP)) {
+      // Single stepping also enforces single instruction size blocks
+      Set(FEXCore::Config::ConfigOption::CONFIG_MAXINST, "1");
    }
  }

-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_DUMPIR) && !FEXCore::Config::Exists(FEXCore::Config::CONFIG_PASSMANAGERDUMPIR)) {
-    // If DumpIR is set but no PassManagerDumpIR configuration is set, then default to `afteropt`
-    FEX_CONFIG_OPT(PathName, DUMPIR);
-    if (PathName() != "no") {
-      EraseSet(FEXCore::Config::ConfigOption::CONFIG_PASSMANAGERDUMPIR,
-               fextl::fmt::format("{}", static_cast<uint64_t>(FEXCore::Config::PassManagerDumpIR::AFTEROPT)));
+  void AddLayer(fextl::unique_ptr<FEXCore::Config::Layer> _Layer) {
+    ConfigLayers.emplace(_Layer->GetLayerType(), std::move(_Layer));
+  }
+
+  bool Exists(ConfigOption Option) {
+    return Meta->OptionExists(Option);
+  }
+
+  std::optional<LayerValue*> All(ConfigOption Option) {
+    return Meta->All(Option);
+  }
+
+  std::optional<fextl::string*> Get(ConfigOption Option) {
+    return Meta->Get(Option);
+  }
+
+  void Set(ConfigOption Option, std::string_view Data) {
+    Meta->Set(Option, Data);
+  }
+
+  void Erase(ConfigOption Option) {
+    Meta->Erase(Option);
+  }
+
+  void EraseSet(ConfigOption Option, std::string_view Data) {
+    Meta->EraseSet(Option, Data);
+  }
+
+  template<typename T>
+  T Value<T>::Get(FEXCore::Config::ConfigOption Option) {
+    T Result;
+    auto Value = FEXCore::Config::Get(Option);
+
+    if (!FEXCore::StrConv::Conv(**Value, &Result)) {
+      LOGMAN_MSG_A_FMT("Attempted to convert invalid value");
    }
-  }
-
-  if (FEXCore::Config::Exists(FEXCore::Config::CONFIG_SINGLESTEP)) {
-    // Single stepping also enforces single instruction size blocks
-    Set(FEXCore::Config::ConfigOption::CONFIG_MAXINST, "1");
-  }
-}
-
-void AddLayer(fextl::unique_ptr<FEXCore::Config::Layer> _Layer) {
-  ConfigLayers.emplace(_Layer->GetLayerType(), std::move(_Layer));
-}
-
-bool Exists(ConfigOption Option) {
-  return Meta->OptionExists(Option);
-}
-
-std::optional<LayerValue*> All(ConfigOption Option) {
-  return Meta->All(Option);
-}
-
-std::optional<fextl::string*> Get(ConfigOption Option) {
-  return Meta->Get(Option);
-}
-
-void Set(ConfigOption Option, std::string_view Data) {
-  Meta->Set(Option, Data);
-}
-
-void Erase(ConfigOption Option) {
-  Meta->Erase(Option);
-}
-
-void EraseSet(ConfigOption Option, std::string_view Data) {
-  Meta->EraseSet(Option, Data);
-}
-
-template<typename T>
-T Value<T>::Get(FEXCore::Config::ConfigOption Option) {
-  T Result;
-  auto Value = FEXCore::Config::Get(Option);
-
-  if (!FEXCore::StrConv::Conv(**Value, &Result)) {
-    LOGMAN_MSG_A_FMT("Attempted to convert invalid value");
-  }
-  return Result;
-}
-
-template<typename T>
-T Value<T>::GetIfExists(FEXCore::Config::ConfigOption Option, T Default) {
-  T Result;
-  auto Value = FEXCore::Config::Get(Option);
-
-  if (Value && FEXCore::StrConv::Conv(**Value, &Result)) {
    return Result;
-  } else {
-    return Default;
  }
+
+  template<typename T>
+  T Value<T>::GetIfExists(FEXCore::Config::ConfigOption Option, T Default) {
+    T Result;
+    auto Value = FEXCore::Config::Get(Option);
+
+    if (Value && FEXCore::StrConv::Conv(**Value, &Result)) {
+      return Result;
+    }
+    else {
+      return Default;
+    }
+  }
+
+  template<>
+  fextl::string Value<fextl::string>::GetIfExists(FEXCore::Config::ConfigOption Option, fextl::string Default) {
+    auto Value = FEXCore::Config::Get(Option);
+    if (Value) {
+      return **Value;
+    }
+    else {
+      return Default;
+    }
+  }
+
+  template<>
+  fextl::string Value<fextl::string>::GetIfExists(FEXCore::Config::ConfigOption Option, std::string_view Default) {
+    auto Value = FEXCore::Config::Get(Option);
+    if (Value) {
+      return **Value;
+    }
+    else {
+      return fextl::string(Default);
+    }
+  }
+
+  template bool     Value<bool>::GetIfExists(FEXCore::Config::ConfigOption Option, bool Default);
+  template int8_t   Value<int8_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int8_t Default);
+  template uint8_t  Value<uint8_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint8_t Default);
+  template int16_t   Value<int16_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int16_t Default);
+  template uint16_t  Value<uint16_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint16_t Default);
+  template int32_t  Value<int32_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int32_t Default);
+  template uint32_t Value<uint32_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint32_t Default);
+  template int64_t  Value<int64_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int64_t Default);
+  template uint64_t Value<uint64_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint64_t Default);
+
+  // Constructor
+  template Value<fextl::string>::Value(FEXCore::Config::ConfigOption _Option, fextl::string Default);
+  template Value<bool>::Value(FEXCore::Config::ConfigOption _Option, bool Default);
+  template Value<uint8_t>::Value(FEXCore::Config::ConfigOption _Option, uint8_t Default);
+  template Value<uint64_t>::Value(FEXCore::Config::ConfigOption _Option, uint64_t Default);
+
+  template<typename T>
+  void Value<T>::GetListIfExists(FEXCore::Config::ConfigOption Option, fextl::list<fextl::string> *List) {
+    auto Value = FEXCore::Config::All(Option);
+    List->clear();
+    if (Value) {
+      *List = **Value;
+    }
+  }
+  template void Value<fextl::string>::GetListIfExists(FEXCore::Config::ConfigOption Option, fextl::list<fextl::string> *List);
 }

-template<>
-fextl::string Value<fextl::string>::GetIfExists(FEXCore::Config::ConfigOption Option, fextl::string Default) {
-  auto Value = FEXCore::Config::Get(Option);
-  if (Value) {
-    return **Value;
-  } else {
-    return Default;
-  }
-}
-
-template<>
-fextl::string Value<fextl::string>::GetIfExists(FEXCore::Config::ConfigOption Option, std::string_view Default) {
-  auto Value = FEXCore::Config::Get(Option);
-  if (Value) {
-    return **Value;
-  } else {
-    return fextl::string(Default);
-  }
-}
-
-template bool Value<bool>::GetIfExists(FEXCore::Config::ConfigOption Option, bool Default);
-template int8_t Value<int8_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int8_t Default);
-template uint8_t Value<uint8_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint8_t Default);
-template int16_t Value<int16_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int16_t Default);
-template uint16_t Value<uint16_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint16_t Default);
-template int32_t Value<int32_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int32_t Default);
-template uint32_t Value<uint32_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint32_t Default);
-template int64_t Value<int64_t>::GetIfExists(FEXCore::Config::ConfigOption Option, int64_t Default);
-template uint64_t Value<uint64_t>::GetIfExists(FEXCore::Config::ConfigOption Option, uint64_t Default);
-
-// Constructor
-template Value<fextl::string>::Value(FEXCore::Config::ConfigOption _Option, fextl::string Default);
-template Value<bool>::Value(FEXCore::Config::ConfigOption _Option, bool Default);
-template Value<uint8_t>::Value(FEXCore::Config::ConfigOption _Option, uint8_t Default);
-template Value<uint64_t>::Value(FEXCore::Config::ConfigOption _Option, uint64_t Default);
-
-template<typename T>
-void Value<T>::GetListIfExists(FEXCore::Config::ConfigOption Option, fextl::list<fextl::string>* List) {
-  auto Value = FEXCore::Config::All(Option);
-  List->clear();
-  if (Value) {
-    *List = **Value;
-  }
-}
-template void Value<fextl::string>::GetListIfExists(FEXCore::Config::ConfigOption Option, fextl::list<fextl::string>* List);
-} // namespace FEXCore::Config
@@ -31,6 +31,15 @@
          "Maximum number of instruction to store in a block"
        ]
      },
+      "Threads": {
+        "Type": "uint32",
+        "Default": "0",
+        "ShortArg": "T",
+        "Desc": [
+          "Number of physical hardware threads to tell the process we have.",
+          "0 will auto detect."
+        ]
+      },
      "CacheObjectCodeCompilation": {
        "Type": "uint32",
        "Default": "FEXCore::Config::ConfigObjectCodeHandler::CONFIG_NONE",
@@ -50,6 +59,8 @@
          "DISABLESVE": "disablesve",
          "ENABLEAVX": "enableavx",
          "DISABLEAVX": "disableavx",
+          "ENABLEAVX2": "enableavx2",
+          "DISABLEAVX2": "disableavx2",
          "ENABLEAFP": "enableafp",
          "DISABLEAFP": "disableafp",
          "ENABLELRCPC": "enablelrcpc",
@@ -75,17 +86,14 @@
          "ENABLECRYPTO": "enablecrypto",
          "DISABLECRYPTO": "disablecrypto",
          "ENABLERPRES": "enablerpres",
-          "DISABLERPRES": "disablerpres",
-          "ENABLESVEBITPERM": "enablesvebitperm",
-          "DISABLESVEBITPERM": "disablesvebitperm",
-          "ENABLEPRESERVEALLABI": "enablepreserveallabi",
-          "DISABLEPRESERVEALLABI": "disablepreserveallabi"
+          "DISABLERPRES": "disablerpres"
        },
        "Desc": [
          "Allows controlling of the CPU features in the JIT.",
          "\toff: Default CPU features queried from CPU features",
          "\t{enable,disable}sve: Will force enable or disable sve even if the host doesn't support it",
          "\t{enable,disable}avx: Will force enable or disable avx even if the host doesn't support it",
+          "\t{enable,disable}avx2: Will force enable or disable avx2 even if the host doesn't support it",
          "\t{enable,disable}afp: Will force enable or disable afp even if the host doesn't support it",
          "\t{enable,disable}lrcpc: Will force enable or disable lrcpc even if the host doesn't support it",
          "\t{enable,disable}lrcpc2: Will force enable or disable lrcpc2 even if the host doesn't support it",
@@ -98,29 +106,7 @@
          "\t{enable,disable}flagm: Will force enable or disable flagm even if the host doesn't support it",
          "\t{enable,disable}flagm2: Will force enable or disable flagm2 even if the host doesn't support it",
          "\t{enable,disable}crypto: Will force enable or disable crypto extensions even if the host doesn't support it",
-          "\t{enable,disable}rpres: Will force enable or disable rpres even if the host doesn't support it",
-          "\t{enable,disable}svebitperm: Will force enable or disable svebitperm even if the host doesn't support it",
-          "\t{enable,disable}preserveallabi: Will force enable or disable preserve_all abi even if the host doesn't support it"
-        ]
-      },
-      "CPUID": {
-        "Type": "strenum",
-        "Default": "FEXCore::Config::CPUID::OFF",
-        "Enums": {
-          "ENABLESHA": "enablesha",
-          "DISABLESHA": "disablesha"
-        },
-        "Desc": [
-          "Allows controlling of the CPU features are exposed in CPUID.",
-          "\toff: Default CPU features queried from CPU features",
-          "\t{enable,disable}sha: Will force enable or disable sha even if the host doesn't support it"
-        ]
-      },
-      "SmallTSCScale": {
-        "Type": "bool",
-        "Default": "true",
-        "Desc": [
-          "Scales the cycle counter on systems that have low frequencies."
+          "\t{enable,disable}rpres: Will force enable or disable rpres even if the host doesn't support it"
        ]
      }
    },
@@ -142,7 +128,7 @@
      },
      "ThunkHostLibs": {
        "Type": "str",
-        "Default": "@CMAKE_INSTALL_PREFIX@/@CMAKE_INSTALL_LIBDIR@/fex-emu/HostThunks/",
+        "Default": "@CMAKE_INSTALL_PREFIX@/lib/fex-emu/HostThunks/",
        "ShortArg": "t",
        "Desc": [
          "Folder to find the host-side thunking libraries."
@@ -158,7 +144,7 @@
      },
      "ThunkHostLibs32": {
        "Type": "str",
-        "Default": "@CMAKE_INSTALL_PREFIX@/@CMAKE_INSTALL_LIBDIR@/fex-emu/HostThunks_32/",
+        "Default": "@CMAKE_INSTALL_PREFIX@/lib/fex-emu/HostThunks_32/",
        "Desc": [
          "Folder to find the 32-bit host-side thunking libraries."
        ]
@@ -270,6 +256,23 @@
          "Disables optimizations passes for debugging."
        ]
      },
+      "SRA": {
+        "Type": "bool",
+        "Default": "true",
+        "Desc": [
+          "Set to false to disable Static Register Allocation"
+        ]
+      },
+      "Force32BitAllocator": {
+        "Type": "bool",
+        "Default": "false",
+        "Desc": [
+          "Forces use of the 32-bit allocator on 32-bit applications",
+          "Used to work around ulimit problems of CI runner",
+          "Potentially useful for debugging memory problems",
+          "32-bit allocator is always used if your host kernel is older than 4.17"
+        ]
+      },
      "GlobalJITNaming": {
        "Type": "bool",
        "Default": "false",
@@ -368,14 +371,6 @@
          "File to write FEX output to.",
          "[stdout, stderr, server, <Filename>]"
        ]
-      },
-      "TelemetryDirectory": {
-        "Type": "str",
-        "Default": "",
-        "Desc": [
-          "Redirects the telemetry folder that FEX usually writes to.",
-          "By default telemetry data is stored in {$FEX_APP_DATA_LOCATION,{$XDG_DATA_HOME,$HOME}/.fex-emu/Telemetry/}"
-        ]
      }
    },
    "Hacks": {
@@ -387,8 +382,9 @@
        "Desc": [
          "Checks code for modification before execution.",
          "\tnone: No checks",
-          "\tmtrack: Page tracking based invalidation (default)",
-          "\tfull: Validate code before every run (slow)"
+          "\tmtrack: Page tracking based invalidation",
+          "\tfull: Validate code before every run (slow)",
+          "\tmman: Invalidate on mmap, mprotect, munmap (deprecated, use mtrack)"
        ]
      },
      "TSOEnabled": {
@@ -399,37 +395,6 @@
          "Highly likely to break any multithreaded application if disabled."
        ]
      },
-      "VectorTSOEnabled": {
-        "Type": "bool",
-        "Default": "false",
-        "Desc": [
-          "When TSO emulation is enabled, controls if vector loadstores should also be atomic."
-        ]
-      },
-      "MemcpySetTSOEnabled": {
-        "Type": "bool",
-        "Default": "false",
-        "Desc": [
-          "When TSO emulation is enabled, controls if memcpy and memset should also be atomic.",
-          "Only affects REP MOVS and REP STOS instructions"
-        ]
-      },
-      "HalfBarrierTSOEnabled": {
-        "Type": "bool",
-        "Default": "true",
-        "Desc": [
-          "When TSO emulation is enabled, controls if unaligned loads and stores should be backpatched to half-barrier atomics.",
-          "Can be dangerous due to aligned loadstores through the same code now become non-atomic."
-        ]
-      },
-      "StrictInProcessSplitLocks": {
-        "Type": "bool",
-        "Default": "false",
-        "Desc": [
-          "Strict global lock when handling an unaligned atomic that crosses a 16-byte or cacheline granularity",
-          "This is required to ensure a split-lock doesn't tear inside the process"
-        ]
-      },
      "TSOAutoMigration": {
        "Type": "bool",
        "Default": "true",
@@ -477,14 +442,6 @@
          "Hides the hypervisor CPUID bit when set.",
          "Should only be used for applications that have issues with this set."
        ]
-      },
-      "StartupSleep": {
-        "Type": "uint32",
-        "Default": "0",
-        "Desc": [
-          "Sleeps the process at startup for a duration of seconds.",
-          "Useful if an application crashes too quickly to attach a debugger."
-        ]
      }
    },
    "Misc": {
@@ -517,13 +474,6 @@
        "Desc": [
          "Override for a FEXServer socket path. Only useful for chroots."
        ]
-      },
-      "NeedsSeccomp": {
-        "Type": "bool",
-        "Default": "false",
-        "Desc": [
-          "Disables inline syscalls in order to support seccomp handling"
-        ]
      }
    }
  },
@@ -6,65 +6,94 @@
 #include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/Context.h>
 #include <FEXCore/Core/CPUID.h>
-#include <FEXCore/Core/HostFeatures.h>
 #include <FEXCore/Core/SignalDelegator.h>
 #include "FEXCore/Debug/InternalThreadState.h"

 #include <string.h>
 #include <utility>

+namespace FEXCore::HLE {
+  class SyscallVisitor;
+}
+
 namespace FEXCore::Context {
-void InitializeStaticTables(OperatingMode Mode) {
-  X86Tables::InitializeInfoTables(Mode);
-  IR::InstallOpcodeHandlers(Mode);
-}
+  void InitializeStaticTables(OperatingMode Mode) {
+    X86Tables::InitializeInfoTables(Mode);
+    IR::InstallOpcodeHandlers(Mode);
+  }

-fextl::unique_ptr<FEXCore::Context::Context> FEXCore::Context::Context::CreateNewContext(const FEXCore::HostFeatures& Features) {
-  return fextl::make_unique<FEXCore::Context::ContextImpl>(Features);
-}
+  fextl::unique_ptr<FEXCore::Context::Context> FEXCore::Context::Context::CreateNewContext() {
+    return fextl::make_unique<FEXCore::Context::ContextImpl>();
+  }

-void FEXCore::Context::ContextImpl::SetExitHandler(ExitHandler handler) {
-  CustomExitHandler = std::move(handler);
-}
+  bool FEXCore::Context::ContextImpl::InitializeContext() {
+    // This should be used for generating things that are shared between threads
+    CPUID.Init(this);
+    return true;
+  }

-ExitHandler FEXCore::Context::ContextImpl::GetExitHandler() const {
-  return CustomExitHandler;
-}
+  void FEXCore::Context::ContextImpl::SetExitHandler(ExitHandler handler) {
+    CustomExitHandler = std::move(handler);
+  }

-void FEXCore::Context::ContextImpl::CompileRIP(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP) {
-  CompileBlock(Thread->CurrentFrame, GuestRIP);
-}
+  ExitHandler FEXCore::Context::ContextImpl::GetExitHandler() const {
+    return CustomExitHandler;
+  }

-void FEXCore::Context::ContextImpl::CompileRIPCount(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, uint64_t MaxInst) {
-  CompileBlock(Thread->CurrentFrame, GuestRIP, MaxInst);
-}
+  void FEXCore::Context::ContextImpl::Stop() {
+    Stop(false);
+  }

-void FEXCore::Context::ContextImpl::SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) {
-  CustomCPUFactory = std::move(Factory);
-}
+  void FEXCore::Context::ContextImpl::CompileRIP(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP) {
+    CompileBlock(Thread->CurrentFrame, GuestRIP);
+  }

-void FEXCore::Context::ContextImpl::SetSignalDelegator(FEXCore::SignalDelegator* _SignalDelegation) {
-  SignalDelegation = _SignalDelegation;
-}
+  void FEXCore::Context::ContextImpl::CompileRIPCount(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP, uint64_t MaxInst) {
+    CompileBlock(Thread->CurrentFrame, GuestRIP, MaxInst);
+  }

-void FEXCore::Context::ContextImpl::SetSyscallHandler(FEXCore::HLE::SyscallHandler* Handler) {
-  SyscallHandler = Handler;
-  SourcecodeResolver = Handler->GetSourcecodeResolver();
-}
+  FEXCore::Context::ExitReason FEXCore::Context::ContextImpl::GetExitReason() {
+    return ParentThread->ExitReason;
+  }

-FEXCore::CPUID::FunctionResults FEXCore::Context::ContextImpl::RunCPUIDFunction(uint32_t Function, uint32_t Leaf) {
-  return CPUID.RunFunction(Function, Leaf);
-}
+  bool FEXCore::Context::ContextImpl::IsDone() const {
+    return IsPaused();
+  }

-FEXCore::CPUID::XCRResults FEXCore::Context::ContextImpl::RunXCRFunction(uint32_t Function) {
-  return CPUID.RunXCRFunction(Function);
-}
+  void FEXCore::Context::ContextImpl::GetCPUState(FEXCore::Core::CPUState *State) const {
+    memcpy(State, ParentThread->CurrentFrame, sizeof(FEXCore::Core::CPUState));
+  }

-FEXCore::CPUID::FunctionResults FEXCore::Context::ContextImpl::RunCPUIDFunctionName(uint32_t Function, uint32_t Leaf, uint32_t CPU) {
-  return CPUID.RunFunctionName(Function, Leaf, CPU);
-}
+  void FEXCore::Context::ContextImpl::SetCPUState(const FEXCore::Core::CPUState *State) {
+    memcpy(ParentThread->CurrentFrame, State, sizeof(FEXCore::Core::CPUState));
+  }

-bool FEXCore::Context::ContextImpl::IsAddressInCodeBuffer(FEXCore::Core::InternalThreadState* Thread, uintptr_t Address) const {
-  return Thread->CPUBackend->IsAddressInCodeBuffer(Address);
+  void FEXCore::Context::ContextImpl::SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) {
+    CustomCPUFactory = std::move(Factory);
+  }
+
+  HostFeatures FEXCore::Context::ContextImpl::GetHostFeatures() const {
+    return HostFeatures;
+  }
+
+  void FEXCore::Context::ContextImpl::SetSignalDelegator(FEXCore::SignalDelegator *_SignalDelegation) {
+    SignalDelegation = _SignalDelegation;
+  }
+
+  void FEXCore::Context::ContextImpl::SetSyscallHandler(FEXCore::HLE::SyscallHandler *Handler) {
+    SyscallHandler = Handler;
+    SourcecodeResolver = Handler->GetSourcecodeResolver();
+  }
+
+  FEXCore::CPUID::FunctionResults FEXCore::Context::ContextImpl::RunCPUIDFunction(uint32_t Function, uint32_t Leaf) {
+    return CPUID.RunFunction(Function, Leaf);
+  }
+
+  FEXCore::CPUID::XCRResults FEXCore::Context::ContextImpl::RunXCRFunction(uint32_t Function) {
+    return CPUID.RunXCRFunction(Function);
+  }
+
+  FEXCore::CPUID::FunctionResults FEXCore::Context::ContextImpl::RunCPUIDFunctionName(uint32_t Function, uint32_t Leaf, uint32_t CPU) {
+    return CPUID.RunFunctionName(Function, Leaf, CPU);
+  }
 }
-} // namespace FEXCore::Context
@@ -13,10 +13,9 @@
 #include <FEXCore/Core/HostFeatures.h>
 #include <FEXCore/Core/SignalDelegator.h>
 #include <FEXCore/Debug/InternalThreadState.h>
-#include <FEXCore/IR/IR.h>
 #include <FEXCore/Utils/CompilerDefs.h>
+#include <FEXCore/Utils/DeferredSignalMutex.h>
 #include <FEXCore/Utils/Event.h>
-#include <FEXCore/Utils/SignalScopeGuards.h>
 #include <FEXCore/fextl/memory.h>
 #include <FEXCore/fextl/set.h>
 #include <FEXCore/fextl/string.h>
@@ -38,6 +37,7 @@
 namespace FEXCore {
 class CodeLoader;
 class ThunkHandler;
+class GdbServer;

 namespace CodeSerialize {
  class CodeObjectSerializeService;
@@ -45,366 +45,427 @@ namespace CodeSerialize {

 namespace CPU {
  class Arm64JITCore;
+  class X86JITCore;
  class Dispatcher;
-} // namespace CPU
+}
 namespace HLE {
-  struct SyscallArguments;
-  class SyscallHandler;
-  class SourcecodeResolver;
-  struct SourcecodeMap;
-} // namespace HLE
-} // namespace FEXCore
+struct SyscallArguments;
+class SyscallHandler;
+class SourcecodeResolver;
+struct SourcecodeMap;
+}
+}

 namespace FEXCore::IR {
-class RegisterAllocationData;
-struct IRListCopy;
-class IRListView;
+  class RegisterAllocationData;
+  class IRListView;
 namespace Validation {
  class IRValidation;
 }
-} // namespace FEXCore::IR
+}

 namespace FEXCore::Context {
-enum CoreRunningMode {
-  MODE_RUN = 0,
-  MODE_SINGLESTEP = 1,
-};
+  enum CoreRunningMode {
+    MODE_RUN        = 0,
+    MODE_SINGLESTEP = 1,
+  };

-struct ExitFunctionLinkData {
-  uint64_t HostBranch;
-  uint64_t GuestRIP;
-};
+  class ContextImpl final : public FEXCore::Context::Context {
+    public:
+      // Context base class implementation.
+      bool InitializeContext() override;

-using BlockDelinkerFunc = void (*)(FEXCore::Core::CpuStateFrame* Frame, FEXCore::Context::ExitFunctionLinkData* Record);
-constexpr uint32_t TSC_SCALE_MAXIMUM = 1'000'000'000; ///< 1Ghz
+      FEXCore::Core::InternalThreadState* InitCore(uint64_t InitialRIP, uint64_t StackPointer) override;

-class ContextImpl final : public FEXCore::Context::Context {
-public:
-  // Context base class implementation.
-  bool InitCore() override;
+      void SetExitHandler(ExitHandler handler) override;
+      ExitHandler GetExitHandler() const override;

-  void SetExitHandler(ExitHandler handler) override;
-  ExitHandler GetExitHandler() const override;
+      void Pause() override;
+      void Run() override;
+      void Stop() override;
+      void Step() override;

-  ExitReason RunUntilExit(FEXCore::Core::InternalThreadState* Thread) override;
+      ExitReason RunUntilExit() override;

-  void ExecuteThread(FEXCore::Core::InternalThreadState* Thread) override;
+      void ExecuteThread(FEXCore::Core::InternalThreadState *Thread) override;

-  void CompileRIP(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP) override;
-  void CompileRIPCount(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, uint64_t MaxInst) override;
+      void CompileRIP(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP) override;
+      void CompileRIPCount(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP, uint64_t MaxInst) override;

-  void SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) override;
+      int GetProgramStatus() const override;

-  void HandleCallback(FEXCore::Core::InternalThreadState* Thread, uint64_t RIP) override;
+      ExitReason GetExitReason() override;

-  uint64_t RestoreRIPFromHostPC(FEXCore::Core::InternalThreadState* Thread, uint64_t HostPC) override;
-  uint32_t ReconstructCompactedEFLAGS(FEXCore::Core::InternalThreadState* Thread, bool WasInJIT, uint64_t* HostGPRs, uint64_t PSTATE) override;
-  void SetFlagsFromCompactedEFLAGS(FEXCore::Core::InternalThreadState* Thread, uint32_t EFLAGS) override;
+      bool IsDone() const override;

-  void ReconstructXMMRegisters(const FEXCore::Core::InternalThreadState* Thread, __uint128_t* XMM_Low, __uint128_t* YMM_High) override;
-  void SetXMMRegistersFromState(FEXCore::Core::InternalThreadState* Thread, const __uint128_t* XMM_Low, const __uint128_t* YMM_High) override;
+      void GetCPUState(FEXCore::Core::CPUState *State) const override;
+      void SetCPUState(const FEXCore::Core::CPUState *State) override;

-  /**
-   * @brief Used to create FEX thread objects in preparation for creating a true OS thread. Does set a TID or PID.
-   *
-   * @param InitialRIP The starting RIP of this thread
-   * @param StackPointer The starting RSP of this thread
-   * @param NewThreadState The initial thread state to setup for our state, if inheriting.
-   * @param ParentTID The PID that was the parent thread that created this
-   *
-   * @return The InternalThreadState object that tracks all of the emulated thread's state
-   *
-   * Usecases:
-   *  Parent thread Creation:
-   *    - Thread = CreateThread(InitialRIP, InitialStack, nullptr, 0);
-   *    - CTX->RunUntilExit(Thread);
-   *  OS thread Creation:
-   *    - Thread = CreateThread(0, 0, NewState, PPID);
-   *    - Thread->ExecutionThread = FEXCore::Threads::Thread::Create(ThreadHandler, Arg);
-   *    - ThreadHandler calls `CTX->ExecutionThread(Thread)`
-   *  OS fork (New thread created with a clone of thread state):
-   *    - clone{2, 3}
-   *    - Thread = CreateThread(0, 0, CopyOfThreadState, PPID);
-   *    - ExecutionThread(Thread); // Starts executing without creating another host thread
-   *  Thunk callback executing guest code from native host thread
-   *    - Thread = CreateThread(0, 0, NewState, PPID);
-   *    - InitializeThreadTLSData(Thread);
-   *    - HandleCallback(Thread, RIP);
-   */
+      void SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) override;

-  FEXCore::Core::InternalThreadState*
-  CreateThread(uint64_t InitialRIP, uint64_t StackPointer, FEXCore::Core::CPUState* NewThreadState, uint64_t ParentTID) override;
+      HostFeatures GetHostFeatures() const override;

-  // Public for threading
-  void ExecutionThread(FEXCore::Core::InternalThreadState* Thread) override;
+      void HandleCallback(FEXCore::Core::InternalThreadState *Thread, uint64_t RIP) override;

-  /**
-   * @brief Destroys this FEX thread object and stops tracking it internally
-   *
-   * @param Thread The internal FEX thread state object
-   */
-  void DestroyThread(FEXCore::Core::InternalThreadState* Thread, bool NeedsTLSUninstall) override;
+      uint64_t RestoreRIPFromHostPC(FEXCore::Core::InternalThreadState *Thread, uint64_t HostPC) override;
+      uint32_t ReconstructCompactedEFLAGS(FEXCore::Core::InternalThreadState *Thread) override;
+      void SetFlagsFromCompactedEFLAGS(FEXCore::Core::InternalThreadState *Thread, uint32_t EFLAGS) override;
+
+      /**
+       * @brief Used to create FEX thread objects in preparation for creating a true OS thread. Does set a TID or PID.
+       *
+       * @param NewThreadState The initial thread state to setup for our state
+       * @param ParentTID The PID that was the parent thread that created this
+       *
+       * @return The InternalThreadState object that tracks all of the emulated thread's state
+       *
+       * Usecases:
+       *  OS thread Creation:
+       *    - Thread = CreateThread(NewState, PPID);
+       *    - InitializeThread(Thread);
+       *  OS fork (New thread created with a clone of thread state):
+       *    - clone{2, 3}
+       *    - Thread = CreateThread(CopyOfThreadState, PPID);
+       *    - ExecutionThread(Thread); // Starts executing without creating another host thread
+       *  Thunk callback executing guest code from native host thread
+       *    - Thread = CreateThread(NewState, PPID);
+       *    - InitializeThreadTLSData(Thread);
+       *    - HandleCallback(Thread, RIP);
+       */
+      FEXCore::Core::InternalThreadState* CreateThread(FEXCore::Core::CPUState *NewThreadState, uint64_t ParentTID) override;
+
+      // Public for threading
+      void ExecutionThread(FEXCore::Core::InternalThreadState *Thread) override;
+      /**
+       * @brief Initializes the OS thread object and prepares to start executing on that new OS thread
+       *
+       * @param Thread The internal FEX thread state object
+       *
+       * The OS thread will wait until RunThread is executed
+       */
+      void InitializeThread(FEXCore::Core::InternalThreadState *Thread) override;
+      /**
+       * @brief Starts the OS thread object to start executing guest code
+       *
+       * @param Thread The internal FEX thread state object
+       */
+      void RunThread(FEXCore::Core::InternalThreadState *Thread) override;
+      void StopThread(FEXCore::Core::InternalThreadState *Thread) override;
+      /**
+       * @brief Destroys this FEX thread object and stops tracking it internally
+       *
+       * @param Thread The internal FEX thread state object
+       */
+      void DestroyThread(FEXCore::Core::InternalThreadState *Thread) override;

 #ifndef _WIN32
-  void LockBeforeFork(FEXCore::Core::InternalThreadState* Thread) override;
-  void UnlockAfterFork(FEXCore::Core::InternalThreadState* Thread, bool Child) override;
+      void LockBeforeFork(FEXCore::Core::InternalThreadState *Thread) override;
+      void UnlockAfterFork(FEXCore::Core::InternalThreadState *Thread, bool Child) override;
 #endif
-  void SetSignalDelegator(FEXCore::SignalDelegator* SignalDelegation) override;
-  void SetSyscallHandler(FEXCore::HLE::SyscallHandler* Handler) override;
+      void SetSignalDelegator(FEXCore::SignalDelegator *SignalDelegation) override;
+      void SetSyscallHandler(FEXCore::HLE::SyscallHandler *Handler) override;

-  FEXCore::CPUID::FunctionResults RunCPUIDFunction(uint32_t Function, uint32_t Leaf) override;
-  FEXCore::CPUID::XCRResults RunXCRFunction(uint32_t Function) override;
-  FEXCore::CPUID::FunctionResults RunCPUIDFunctionName(uint32_t Function, uint32_t Leaf, uint32_t CPU) override;
+      FEXCore::CPUID::FunctionResults RunCPUIDFunction(uint32_t Function, uint32_t Leaf) override;
+      FEXCore::CPUID::XCRResults RunXCRFunction(uint32_t Function) override;
+      FEXCore::CPUID::FunctionResults RunCPUIDFunctionName(uint32_t Function, uint32_t Leaf, uint32_t CPU) override;

-  FEXCore::IR::AOTIRCacheEntry* LoadAOTIRCacheEntry(const fextl::string& Name) override;
-  void UnloadAOTIRCacheEntry(FEXCore::IR::AOTIRCacheEntry* Entry) override;
+      FEXCore::IR::AOTIRCacheEntry *LoadAOTIRCacheEntry(const fextl::string& Name) override;
+      void UnloadAOTIRCacheEntry(FEXCore::IR::AOTIRCacheEntry *Entry) override;

-  void SetAOTIRLoader(AOTIRLoaderCBFn CacheReader) override {
-    IRCaptureCache.SetAOTIRLoader(std::move(CacheReader));
-  }
-  void SetAOTIRWriter(AOTIRWriterCBFn CacheWriter) override {
-    IRCaptureCache.SetAOTIRWriter(std::move(CacheWriter));
-  }
-  void SetAOTIRRenamer(AOTIRRenamerCBFn CacheRenamer) override {
-    IRCaptureCache.SetAOTIRRenamer(std::move(CacheRenamer));
-  }
+      void SetAOTIRLoader(AOTIRLoaderCBFn CacheReader) override {
+        IRCaptureCache.SetAOTIRLoader(std::move(CacheReader));
+      }
+      void SetAOTIRWriter(AOTIRWriterCBFn CacheWriter) override {
+        IRCaptureCache.SetAOTIRWriter(std::move(CacheWriter));
+      }
+      void SetAOTIRRenamer(AOTIRRenamerCBFn CacheRenamer) override {
+        IRCaptureCache.SetAOTIRRenamer(std::move(CacheRenamer));
+      }

-  void FinalizeAOTIRCache() override {
-    IRCaptureCache.FinalizeAOTIRCache();
-  }
-  void WriteFilesWithCode(AOTIRCodeFileWriterFn Writer) override {
-    IRCaptureCache.WriteFilesWithCode(Writer);
-  }
+      void FinalizeAOTIRCache() override {
+        IRCaptureCache.FinalizeAOTIRCache();
+      }
+      void WriteFilesWithCode(AOTIRCodeFileWriterFn Writer) override {
+        IRCaptureCache.WriteFilesWithCode(Writer);
+      }
+      void InvalidateGuestCodeRange(FEXCore::Core::InternalThreadState *Thread, uint64_t Start, uint64_t Length) override;
+      void InvalidateGuestCodeRange(FEXCore::Core::InternalThreadState *Thread, uint64_t Start, uint64_t Length, CodeRangeInvalidationFn callback) override;
+      void MarkMemoryShared() override;

-  void ClearCodeCache(FEXCore::Core::InternalThreadState* Thread) override;
-  void InvalidateGuestCodeRange(FEXCore::Core::InternalThreadState* Thread, uint64_t Start, uint64_t Length) override;
-  void InvalidateGuestCodeRange(FEXCore::Core::InternalThreadState* Thread, uint64_t Start, uint64_t Length, CodeRangeInvalidationFn callback) override;
-  FEXCore::ForkableSharedMutex& GetCodeInvalidationMutex() override {
-    return CodeInvalidationMutex;
-  }
+      void ConfigureAOTGen(FEXCore::Core::InternalThreadState *Thread, fextl::set<uint64_t> *ExternalBranches, uint64_t SectionMaxAddress) override;
+      // returns false if a handler was already registered
+      CustomIRResult AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void *Creator = nullptr, void *Data = nullptr) override;

-  void MarkMemoryShared(FEXCore::Core::InternalThreadState* Thread) override;
+      void AppendThunkDefinitions(fextl::vector<FEXCore::IR::ThunkDefinition> const& Definitions) override;

-  void ConfigureAOTGen(FEXCore::Core::InternalThreadState* Thread, fextl::set<uint64_t>* ExternalBranches, uint64_t SectionMaxAddress) override;
+    public:
+    friend class FEXCore::HLE::SyscallHandler;
+  #ifdef JIT_ARM64
+    friend class FEXCore::CPU::Arm64JITCore;
+  #endif
+  #ifdef JIT_X86_64
+    friend class FEXCore::CPU::X86JITCore;
+  #endif

-  bool IsAddressInCodeBuffer(FEXCore::Core::InternalThreadState* Thread, uintptr_t Address) const override;
+    friend class FEXCore::IR::Validation::IRValidation;

-  // returns false if a handler was already registered
-  CustomIRResult AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void* Creator = nullptr, void* Data = nullptr);
+    struct {
+      CoreRunningMode RunningMode {CoreRunningMode::MODE_RUN};
+      uint64_t VirtualMemSize{1ULL << 36};

-  void AppendThunkDefinitions(std::span<const FEXCore::IR::ThunkDefinition> Definitions) override;
+      // this is for internal use
+      bool ValidateIRarser { false };

-public:
-  friend class FEXCore::HLE::SyscallHandler;
-#ifdef JIT_ARM64
-  friend class FEXCore::CPU::Arm64JITCore;
-#endif
+      // Used if the JIT needs to have its interrupt fault code emitted.
+      bool NeedsPendingInterruptFaultCheck { false };

-  friend class FEXCore::IR::Validation::IRValidation;
+      FEX_CONFIG_OPT(Multiblock, MULTIBLOCK);
+      FEX_CONFIG_OPT(SingleStepConfig, SINGLESTEP);
+      FEX_CONFIG_OPT(GdbServer, GDBSERVER);
+      FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
+      FEX_CONFIG_OPT(TSOEnabled, TSOENABLED);
+      FEX_CONFIG_OPT(TSOAutoMigration, TSOAUTOMIGRATION);
+      FEX_CONFIG_OPT(ABILocalFlags, ABILOCALFLAGS);
+      FEX_CONFIG_OPT(AOTIRCapture, AOTIRCAPTURE);
+      FEX_CONFIG_OPT(AOTIRGenerate, AOTIRGENERATE);
+      FEX_CONFIG_OPT(AOTIRLoad, AOTIRLOAD);
+      FEX_CONFIG_OPT(SMCChecks, SMCCHECKS);
+      FEX_CONFIG_OPT(Core, CORE);
+      FEX_CONFIG_OPT(MaxInstPerBlock, MAXINST);
+      FEX_CONFIG_OPT(RootFSPath, ROOTFS);
+      FEX_CONFIG_OPT(ThunkHostLibsPath, THUNKHOSTLIBS);
+      FEX_CONFIG_OPT(ThunkHostLibsPath32, THUNKHOSTLIBS32);
+      FEX_CONFIG_OPT(ThunkConfigFile, THUNKCONFIG);
+      FEX_CONFIG_OPT(StaticRegisterAllocation, SRA);
+      FEX_CONFIG_OPT(GlobalJITNaming, GLOBALJITNAMING);
+      FEX_CONFIG_OPT(LibraryJITNaming, LIBRARYJITNAMING);
+      FEX_CONFIG_OPT(BlockJITNaming, BLOCKJITNAMING);
+      FEX_CONFIG_OPT(GDBSymbols, GDBSYMBOLS);
+      FEX_CONFIG_OPT(ParanoidTSO, PARANOIDTSO);
+      FEX_CONFIG_OPT(CacheObjectCodeCompilation, CACHEOBJECTCODECOMPILATION);
+      FEX_CONFIG_OPT(x87ReducedPrecision, X87REDUCEDPRECISION);
+      FEX_CONFIG_OPT(DisableTelemetry, DISABLETELEMETRY);
+      FEX_CONFIG_OPT(DisableVixlIndirectCalls, DISABLE_VIXL_INDIRECT_RUNTIME_CALLS);
+    } Config;

-  struct {
-    CoreRunningMode RunningMode {CoreRunningMode::MODE_RUN};
-    uint64_t VirtualMemSize {1ULL << 36};
-    uint64_t TSCScale = 0;
+    FEXCore::HostFeatures HostFeatures;

-    // Used if the JIT needs to have its interrupt fault code emitted.
-    bool NeedsPendingInterruptFaultCheck {false};
+    std::mutex ThreadCreationMutex;
+    FEXCore::Core::InternalThreadState* ParentThread{};
+    fextl::vector<FEXCore::Core::InternalThreadState*> Threads;
+    std::atomic_bool CoreShuttingDown{false};
+    bool NeedToCheckXID{true};

-    FEX_CONFIG_OPT(Multiblock, MULTIBLOCK);
-    FEX_CONFIG_OPT(SingleStepConfig, SINGLESTEP);
-    FEX_CONFIG_OPT(GdbServer, GDBSERVER);
-    FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
-    FEX_CONFIG_OPT(TSOEnabled, TSOENABLED);
-    FEX_CONFIG_OPT(TSOAutoMigration, TSOAUTOMIGRATION);
-    FEX_CONFIG_OPT(VectorTSOEnabled, VECTORTSOENABLED);
-    FEX_CONFIG_OPT(MemcpySetTSOEnabled, MEMCPYSETTSOENABLED);
-    FEX_CONFIG_OPT(ABILocalFlags, ABILOCALFLAGS);
-    FEX_CONFIG_OPT(AOTIRCapture, AOTIRCAPTURE);
-    FEX_CONFIG_OPT(AOTIRGenerate, AOTIRGENERATE);
-    FEX_CONFIG_OPT(AOTIRLoad, AOTIRLOAD);
-    FEX_CONFIG_OPT(SMCChecks, SMCCHECKS);
-    FEX_CONFIG_OPT(Core, CORE);
-    FEX_CONFIG_OPT(MaxInstPerBlock, MAXINST);
-    FEX_CONFIG_OPT(RootFSPath, ROOTFS);
-    FEX_CONFIG_OPT(ThunkHostLibsPath, THUNKHOSTLIBS);
-    FEX_CONFIG_OPT(ThunkHostLibsPath32, THUNKHOSTLIBS32);
-    FEX_CONFIG_OPT(ThunkConfigFile, THUNKCONFIG);
-    FEX_CONFIG_OPT(GlobalJITNaming, GLOBALJITNAMING);
-    FEX_CONFIG_OPT(LibraryJITNaming, LIBRARYJITNAMING);
-    FEX_CONFIG_OPT(BlockJITNaming, BLOCKJITNAMING);
-    FEX_CONFIG_OPT(GDBSymbols, GDBSYMBOLS);
-    FEX_CONFIG_OPT(ParanoidTSO, PARANOIDTSO);
-    FEX_CONFIG_OPT(CacheObjectCodeCompilation, CACHEOBJECTCODECOMPILATION);
-    FEX_CONFIG_OPT(x87ReducedPrecision, X87REDUCEDPRECISION);
-    FEX_CONFIG_OPT(DisableTelemetry, DISABLETELEMETRY);
-    FEX_CONFIG_OPT(DisableVixlIndirectCalls, DISABLE_VIXL_INDIRECT_RUNTIME_CALLS);
-    FEX_CONFIG_OPT(SmallTSCScale, SMALLTSCSCALE);
-    FEX_CONFIG_OPT(StrictInProcessSplitLocks, STRICTINPROCESSSPLITLOCKS);
-  } Config;
+    std::mutex IdleWaitMutex;
+    std::condition_variable IdleWaitCV;
+    std::atomic<uint32_t> IdleWaitRefCount{};

-  std::atomic_bool CoreShuttingDown {false};
+    Event PauseWait;
+    bool Running{};

-  FEXCore::ForkableSharedMutex CodeInvalidationMutex;
+    FEXCore::ForkableSharedMutex CodeInvalidationMutex;

-  uint32_t StrictSplitLockMutex {};
+    FEXCore::CPUIDEmu CPUID;
+    FEXCore::HLE::SyscallHandler *SyscallHandler{};
+    FEXCore::HLE::SourcecodeResolver *SourcecodeResolver{};
+    fextl::unique_ptr<FEXCore::ThunkHandler> ThunkHandler;
+    fextl::unique_ptr<FEXCore::CPU::Dispatcher> Dispatcher;

-  FEXCore::HostFeatures HostFeatures;
-  // CPUID depends on HostFeatures so needs to be initialized after that.
-  FEXCore::CPUIDEmu CPUID;
-  FEXCore::HLE::SyscallHandler* SyscallHandler {};
-  FEXCore::HLE::SourcecodeResolver* SourcecodeResolver {};
-  fextl::unique_ptr<FEXCore::ThunkHandler> ThunkHandler;
-  fextl::unique_ptr<FEXCore::CPU::Dispatcher> Dispatcher;
-
-  CustomCPUFactoryType CustomCPUFactory;
-  FEXCore::Context::ExitHandler CustomExitHandler;
+    CustomCPUFactoryType CustomCPUFactory;
+    FEXCore::Context::ExitHandler CustomExitHandler;

 #ifdef BLOCKSTATS
-  fextl::unique_ptr<FEXCore::BlockSamplingData> BlockData;
+    fextl::unique_ptr<FEXCore::BlockSamplingData> BlockData;
 #endif

-  SignalDelegator* SignalDelegation {};
-  X86GeneratedCode X86CodeGen;
+    SignalDelegator *SignalDelegation{};
+    X86GeneratedCode X86CodeGen;

-  ContextImpl(const FEXCore::HostFeatures& Features);
-  ~ContextImpl();
+    ContextImpl();
+    ~ContextImpl();

-  static void ThreadRemoveCodeEntry(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP);
-  static void ThreadAddBlockLink(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestDestination,
-                                 FEXCore::Context::ExitFunctionLinkData* HostLink, const BlockDelinkerFunc& delinker);
+    bool IsPaused() const { return !Running; }
+    void WaitForThreadsToRun() override;
+    void Stop(bool IgnoreCurrentThread);
+    void WaitForIdle() override;
+    void SignalThread(FEXCore::Core::InternalThreadState *Thread, FEXCore::Core::SignalEvent Event);

-  template<auto Fn>
-  static uint64_t ThreadExitFunctionLink(FEXCore::Core::CpuStateFrame* Frame, ExitFunctionLinkData* Record) {
-    auto Thread = Frame->Thread;
-    auto lk = GuardSignalDeferringSection<std::shared_lock>(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);
+    bool GetGdbServerStatus() const { return DebugServer != nullptr; }
+    void StartGdbServer();
+    void StopGdbServer();

-    return Fn(Frame, Record);
-  }
+    static void ThreadRemoveCodeEntry(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP);
+    static void ThreadAddBlockLink(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestDestination, uintptr_t HostLink, const std::function<void()> &delinker);

-  // Wrapper which takes CpuStateFrame instead of InternalThreadState and unique_locks CodeInvalidationMutex
-  // Must be called from owning thread
-  static void ThreadRemoveCodeEntryFromJit(FEXCore::Core::CpuStateFrame* Frame, uint64_t GuestRIP) {
-    auto Thread = Frame->Thread;
-    auto lk = GuardSignalDeferringSection(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);
+    template<auto Fn>
+    static uint64_t ThreadExitFunctionLink(FEXCore::Core::CpuStateFrame *Frame, uint64_t *record) {
+      auto Thread = Frame->Thread;
+      ScopedDeferredSignalWithForkableSharedLock lk(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);

-    ThreadRemoveCodeEntry(Thread, GuestRIP);
-  }
-
-  void RemoveCustomIREntrypoint(uintptr_t Entrypoint);
-
-  struct GenerateIRResult {
-    fextl::unique_ptr<FEXCore::IR::IRStorageBase> IR;
-    uint64_t TotalInstructions;
-    uint64_t TotalInstructionsLength;
-    uint64_t StartAddr;
-    uint64_t Length;
-  };
-  [[nodiscard]]
-  GenerateIRResult GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, bool ExtendedDebugInfo, uint64_t MaxInst);
-
-  struct CompileCodeResult {
-    void* CompiledCode;
-    fextl::unique_ptr<FEXCore::IR::IRStorageBase> IR;
-    FEXCore::Core::DebugData* DebugData;
-    bool GeneratedIR;
-    uint64_t StartAddr;
-    uint64_t Length;
-  };
-  [[nodiscard]]
-  CompileCodeResult CompileCode(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, uint64_t MaxInst = 0);
-  uintptr_t CompileBlock(FEXCore::Core::CpuStateFrame* Frame, uint64_t GuestRIP, uint64_t MaxInst = 0);
-
-  // Used for thread creation from syscalls
-  /**
-   * @brief Initializes TID, PID and TLS data for a thread
-   *
-   * @param Thread The internal FEX thread state object
-   */
-  void InitializeThreadTLSData(FEXCore::Core::InternalThreadState* Thread);
-
-  void CopyMemoryMapping(FEXCore::Core::InternalThreadState* ParentThread, FEXCore::Core::InternalThreadState* ChildThread);
-
-  uint8_t GetGPRSize() const {
-    return Config.Is64BitMode ? 8 : 4;
-  }
-
-  FEXCore::JITSymbols Symbols;
-
-  FEXCore::Utils::PooledAllocatorVirtual OpDispatcherAllocator;
-  FEXCore::Utils::PooledAllocatorVirtual FrontendAllocator;
-
-  // If Atomic-based TSO emulation is enabled or not.
-  bool IsAtomicTSOEnabled() const {
-    return AtomicTSOEmulationEnabled;
-  }
-
-  // If atomic-based TSO emulation is enabled for vector operations.
-  bool IsVectorAtomicTSOEnabled() const {
-    return VectorAtomicTSOEmulationEnabled;
-  }
-
-  // If atomic-based TSO emulation is enabled for memcpy operations.
-  bool IsMemcpyAtomicTSOEnabled() const {
-    return MemcpyAtomicTSOEmulationEnabled;
-  }
-
-  void SetHardwareTSOSupport(bool HardwareTSOSupported) override {
-    SupportsHardwareTSO = HardwareTSOSupported;
-    UpdateAtomicTSOEmulationConfig();
-  }
-
-  void EnableExitOnHLT() override {
-    ExitOnHLT = true;
-  }
-
-  bool ExitOnHLTEnabled() const {
-    return ExitOnHLT;
-  }
-
-protected:
-  void UpdateAtomicTSOEmulationConfig() {
-    if (SupportsHardwareTSO) {
-      // If the hardware supports TSO then we don't need to emulate it through atomics.
-      AtomicTSOEmulationEnabled = false;
-      VectorAtomicTSOEmulationEnabled = false;
-      MemcpyAtomicTSOEmulationEnabled = false;
-    } else {
-      // Atomic TSO emulation only enabled if the config option is enabled.
-      AtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled;
-      // Atomic vector TSO emulation only enabled if TSO emulation is enabled and also vector TSO is enabled.
-      VectorAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.VectorTSOEnabled;
-      // Atomic memcpy TSO emulation only enabled if TSO emulation is enabled and also memcpy TSO is enabled.
-      MemcpyAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.MemcpySetTSOEnabled;
+      return Fn(Frame, record);
    }
-  }

-private:
-  /**
-   * @brief Initializes the JIT compilers for the thread
-   *
-   * @param State The internal FEX thread state object
-   *
-   * InitializeCompiler is called inside of CreateThread, so you likely don't need this
-   */
-  void InitializeCompiler(FEXCore::Core::InternalThreadState* Thread);
+    // Wrapper which takes CpuStateFrame instead of InternalThreadState and unique_locks CodeInvalidationMutex
+    // Must be called from owning thread
+    static void ThreadRemoveCodeEntryFromJit(FEXCore::Core::CpuStateFrame *Frame, uint64_t GuestRIP) {
+      auto Thread = Frame->Thread;

-  void AddBlockMapping(FEXCore::Core::InternalThreadState* Thread, uint64_t Address, void* Ptr);
+      LogMan::Throw::AFmt(Thread->ThreadManager.GetTID() == FHU::Syscalls::gettid(), "Must be called from owning thread {}, not {}", Thread->ThreadManager.GetTID(), FHU::Syscalls::gettid());
+      ScopedDeferredSignalWithForkableUniqueLock lk(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);

-  IR::AOTIRCaptureCache IRCaptureCache;
-  fextl::unique_ptr<FEXCore::CodeSerialize::CodeObjectSerializeService> CodeObjectCacheService;
+      ThreadRemoveCodeEntry(Thread, GuestRIP);
+    }

-  bool StartPaused = false;
-  bool IsMemoryShared = false;
-  bool SupportsHardwareTSO = false;
-  bool AtomicTSOEmulationEnabled = true;
-  bool VectorAtomicTSOEmulationEnabled = false;
-  bool MemcpyAtomicTSOEmulationEnabled = false;
+    void RemoveCustomIREntrypoint(uintptr_t Entrypoint);

-  bool ExitOnHLT = false;
-  FEX_CONFIG_OPT(AppFilename, APP_FILENAME);
+    struct GenerateIRResult {
+      FEXCore::IR::IRListView* IRList;
+      FEXCore::IR::RegisterAllocationData::UniquePtr RAData;
+      uint64_t TotalInstructions;
+      uint64_t TotalInstructionsLength;
+      uint64_t StartAddr;
+      uint64_t Length;
+    };
+    [[nodiscard]] GenerateIRResult GenerateIR(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP, bool ExtendedDebugInfo, uint64_t MaxInst);

-  std::shared_mutex CustomIRMutex;
-  std::atomic<bool> HasCustomIRHandlers {};
-  fextl::unordered_map<uint64_t, std::tuple<CustomIREntrypointHandler, void*, void*>> CustomIRHandlers;
-};
-} // namespace FEXCore::Context
+    struct CompileCodeResult {
+      void* CompiledCode;
+      FEXCore::IR::IRListView* IRData;
+      FEXCore::Core::DebugData* DebugData;
+      FEXCore::IR::RegisterAllocationData::UniquePtr RAData;
+      bool GeneratedIR;
+      uint64_t StartAddr;
+      uint64_t Length;
+    };
+    [[nodiscard]] CompileCodeResult CompileCode(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP, uint64_t MaxInst = 0);
+    uintptr_t CompileBlock(FEXCore::Core::CpuStateFrame *Frame, uint64_t GuestRIP, uint64_t MaxInst = 0);
+
+    // same as CompileBlock, but aborts on failure
+    void CompileBlockJit(FEXCore::Core::CpuStateFrame *Frame, uint64_t GuestRIP);
+
+    // Used for thread creation from syscalls
+    /**
+     * @brief Initializes TID, PID and TLS data for a thread
+     *
+     * @param Thread The internal FEX thread state object
+     */
+    void InitializeThreadTLSData(FEXCore::Core::InternalThreadState *Thread);
+
+    void CopyMemoryMapping(FEXCore::Core::InternalThreadState *ParentThread, FEXCore::Core::InternalThreadState *ChildThread);
+
+    uint8_t GetGPRSize() const { return Config.Is64BitMode ? 8 : 4; }
+
+    FEXCore::JITSymbols Symbols;
+
+    void GetVDSOSigReturn(VDSOSigReturn *VDSOPointers) override {
+      if (VDSOPointers->VDSO_kernel_sigreturn == nullptr) {
+        VDSOPointers->VDSO_kernel_sigreturn = reinterpret_cast<void*>(X86CodeGen.sigreturn_32);
+      }
+
+      if (VDSOPointers->VDSO_kernel_rt_sigreturn == nullptr) {
+        VDSOPointers->VDSO_kernel_rt_sigreturn = reinterpret_cast<void*>(X86CodeGen.rt_sigreturn_32);
+      }
+    }
+
+    void IncrementIdleRefCount() override {
+      ++IdleWaitRefCount;
+    }
+
+    FEXCore::Utils::PooledAllocatorVirtual OpDispatcherAllocator;
+    FEXCore::Utils::PooledAllocatorVirtual FrontendAllocator;
+
+    // If Atomic-based TSO emulation is enabled or not.
+    bool IsAtomicTSOEnabled() const { return AtomicTSOEmulationEnabled; }
+
+    void SetHardwareTSOSupport(bool HardwareTSOSupported) override {
+      SupportsHardwareTSO = HardwareTSOSupported;
+      UpdateAtomicTSOEmulationConfig();
+    }
+
+    // Returns if Software TSO emulation is required.
+    // NOTE: This doesn't necessary return if Atomic-based TSO is currently enabled.
+    // This will still return true if on a single thread and TSO is currently disabled.
+    //
+    // This is to ensure that if early initialization checks CPU features and TSO /could/ be enabled, that
+    // we return consistent results.
+    //
+    // To check if Atomic TSO is currently enabled in the JIT, use `IsAtomicTSOEnabled` instead.
+    bool SoftwareTSORequired() const {
+      if (SupportsHardwareTSO) return false;
+
+      return Config.TSOEnabled;
+    }
+
+    void EnableExitOnHLT() override { ExitOnHLT = true; }
+
+    bool ExitOnHLTEnabled() const { return ExitOnHLT; }
+
+    ThreadsState GetThreads() override  {
+      return ThreadsState {
+        .ParentThread = ParentThread,
+        .Threads = &Threads,
+      };
+    }
+
+    FEXCore::CPU::CPUBackendFeatures BackendFeatures;
+
+  protected:
+    void ClearCodeCache(FEXCore::Core::InternalThreadState *Thread);
+
+    void UpdateAtomicTSOEmulationConfig() {
+      if (SupportsHardwareTSO) {
+        // If the hardware supports TSO then we don't need to emulate it through atomics.
+        AtomicTSOEmulationEnabled = false;
+      }
+      else {
+        // Atomic TSO emulation only enabled if the config option is enabled.
+        AtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled;
+      }
+    }
+
+  private:
+    /**
+     * @brief Does some final thread initialization
+     *
+     * @param Thread The internal FEX thread state object
+     *
+     * InitCore and CreateThread both call this to finish up thread object initialization
+     */
+    void InitializeThreadData(FEXCore::Core::InternalThreadState *Thread);
+
+    /**
+     * @brief Initializes the JIT compilers for the thread
+     *
+     * @param State The internal FEX thread state object
+     *
+     * InitializeCompiler is called inside of CreateThread, so you likely don't need this
+     */
+    void InitializeCompiler(FEXCore::Core::InternalThreadState* Thread);
+
+    void WaitForIdleWithTimeout();
+
+    void NotifyPause();
+
+    void AddBlockMapping(FEXCore::Core::InternalThreadState *Thread, uint64_t Address, void *Ptr);
+
+    // Entry Cache
+    std::mutex ExitMutex;
+    fextl::unique_ptr<GdbServer> DebugServer;
+
+    IR::AOTIRCaptureCache IRCaptureCache;
+    fextl::unique_ptr<FEXCore::CodeSerialize::CodeObjectSerializeService> CodeObjectCacheService;
+
+    bool StartPaused = false;
+    bool IsMemoryShared = false;
+    bool SupportsHardwareTSO = false;
+    bool AtomicTSOEmulationEnabled = true;
+    bool ExitOnHLT = false;
+    FEX_CONFIG_OPT(AppFilename, APP_FILENAME);
+
+    std::shared_mutex CustomIRMutex;
+    fextl::unordered_map<uint64_t, std::tuple<CustomIREntrypointHandler, void *, void *>> CustomIRHandlers;
+    FEXCore::CPU::DispatcherConfig DispatcherConfig;
+  };
+
+  uint64_t HandleSyscall(FEXCore::HLE::SyscallHandler *Handler, FEXCore::Core::CpuStateFrame *Frame, FEXCore::HLE::SyscallArguments *Args);
+}
@@ -2,8 +2,16 @@
 #pragma once

 #include "FEXCore/Utils/EnumUtils.h"
+#include "Interface/Core/ArchHelpers/CodeEmitter/Emitter.h"
+#include "Interface/Core/ArchHelpers/CodeEmitter/Registers.h"
+
 #include "Interface/Core/ObjectCache/Relocations.h"

+#include <aarch64/assembler-aarch64.h>
+#include <aarch64/constants-aarch64.h>
+#include <aarch64/cpu-aarch64.h>
+#include <aarch64/operands-aarch64.h>
+#include <platform-vixl.h>
 #ifdef VIXL_DISASSEMBLER
 #include <aarch64/disasm-aarch64.h>
 #endif
@@ -12,11 +20,7 @@
 #include <aarch64/simulator-constants-aarch64.h>
 #endif

-#include <FEXCore/Core/X86Enums.h>
 #include <FEXCore/Config/Config.h>
-#include <FEXCore/fextl/vector.h>
-#include <CodeEmitter/Emitter.h>
-#include <CodeEmitter/Registers.h>

 #include <array>
 #include <cstddef>
@@ -30,89 +34,64 @@ class ContextImpl;

 namespace FEXCore::CPU {
 // Contains the address to the currently available CPU state
-constexpr auto STATE = ARMEmitter::XReg::x28;
+constexpr auto STATE = FEXCore::ARMEmitter::XReg::x28;

-#ifndef _M_ARM_64EC
 // GPR temporaries. Only x3 can be used across spill boundaries
 // so if these ever need to change, be very careful about that.
-constexpr auto TMP1 = ARMEmitter::XReg::x0;
-constexpr auto TMP2 = ARMEmitter::XReg::x1;
-constexpr auto TMP3 = ARMEmitter::XReg::x2;
-constexpr auto TMP4 = ARMEmitter::XReg::x3;
-constexpr bool TMP_ABIARGS = true;
-
-// We pin r26/r27 as PF/AF respectively, this is internal FEX ABI.
-constexpr auto REG_PF = ARMEmitter::Reg::r26;
-constexpr auto REG_AF = ARMEmitter::Reg::r27;
+constexpr auto TMP1 = FEXCore::ARMEmitter::XReg::x0;
+constexpr auto TMP2 = FEXCore::ARMEmitter::XReg::x1;
+constexpr auto TMP3 = FEXCore::ARMEmitter::XReg::x2;
+constexpr auto TMP4 = FEXCore::ARMEmitter::XReg::x3;

 // Vector temporaries
-constexpr auto VTMP1 = ARMEmitter::VReg::v0;
-constexpr auto VTMP2 = ARMEmitter::VReg::v1;
-#else
-constexpr auto TMP1 = ARMEmitter::XReg::x10;
-constexpr auto TMP2 = ARMEmitter::XReg::x11;
-constexpr auto TMP3 = ARMEmitter::XReg::x12;
-constexpr auto TMP4 = ARMEmitter::XReg::x13;
-constexpr bool TMP_ABIARGS = false;
-
-// We pin r11/r12 as PF/AF respectively for arm64ec, as r26/r27 are used for SRA.
-constexpr auto REG_PF = ARMEmitter::Reg::r9;
-constexpr auto REG_AF = ARMEmitter::Reg::r24;
-
-// Vector temporaries
-constexpr auto VTMP1 = ARMEmitter::VReg::v16;
-constexpr auto VTMP2 = ARMEmitter::VReg::v17;
-
-// Entry/Exit ABI
-constexpr auto EC_CALL_CHECKER_PC_REG = ARMEmitter::XReg::x9;
-constexpr auto EC_ENTRY_CPUAREA_REG = ARMEmitter::XReg::x17;
-
-// These structures are not included in the standard Windows headers, define the offsets of members we care about for EC here.
-constexpr size_t TEB_CPU_AREA_OFFSET = 0x1788;
-constexpr size_t TEB_PEB_OFFSET = 0x60;
-constexpr size_t PEB_EC_CODE_BITMAP_OFFSET = 0x368;
-constexpr size_t CPU_AREA_IN_SYSCALL_CALLBACK_OFFSET = 0x1;
-constexpr size_t CPU_AREA_EMULATOR_STACK_BASE_OFFSET = 0x8;
-constexpr size_t CPU_AREA_EMULATOR_DATA_OFFSET = 0x30;
-#endif
+constexpr auto VTMP1 = FEXCore::ARMEmitter::VReg::v0;
+constexpr auto VTMP2 = FEXCore::ARMEmitter::VReg::v1;

 // Predicate register temporaries (used when AVX support is enabled)
 // PRED_TMP_16B indicates a predicate register that indicates the first 16 bytes set to 1.
 // PRED_TMP_32B indicates a predicate register that indicates the first 32 bytes set to 1.
-constexpr ARMEmitter::PRegister PRED_TMP_16B = ARMEmitter::PReg::p6;
-constexpr ARMEmitter::PRegister PRED_TMP_32B = ARMEmitter::PReg::p7;
-
+constexpr FEXCore::ARMEmitter::PRegister PRED_TMP_16B = FEXCore::ARMEmitter::PReg::p6;
+constexpr FEXCore::ARMEmitter::PRegister PRED_TMP_32B = FEXCore::ARMEmitter::PReg::p7;

 // This class contains common emitter utility functions that can
 // be used by both Arm64 JIT and ARM64 Dispatcher
-class Arm64Emitter : public ARMEmitter::Emitter {
+class Arm64Emitter : public FEXCore::ARMEmitter::Emitter {
 protected:
-  Arm64Emitter(FEXCore::Context::ContextImpl* ctx, void* EmissionPtr = nullptr, size_t size = 0);
+  Arm64Emitter(FEXCore::Context::ContextImpl *ctx, void* EmissionPtr = nullptr, size_t size = 0);

-  FEXCore::Context::ContextImpl* EmitterCTX;
+  FEXCore::Context::ContextImpl *EmitterCTX;
+  vixl::aarch64::CPU CPU;

-  std::span<const ARMEmitter::Register> ConfiguredDynamicRegisterBase {};
-  std::span<const ARMEmitter::Register> StaticRegisters {};
-  std::span<const ARMEmitter::Register> GeneralRegisters {};
-  std::span<const ARMEmitter::VRegister> StaticFPRegisters {};
-  std::span<const ARMEmitter::VRegister> GeneralFPRegisters {};
-  uint32_t PairRegisters = 0;
+  std::span<const FEXCore::ARMEmitter::Register> ConfiguredDynamicRegisterBase{};
+  std::span<const FEXCore::ARMEmitter::Register> StaticRegisters{};
+  std::span<const FEXCore::ARMEmitter::Register> GeneralRegisters{};
+  std::span<const std::pair<FEXCore::ARMEmitter::Register, FEXCore::ARMEmitter::Register>> GeneralPairRegisters{};
+  std::span<const FEXCore::ARMEmitter::VRegister> StaticFPRegisters{};
+  std::span<const FEXCore::ARMEmitter::VRegister> GeneralFPRegisters{};

-  void LoadConstant(ARMEmitter::Size s, ARMEmitter::Register Reg, uint64_t Constant, bool NOPPad = false);
+  /**
+   * @name Register Allocation
+   * @{ */
+  constexpr static uint32_t RegisterClasses = 6;

-  void FillSpecialRegs(ARMEmitter::Register TmpReg, ARMEmitter::Register TmpReg2, bool SetFIZ, bool SetPredRegs);
+  constexpr static uint64_t GPRBase = (0ULL << 32);
+  constexpr static uint64_t FPRBase = (1ULL << 32);
+  constexpr static uint64_t GPRPairBase = (2ULL << 32);
+
+  /**  @} */
+
+  constexpr static uint8_t RA_32 = 0;
+  constexpr static uint8_t RA_64 = 1;
+  constexpr static uint8_t RA_FPR = 2;
+
+  void LoadConstant(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register Reg, uint64_t Constant, bool NOPPad = false);

-  // Correlate an ARM register back to an x86 register index.
-  // Returning REG_INVALID if there was no mapping.
-  FEXCore::X86State::X86Reg GetX86RegRelationToARMReg(ARMEmitter::Register Reg);

  // NOTE: These functions WILL clobber the register TMP4 if AVX support is enabled
  //       and FPRs are being spilled or filled. If only GPRs are spilled/filled, then
  //       TMP4 is left alone.
-  void SpillStaticRegs(ARMEmitter::Register TmpReg, bool FPRs = true, uint32_t GPRSpillMask = ~0U, uint32_t FPRSpillMask = ~0U);
-  void FillStaticRegs(bool FPRs = true, uint32_t GPRFillMask = ~0U, uint32_t FPRFillMask = ~0U,
-                      std::optional<ARMEmitter::Register> OptionalReg = std::nullopt,
-                      std::optional<ARMEmitter::Register> OptionalReg2 = std::nullopt);
+  void SpillStaticRegs(FEXCore::ARMEmitter::Register TmpReg, bool FPRs = true, uint32_t GPRSpillMask = ~0U, uint32_t FPRSpillMask = ~0U);
+  void FillStaticRegs(bool FPRs = true, uint32_t GPRFillMask = ~0U, uint32_t FPRFillMask = ~0U);

  // Register 0-18 + 29 + 30 are caller saved
  static constexpr uint32_t CALLER_GPR_MASK = 0b0110'0000'0000'0111'1111'1111'1111'1111U;
@@ -122,13 +101,13 @@ protected:
  static constexpr uint32_t CALLER_FPR_MASK = ~0U;

  // Generic push and pop vector registers.
-  void PushVectorRegisters(ARMEmitter::Register TmpReg, bool SVERegs, std::span<const ARMEmitter::VRegister> VRegs);
-  void PushGeneralRegisters(ARMEmitter::Register TmpReg, std::span<const ARMEmitter::Register> Regs);
+  void PushVectorRegisters(FEXCore::ARMEmitter::Register TmpReg, bool SVERegs, std::span<const FEXCore::ARMEmitter::VRegister> VRegs);
+  void PushGeneralRegisters(FEXCore::ARMEmitter::Register TmpReg, std::span<const FEXCore::ARMEmitter::Register> Regs);

-  void PopVectorRegisters(bool SVERegs, std::span<const ARMEmitter::VRegister> VRegs);
-  void PopGeneralRegisters(std::span<const ARMEmitter::Register> Regs);
+  void PopVectorRegisters(bool SVERegs, std::span<const FEXCore::ARMEmitter::VRegister> VRegs);
+  void PopGeneralRegisters(std::span<const FEXCore::ARMEmitter::Register> Regs);

-  void PushDynamicRegsAndLR(ARMEmitter::Register TmpReg);
+  void PushDynamicRegsAndLR(FEXCore::ARMEmitter::Register TmpReg);
  void PopDynamicRegsAndLR();

  void PushCalleeSavedRegisters();
@@ -144,24 +123,26 @@ protected:
  // Callee Saved:
  // - X9-X15, X19-X31
  // - Low 128-bits of v8-v31
-  void SpillForPreserveAllABICall(ARMEmitter::Register TmpReg, bool FPRs = true);
+  void SpillForPreserveAllABICall(FEXCore::ARMEmitter::Register TmpReg, bool FPRs = true);
  void FillForPreserveAllABICall(bool FPRs = true);

-  void SpillForABICall(bool SupportsPreserveAllABI, ARMEmitter::Register TmpReg, bool FPRs = true) {
+  void SpillForABICall(bool SupportsPreserveAllABI, FEXCore::ARMEmitter::Register TmpReg, bool FPRs = true) {
    if (SupportsPreserveAllABI) {
-      SpillForPreserveAllABICall(TmpReg, FPRs);
-    } else {
-      SpillStaticRegs(TmpReg, FPRs);
-      PushDynamicRegsAndLR(TmpReg);
+      SpillForPreserveAllABICall(TMP1, true);
+    }
+    else {
+      SpillStaticRegs(TMP1);
+      PushDynamicRegsAndLR(TMP1);
    }
  }

  void FillForABICall(bool SupportsPreserveAllABI, bool FPRs = true) {
    if (SupportsPreserveAllABI) {
-      FillForPreserveAllABICall(FPRs);
-    } else {
+      FillForPreserveAllABICall(true);
+    }
+    else {
      PopDynamicRegsAndLR();
-      FillStaticRegs(FPRs);
+      FillStaticRegs();
    }
  }

@@ -181,7 +162,8 @@ protected:

  template<typename R, typename... P>
  void GenerateRuntimeCall(R (*Function)(P...)) {
-    uintptr_t SimulatorWrapperAddress = reinterpret_cast<uintptr_t>(&(vixl::aarch64::Simulator::RuntimeCallStructHelper<R, P...>::Wrapper));
+    uintptr_t SimulatorWrapperAddress = reinterpret_cast<uintptr_t>(
+      &(vixl::aarch64::Simulator::RuntimeCallStructHelper<R, P...>::Wrapper));

    uintptr_t FunctionAddress = reinterpret_cast<uintptr_t>(Function);

@@ -199,7 +181,8 @@ protected:

  template<typename R, typename... P>
  void GenerateIndirectRuntimeCall(ARMEmitter::Register Reg) {
-    uintptr_t SimulatorWrapperAddress = reinterpret_cast<uintptr_t>(&(vixl::aarch64::Simulator::RuntimeCallStructHelper<R, P...>::Wrapper));
+    uintptr_t SimulatorWrapperAddress = reinterpret_cast<uintptr_t>(
+      &(vixl::aarch64::Simulator::RuntimeCallStructHelper<R, P...>::Wrapper));

    hlt(vixl::aarch64::kIndirectRuntimeCallOpcode);

@@ -215,8 +198,8 @@ protected:

  template<>
  void GenerateIndirectRuntimeCall<float, __uint128_t>(ARMEmitter::Register Reg) {
-    uintptr_t SimulatorWrapperAddress =
-      reinterpret_cast<uintptr_t>(&(vixl::aarch64::Simulator::RuntimeCallStructHelper<float, __uint128_t>::Wrapper));
+    uintptr_t SimulatorWrapperAddress = reinterpret_cast<uintptr_t>(
+      &(vixl::aarch64::Simulator::RuntimeCallStructHelper<float, __uint128_t>::Wrapper));

    hlt(vixl::aarch64::kIndirectRuntimeCallOpcode);

@@ -243,17 +226,15 @@ protected:
 #ifdef VIXL_SIMULATOR
  vixl::aarch64::Decoder SimDecoder;
  vixl::aarch64::Simulator Simulator;
-  constexpr static size_t SimulatorStackSize = 8 * 1024 * 1024;
 #endif

 #ifdef VIXL_DISASSEMBLER
-  fextl::vector<char> DisasmBuffer;
-  constexpr static int DISASM_BUFFER_SIZE {256};
-  fextl::unique_ptr<vixl::aarch64::Disassembler> Disasm;
+  vixl::aarch64::Disassembler Disasm;
  fextl::unique_ptr<vixl::aarch64::Decoder> DisasmDecoder;

  FEX_CONFIG_OPT(Disassemble, DISASSEMBLE);
 #endif
+  FEX_CONFIG_OPT(StaticRegisterAllocation, SRA);
 };

-} // namespace FEXCore::CPU
+}
@@ -8,25 +8,23 @@ public:
  public:
    // Conditional branch immediate
    ///< Branch conditional
-    void b(ARMEmitter::Condition Cond, uint32_t Imm) {
+    void b(FEXCore::ARMEmitter::Condition Cond, uint32_t Imm) {
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 0, Cond, Imm);
    }
-    void b(ARMEmitter::Condition Cond, BackwardLabel const* Label) {
+    void b(FEXCore::ARMEmitter::Condition Cond, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 0, Cond, Imm >> 2);
    }
-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void b(ARMEmitter::Condition Cond, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::BC });
+    void b(FEXCore::ARMEmitter::Condition Cond, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::BC });
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 0, Cond, 0);
    }

-    void b(ARMEmitter::Condition Cond, BiDirectionalLabel *Label) {
+    void b(FEXCore::ARMEmitter::Condition Cond, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        b(Cond, &Label->Backward);
      }
@@ -36,26 +34,24 @@ public:
    }

    ///< Branch consistent conditional
-    void bc(ARMEmitter::Condition Cond, uint32_t Imm) {
+    void bc(FEXCore::ARMEmitter::Condition Cond, uint32_t Imm) {
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 1, Cond, Imm);
    }
-    void bc(ARMEmitter::Condition Cond, BackwardLabel const* Label) {
+    void bc(FEXCore::ARMEmitter::Condition Cond, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 1, Cond, Imm >> 2);
    }

-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void bc(ARMEmitter::Condition Cond, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::BC });
+    void bc(FEXCore::ARMEmitter::Condition Cond, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::BC });
      constexpr uint32_t Op = 0b0101'010 << 25;
      Branch_Conditional(Op, 0, 1, Cond, 0);
    }

-    void bc(ARMEmitter::Condition Cond, BiDirectionalLabel *Label) {
+    void bc(FEXCore::ARMEmitter::Condition Cond, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        bc(Cond, &Label->Backward);
      }
@@ -65,7 +61,7 @@ public:
    }

    // Unconditional branch register
-    void br(ARMEmitter::Register rn) {
+    void br(FEXCore::ARMEmitter::Register rn) {
      constexpr uint32_t Op = 0b1101011 << 25 |
                              0b0'000 << 21 |   // opc
                              0b1'1111 << 16 |  // op2
@@ -74,7 +70,7 @@ public:

      UnconditionalBranch(Op, rn);
    }
-    void blr(ARMEmitter::Register rn) {
+    void blr(FEXCore::ARMEmitter::Register rn) {
      constexpr uint32_t Op = 0b1101011 << 25 |
                              0b0'001 << 21 |   // opc
                              0b1'1111 << 16 |  // op2
@@ -83,7 +79,7 @@ public:

      UnconditionalBranch(Op, rn);
    }
-    void ret(ARMEmitter::Register rn = ARMEmitter::Reg::r30) {
+    void ret(FEXCore::ARMEmitter::Register rn = FEXCore::ARMEmitter::Reg::r30) {
      constexpr uint32_t Op = 0b1101011 << 25 |
                              0b0'010 << 21 |   // opc
                              0b1'1111 << 16 |  // op2
@@ -106,10 +102,8 @@ public:

      UnconditionalBranch(Op, Imm >> 2);
    }
-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void b(LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::B });
+    void b(ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::B });
      constexpr uint32_t Op = 0b0001'01 << 26;

      UnconditionalBranch(Op, 0);
@@ -137,10 +131,8 @@ public:

      UnconditionalBranch(Op, Imm >> 2);
    }
-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void bl(LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::B });
+    void bl(ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::B });
      constexpr uint32_t Op = 0b1001'01 << 26;

      UnconditionalBranch(Op, 0);
@@ -156,13 +148,13 @@ public:
    }

    // Compare and branch
-    void cbz(ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
+    void cbz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, uint32_t Imm) {
      constexpr uint32_t Op = 0b0011'0100 << 24;

      CompareAndBranch(Op, s, rt, Imm);
    }

-    void cbz(ARMEmitter::Size s, ARMEmitter::Register rt, BackwardLabel const* Label) {
+    void cbz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");

@@ -171,17 +163,15 @@ public:
      CompareAndBranch(Op, s, rt, Imm >> 2);
    }

-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void cbz(ARMEmitter::Size s, ARMEmitter::Register rt, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::BC });
+    void cbz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::BC });

      constexpr uint32_t Op = 0b0011'0100 << 24;

      CompareAndBranch(Op, s, rt, 0);
    }

-    void cbz(ARMEmitter::Size s, ARMEmitter::Register rt, BiDirectionalLabel *Label) {
+    void cbz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        cbz(s, rt, &Label->Backward);
      }
@@ -190,13 +180,13 @@ public:
      }
    }

-    void cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
+    void cbnz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, uint32_t Imm) {
      constexpr uint32_t Op = 0b0011'0101 << 24;

      CompareAndBranch(Op, s, rt, Imm);
    }

-    void cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, BackwardLabel const* Label) {
+    void cbnz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -1048576 && Imm <= 1048575 && ((Imm & 0b11) == 0), "Unscaled offset too large");

@@ -205,17 +195,15 @@ public:
      CompareAndBranch(Op, s, rt, Imm >> 2);
    }

-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::BC });
+    void cbnz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::BC });

      constexpr uint32_t Op = 0b0011'0101 << 24;

      CompareAndBranch(Op, s, rt, 0);
    }

-    void cbnz(ARMEmitter::Size s, ARMEmitter::Register rt, BiDirectionalLabel *Label) {
+    void cbnz(FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        cbnz(s, rt, &Label->Backward);
      }
@@ -225,12 +213,12 @@ public:
    }

    // Test and branch immediate
-    void tbz(ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
+    void tbz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
      constexpr uint32_t Op = 0b0011'0110 << 24;

      TestAndBranch(Op, rt, Bit, Imm);
    }
-    void tbz(ARMEmitter::Register rt, uint32_t Bit, BackwardLabel const* Label) {
+    void tbz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0), "Unscaled offset too large");

@@ -238,18 +226,15 @@ public:

      TestAndBranch(Op, rt, Bit, Imm >> 2);
    }
-
-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void tbz(ARMEmitter::Register rt, uint32_t Bit, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::TEST_BRANCH });
+    void tbz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::TEST_BRANCH });

      constexpr uint32_t Op = 0b0011'0110 << 24;

      TestAndBranch(Op, rt, Bit, 0);
    }

-    void tbz(ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel *Label) {
+    void tbz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        tbz(rt, Bit, &Label->Backward);
      }
@@ -258,12 +243,12 @@ public:
      }
    }

-    void tbnz(ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
+    void tbnz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
      constexpr uint32_t Op = 0b0011'0111 << 24;

      TestAndBranch(Op, rt, Bit, Imm);
    }
-    void tbnz(ARMEmitter::Register rt, uint32_t Bit, BackwardLabel const* Label) {
+    void tbnz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, BackwardLabel const* Label) {
      int32_t Imm = static_cast<int32_t>(Label->Location - GetCursorAddress<uint8_t*>());
      LOGMAN_THROW_A_FMT(Imm >= -32768 && Imm <= 32764 && ((Imm & 0b11) == 0), "Unscaled offset too large");

@@ -271,17 +256,14 @@ public:

      TestAndBranch(Op, rt, Bit, Imm >> 2);
    }
-
-    template<typename LabelType>
-    requires (std::is_same_v<LabelType, ForwardLabel> || std::is_same_v<LabelType, SingleUseForwardLabel>)
-    void tbnz(ARMEmitter::Register rt, uint32_t Bit, LabelType *Label) {
-      AddLocationToLabel(Label, SingleUseForwardLabel{ .Location = GetCursorAddress<uint8_t*>(), .Type = SingleUseForwardLabel::InstType::TEST_BRANCH });
+    void tbnz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, ForwardLabel *Label) {
+      Label->Insts.emplace_back(ForwardLabel::Instructions{ .Location = GetCursorAddress<uint8_t*>(), .Type = ForwardLabel::Instructions::InstType::TEST_BRANCH });
      constexpr uint32_t Op = 0b0011'0111 << 24;

      TestAndBranch(Op, rt, Bit, 0);
    }

-    void tbnz(ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel *Label) {
+    void tbnz(FEXCore::ARMEmitter::Register rt, uint32_t Bit, BiDirectionalLabel *Label) {
      if (Label->Backward.Location) {
        tbnz(rt, Bit, &Label->Backward);
      }
@@ -292,7 +274,7 @@ public:

 private:
    // Conditional branch immediate
-    void Branch_Conditional(uint32_t Op, uint32_t Op1, uint32_t Op0, ARMEmitter::Condition Cond, uint32_t Imm) {
+    void Branch_Conditional(uint32_t Op, uint32_t Op1, uint32_t Op0, FEXCore::ARMEmitter::Condition Cond, uint32_t Imm) {
      uint32_t Instr = Op;

      Instr |= Op1 << 24;
@@ -304,7 +286,7 @@ private:
    }

    // Unconditional branch register
-    void UnconditionalBranch(uint32_t Op, ARMEmitter::Register rn) {
+    void UnconditionalBranch(uint32_t Op, FEXCore::ARMEmitter::Register rn) {
      uint32_t Instr = Op;
      Instr |= Encode_rn(rn);
      dc32(Instr);
@@ -318,8 +300,8 @@ private:
    }

    // Compare and branch
-    void CompareAndBranch(uint32_t Op, ARMEmitter::Size s, ARMEmitter::Register rt, uint32_t Imm) {
-      const uint32_t SF = s == ARMEmitter::Size::i64Bit ? (1U << 31) : 0;
+    void CompareAndBranch(uint32_t Op, FEXCore::ARMEmitter::Size s, FEXCore::ARMEmitter::Register rt, uint32_t Imm) {
+      const uint32_t SF = s == FEXCore::ARMEmitter::Size::i64Bit ? (1U << 31) : 0;

      uint32_t Instr = Op;

@@ -330,7 +312,7 @@ private:
    }

    // Test and branch - immediate
-    void TestAndBranch(uint32_t Op, ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
+    void TestAndBranch(uint32_t Op, FEXCore::ARMEmitter::Register rt, uint32_t Bit, uint32_t Imm) {
      uint32_t Instr = Op;

      Instr |= (Bit >> 5) << 31;
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: MIT
+#pragma once
+#include <cstddef>
+#include <cstdint>
+#include <cstring>
+
+namespace FEXCore::ARMEmitter {
+  class Buffer {
+    public:
+      Buffer() {
+        SetBuffer(nullptr, 0);
+      }
+
+      Buffer(uint8_t* Base, uint64_t BaseSize) {
+        SetBuffer(Base, BaseSize);
+      }
+
+      void SetBuffer(uint8_t* Base, uint64_t BaseSize) {
+        BufferBase = Base;
+        CurrentOffset = BufferBase;
+        Size = BaseSize;
+      }
+
+      void dc8(uint8_t Data) {
+        decltype(Data) *Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
+        *Memory = Data;
+        CurrentOffset += sizeof(Data);
+      }
+
+      void dc16(uint16_t Data) {
+        decltype(Data) *Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
+        *Memory = Data;
+        CurrentOffset += sizeof(Data);
+      }
+
+      void dc32(uint32_t Data) {
+        decltype(Data) *Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
+        *Memory = Data;
+        CurrentOffset += sizeof(Data);
+      }
+
+      void dc64(uint64_t Data) {
+        decltype(Data) *Memory = reinterpret_cast<decltype(Data)*>(CurrentOffset);
+        *Memory = Data;
+        CurrentOffset += sizeof(Data);
+      }
+      void EmitString(const char *String) {
+        const auto StringLength = strlen(String);
+        memcpy(CurrentOffset, String, StringLength);
+        CurrentOffset += StringLength;
+      }
+
+      void Align() {
+        // Align the buffer to instruction size
+        auto CurrentAlignment = reinterpret_cast<uint64_t>(CurrentOffset) & 0b11;
+        if (!CurrentAlignment) {
+          return;
+        }
+        CurrentOffset += 4 - CurrentAlignment;
+      }
+
+      template<typename T>
+      T GetCursorAddress() const {
+        return reinterpret_cast<T>(CurrentOffset);
+      }
+
+      static void ClearICache(void* Begin, std::size_t Length) {
+        __builtin___clear_cache(static_cast<char*>(Begin), static_cast<char*>(Begin) + Length);
+      }
+
+      size_t GetCursorOffset() const {
+        return static_cast<size_t>(CurrentOffset - BufferBase);
+      }
+
+      uint8_t *GetBufferBase() const {
+        return BufferBase;
+      }
+
+      void CursorIncrement(size_t Size) {
+        CurrentOffset += Size;
+      }
+
+      void SetCursorOffset(size_t Offset) {
+        CurrentOffset = BufferBase + Offset;
+      }
+
+      uint64_t GetBufferSize() const {
+        return Size;
+      }
+
+      template<typename T>
+      size_t GetCursorOffsetFromAddress(const T* Address) const {
+        return static_cast<size_t>(reinterpret_cast<const uint8_t*>(Address) - BufferBase);
+      }
+
+    protected:
+
+      void ResetBuffer() {
+        CurrentOffset = BufferBase;
+      }
+
+      uint8_t* BufferBase;
+      uint8_t* CurrentOffset;
+      uint64_t Size;
+  };
+}
				`@@ -1 +0,0 @@`
				`:FEX-x86:M:0:\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF`
				`@@ -1 +0,0 @@`
				`:FEX-x86_64:M:0:\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00:\xff\xff\xff\xff\xff\xfe\xfe\x00\x00\x00\x00\xff\xff\xff\xff\xff\xfe\xff\xff\xff:@CMAKE_INSTALL_PREFIX@/bin/FEXInterpreter:POCF`