Ryan Houdek
8cfc016b3f
Merge pull request #4265 from pmatos/RevertPredCache
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Revert pred cache
2025-01-10 12:25:38 -08:00
Paulo Matos
cbda688e29
Revert "Cache predicate register generation from pattern"
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This reverts commit 72a4063651#4264
2025-01-10 12:52:11 +01:00
Paulo Matos
159ed07e68
Print arg type f80Bit
2025-01-10 09:14:49 +01:00
LC
a6c67ca749
Merge pull request #4251 from Sonicadvance1/ir_numelements_to_elementsize
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IR: Change convention from number of elements to elementsize
2025-01-04 18:39:24 -05:00
Ryan Houdek
a47ed105e7
x87StackOptimizationPass: Minor opt to f80 fchs and fabs
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It's faster to load the f80 sign mask from our named vector constants
than synthesizing the values. Changes a 4 instruction sequence to
synthesize to be 1 load.
2025-01-03 13:47:10 -08:00
Ryan Houdek
1ecfa3253d
IR: Change convention from number of elements to elementsize
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The IR stores elementsize, where the json was wanting number of
elements. While the IR Emitter function declaration always wanted
element size. This was causing us to do a little dance from ElementSize
-> Number of elements -> ElementSize. Just pass the ElementSize directly
instead of this bogus little dance.
2025-01-03 11:01:03 -08:00
Billy Laws
efd6e95059
OpcodeDispatcher: Match x86 overflow behaviour for F2I conversions
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ARM behaviour here is to saturate on overflow or NaN inputs, whereas
X86 returns a sentinel value of 2^(bitsize-1), explicitly emulate this.
2024-12-30 00:42:55 +00:00
Alyssa Rosenzweig
29405f2690
ConstProp: fix 32-bit masking behaviour
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if we want to replace a node with one of its sources, we need to zero extend if
the source is 64-bit and the destination is 32-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-12-13 10:44:56 -05:00
Alyssa Rosenzweig
51f505acca
ConstProp: drop some unused headers
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ycm complained.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-12-13 10:44:56 -05:00
Ryan Houdek
d00d476a0a
IR/Passes: Adds missing comment that clang-format keeps complaining about locally
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NFC
2024-12-11 15:03:28 -08:00
Paulo Matos
72a4063651
Cache predicate register generation from pattern
2024-12-06 10:15:38 +01:00
Paulo Matos
1d3ce30e50
Generate SVE for 80bit load/stores when possible
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Fixes #4166 .
2024-12-06 10:15:29 +01:00
Paulo Matos
fcbf0de05a
Enable RA of SVE Predicate Registers
2024-12-02 18:35:31 +01:00
Ryan Houdek
9b6cc8f7e0
IR: Convert OpSize over to enum class
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NFC
Do the final mopping up to convert the OpSize enum to an enum class!
2024-10-29 16:52:16 -07:00
Ryan Houdek
82f936cb6d
IR: Converts base IR operations to store OpSize sizes
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NFC
Finally converts the IR operations themselves to store the OpSize for
the IR operation size and element sizes.
This also finally, FINALLY, converts that remaining `_Constant` helper
to stop using a size field that is specified in bits rather than bytes
like all the other IR op handlers. That thing was so confusing and now
it's gone.
2024-10-28 21:26:59 -07:00
Ryan Houdek
034b62292b
Passes/x86StackOptimization: Fixes implicit conversion of OpSize
2024-10-28 19:26:02 -07:00
Ryan Houdek
6cca007817
IR: Fix some missing OpSize conversions
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Missed these in the previous PR.
2024-10-28 16:25:36 -07:00
Ryan Houdek
65ddae1b71
IR: Change F80VBSLStack to use IR::OpSize
2024-10-28 02:25:17 -07:00
Ryan Houdek
063f524084
IR: Change F80CVTToInt to use IR::OpSize
2024-10-28 02:24:25 -07:00
Ryan Houdek
2dd0a82059
IR: Change F80CVTTo to use IR::OpSize
2024-10-28 02:23:47 -07:00
Ryan Houdek
b810070e9f
IR: Change F80CVTInt to use IR::OpSize
2024-10-28 02:07:20 -07:00
Ryan Houdek
4c7ac17f7d
IR: Change F80CVT to use IR::OpSize
2024-10-28 02:06:48 -07:00
Ryan Houdek
84767c8b20
IR: Change PushStack to use IR::OpSize
2024-10-28 02:05:35 -07:00
Ryan Houdek
eccfb53bd5
IR: Change StoreStackMemory to use IR::OpSize
2024-10-28 02:01:47 -07:00
Ryan Houdek
f4e930262f
IR: Change PCLMUL to use IR::OpSize
2024-10-28 01:50:24 -07:00
Ryan Houdek
d26d9e7e03
IR: Change CRC32 to use IR::OpSize
2024-10-28 01:50:24 -07:00
Ryan Houdek
51c1998d70
IR: Change VAESDecLast to use IR::OpSize
2024-10-28 01:50:24 -07:00
Ryan Houdek
87f818249d
IR: Change VAESDec to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
d81f92f5e2
IR: Change VAESEncLast to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
29ffe02afe
IR: Change VAESEnc to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
dfe4076fe4
IR: Change Vector_F64ToI32 to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
44f9df062e
IR: Change Vector_FToI to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
6f98ef8cbb
IR: Change VFCVTN2 to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
d54888a4c6
IR: Change VFCVTL2 to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
38c58706da
IR: Change Vector_FToF to use IR::OpSize
2024-10-28 01:50:23 -07:00
Ryan Houdek
8ad9286bd4
IR: Change Vector_FToZS to use IR::OpSize
2024-10-28 01:29:32 -07:00
Ryan Houdek
03bc962564
IR: Change Vector_FToS to use IR::OpSize
2024-10-28 01:28:56 -07:00
Ryan Houdek
947b7ae6fe
IR: Change Vector_SToF to use IR::OpSize
2024-10-28 01:23:20 -07:00
Ryan Houdek
30317ac979
IR: Change Float_FToF to use IR::OpSize
2024-10-28 01:22:45 -07:00
Ryan Houdek
4544e7c1af
IR: Change Float_FromGPR_S to use IR::OpSize
2024-10-28 01:21:48 -07:00
Ryan Houdek
34050431ff
IR: Change VDupFromGPR to use IR::OpSize
2024-10-28 01:20:06 -07:00
Ryan Houdek
65439956bf
IR: Change VCastFromGPR to use IR::OpSize
2024-10-28 01:18:21 -07:00
Ryan Houdek
a6cbce4fd7
IR: Change VFNMLS to use IR::OpSize
2024-10-28 01:16:11 -07:00
Ryan Houdek
17b851d4f3
IR: Change VFNMLA to use IR::OpSize
2024-10-28 01:15:47 -07:00
Ryan Houdek
362b5728be
IR: Change VFMLS to use IR::OpSize
2024-10-28 01:15:25 -07:00
Ryan Houdek
bd5159c7d5
IR: Change VFMLA to use IR::OpSize
2024-10-28 01:15:01 -07:00
Ryan Houdek
660dfcd1f9
IR: Change VFCADD to use IR::OpSize
2024-10-28 01:14:21 -07:00
Ryan Houdek
4e21177988
IR: Change VBSL to use IR::OpSize
2024-10-28 01:13:53 -07:00
Ryan Houdek
5a83a65905
IR: Change VTBX1 to use IR::OpSize
2024-10-28 01:13:15 -07:00
Ryan Houdek
061fc44923
IR: Change VTBL2 to use IR::OpSize
2024-10-28 01:13:00 -07:00
Ryan Houdek