Ryan Houdek
b4093a8888
OpcodeDispatcher: Convert packed HSub to Bind handler
2024-08-22 14:57:40 -07:00
Ryan Houdek
7c5a9b5d6a
OpcodeDispatcher: Convert AVXVectorVariableBlend to Bind handler
2024-08-22 14:55:34 -07:00
Ryan Houdek
12b3c82d83
OpcodeDispatcher: Convert PExtr to Bind handler
2024-08-22 14:54:26 -07:00
Ryan Houdek
66520bce0a
OpcodeDispatcher: Convert VPACK{U,S}S to Bind handler
2024-08-22 14:52:41 -07:00
Ryan Houdek
25cc2bdcb8
OpcodeDispatcher: Convert VPERMILImm to Bind handler
2024-08-22 14:51:02 -07:00
Ryan Houdek
f98b18800c
OpcodeDispatcher: Convert MOVMSK to Bind handler
2024-08-22 14:49:57 -07:00
Ryan Houdek
0dd687a7a1
OpcodeDispatcher: Convert SHUFOp to Bind handler
2024-08-22 14:47:30 -07:00
Ryan Houdek
1aff3acbb9
OpcodeDispatcher: Convert PSHUFW to Bind handler
2024-08-22 14:45:04 -07:00
Ryan Houdek
a6ab2ca30d
OpcodeDispatcher: Convert PUNPCKH to Bind handler
2024-08-22 14:42:24 -07:00
Ryan Houdek
ca43e2a61c
OpcodeDispatcher: Convert PUNPCKL to Bind handler
2024-08-22 14:39:45 -07:00
Alyssa Rosenzweig
ce8e6e5c0c
OpcodeDispatcher: optimize adc 0
...
clang generates this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-22 10:51:06 -04:00
Alyssa Rosenzweig
6951284924
OpcodeDispatcher: optimize ADCX/ADOX
...
rewrite to use native adcs with flag fixups.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig
b03c613fbf
OpcodeDispatcher: optimize JP/JNP
...
fuse and+cbnz into tbz/tbnz.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig
b893bdb8df
OpcodeDispatcher: optimize fcmovu
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig
db45f6eec8
OpcodeDispatcher: optimize test with small immediate
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig
5d613e8716
OpcodeDispatcher: optimize test x, x
...
fewer uops now that we invert carry
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-20 21:17:08 -04:00
Alyssa Rosenzweig
84e4960e52
OpcodeDispatcher: optimize btc
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-20 09:24:02 -04:00
Alyssa Rosenzweig
e5cb583cc0
OpcodeDispatcher: optimize 8-bit rol
...
rotate right by less than 8:
ror(________________7654321076543120, ...)
rotate left by less than 8:
rol(76543210________________76543210, ...)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-19 10:40:53 -04:00
Alyssa Rosenzweig
3ef83a9e23
OpcodeDispatcher: optimize ror al, cl
...
rely on the masking.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-19 10:40:53 -04:00
Alyssa Rosenzweig
7de6a5cb07
OpcodeDispatcher: optimize rotate flags
...
introduce an IR op for it so we can reason about flags across rotate
instructions easily.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-19 10:40:53 -04:00
Alyssa Rosenzweig
c495f82f4f
OpcodeDispatcher: optimize 8/16-bit bitwise with constants
...
avoid masking. apparently even modern compilers will do cute tricks with 8-bit
math in hot loops ...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-19 08:54:47 -04:00
Ryan Houdek
2eb7a9ff28
OpcodeDispatcher: Remove old bad assumption in INC/DEC
...
Somewhere there was an assumption made that INC and DEC supported the
repeat prefix. This isn't actually the case, while the prefix can be
encoded, it is a nop and should only expect to be used for padding.
Adds a unittest to ensure that behaviour is as expected.
2024-08-15 10:22:31 -07:00
Alyssa Rosenzweig
0db17bd58a
OpcodeDispatcher: optimize IRET
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 16:59:34 -04:00
Alyssa Rosenzweig
aac16493f1
OpcodeDispatcher: optimize RET
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 16:59:34 -04:00
Alyssa Rosenzweig
c70e44cf05
OpcodeDispatcher: extract Push helper
...
Mirrors the Pop helper we added. This cleans up a bunch
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
ede13e37d9
OpcodeDispatcher: optimize Thunk
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
a7dada457a
OpcodeDispatcher: optimize POPF
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
6367554d30
OpcodeDispatcher: optimize LEAVE
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
81969a684e
OpcodeDispatcher: optimize pop segment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
ee339b5960
OpcodeDispatcher: optimize POPA
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
881c940693
OpcodeDispatcher: optimize POP
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
74f341bc0e
IR: remove pair from cpuid
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
feaa1af1a8
IR: remove pair from XGetBV
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
a9c26cbf71
IR: add coalescing heuristics for pair replacements
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
f4b5c4e69a
OpcodeDispatcher: allow upper garbage for cmpxchg
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
13974df204
IR: drop CASPair pair result
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
fa6fe9bf06
IR: drop cmppairz pairs
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
746be0824e
IR: drop CASPair source pairs
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
93120cabbb
IR: drop pair from memcpy
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
40812efaae
OpcodeDispatcher: better handle SIB indexing
...
if we have shift and a constant, we can save an instruction
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
3429321d59
OpcodeDispatcher: allow upper garbage for MOVGPR
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
6cddd6cbe7
OpcodeDispatcher: allow upper garbage for a2/a3
...
stores mask.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
23d07d7d0c
OpcodeDispatcher: fix folding negative offsets for 32-bit
...
I don't know what I was thinking when I wrote that code. Drop the silly logic
and let ConstProp inline the immediates. This fixes a lot of silly code
generated for 32-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
91f4c54768
OpcodeDispatcher: optimize RDRAND on flagm
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 15:21:08 -04:00
Alyssa Rosenzweig
d9c779289c
OpcodeDispatcher: simplify RDRAND
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 15:18:00 -04:00
Alyssa Rosenzweig
5823e74bcd
OpcodeDispatcher: use increment carry for atomics
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
f138d7d9b8
OpcodeDispatcher: optimize JA/JNA
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
256d166126
OpcodeDispatcher: optimize DAA
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
1dc22e33ae
OpcodeDispatcher: inline some flag calculations
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
0ef8aaebeb
OpcodeDispatcher: optimize BZHI
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00