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Merge pull request #5959 from Sonicadvance1/246
FEXCore: Moves crc32 helper to a shared location
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5 files changed
+65
-47
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@@ -1,4 +1,5 @@
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// SPDX-License-Identifier: MIT
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#include "Utils/crc32.h"
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#include "FEXCore/Utils/LogManager.h"
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#include "FEXCore/Utils/MathUtils.h"
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#include "FEXCore/Utils/TypeDefines.h"
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@@ -30,9 +31,6 @@
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#include <FEXCore/Utils/AllocatorHooks.h>
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#include <fstream>
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#if defined(ARCHITECTURE_arm64)
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#include <arm_acle.h>
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#endif
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namespace FEXCore {
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@@ -561,26 +559,6 @@ static inline void ApplyPatchableDataRelocation(uint64_t SiteAddress, uint8_t Va
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CPU::Arm64Emitter::PadType::DOPAD);
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}
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static inline uint32_t crc32(const uint8_t* Ptr, size_t Size) {
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#if defined(ARCHITECTURE_arm64)
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uint32_t Result {};
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#define do_crc(type, suffix) \
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while (Size >= sizeof(type)) { \
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Result = __crc32##suffix(Result, *reinterpret_cast<const type*>(Ptr)); \
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Ptr += sizeof(type); \
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Size -= sizeof(type); \
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}
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do_crc(uint64_t, d);
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do_crc(uint32_t, w);
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do_crc(uint16_t, h);
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do_crc(uint8_t, b);
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return Result;
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#else
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// Unsupported on non-arm.
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return 0;
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#endif
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};
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static inline void ApplyPatchableRIPLiteralRelocation(uint64_t SiteAddress, uint8_t ValueSize, CPU::Arm64Emitter& Emitter) {
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Emitter.dc64(SiteAddress + ValueSize + ReadLiveGuestData(SiteAddress, ValueSize));
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}
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@@ -591,7 +569,7 @@ static inline void ApplyPatchableRIPMoveRelocation(uint64_t SiteAddress, uint8_t
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}
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static inline void ApplyPatchableCRCMoveRelocation(uint64_t SiteAddress, uint8_t ValueSize, uint8_t RegisterIndex, CPU::Arm64Emitter& Emitter) {
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const uint64_t Target = crc32(reinterpret_cast<const uint8_t*>(SiteAddress), ValueSize);
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const uint64_t Target = FEXCore::Utils::crc32(reinterpret_cast<const uint8_t*>(SiteAddress), ValueSize);
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Emitter.LoadConstant(ARMEmitter::Size::i64Bit, ARMEmitter::Register(RegisterIndex), Target, CPU::Arm64Emitter::PadType::DOPAD);
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}
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@@ -30,6 +30,7 @@ $end_info$
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#include "Interface/IR/RegisterAllocationData.h"
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#include "Utils/Allocator.h"
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#include "Utils/Allocator/HostAllocator.h"
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#include "Utils/crc32.h"
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#include <FEXCore/Utils/SpinWaitLock.h>
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#include "Utils/variable_length_integer.h"
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@@ -76,9 +77,6 @@ $end_info$
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#include <unordered_map>
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#include <utility>
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#include <xxhash.h>
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#if defined(ARCHITECTURE_arm64)
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#include <arm_acle.h>
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#endif
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namespace FEXCore::Context {
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ContextImpl::ContextImpl(const FEXCore::HostFeatures& Features)
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@@ -639,26 +637,7 @@ ContextImpl::GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t Gue
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auto ExistingCodePtr = reinterpret_cast<uint8_t*>(Block.Entry + BlockInstructionsLength);
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auto InstAddressReg = Thread->OpDispatcher->_EntrypointOffset(GPRSize, InstAddress - GuestRIP);
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auto crc32 = [](const uint8_t* Ptr, size_t Size) -> uint32_t {
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#if defined(ARCHITECTURE_arm64)
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uint32_t Result {};
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#define do_crc(type, suffix) \
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while (Size >= sizeof(type)) { \
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Result = __crc32##suffix(Result, *reinterpret_cast<const type*>(Ptr)); \
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Ptr += sizeof(type); \
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Size -= sizeof(type); \
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}
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do_crc(uint64_t, d);
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do_crc(uint32_t, w);
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do_crc(uint16_t, h);
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do_crc(uint8_t, b);
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return Result;
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#else
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// Unsupported on non-arm.
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return 0;
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#endif
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};
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auto Value = crc32(ExistingCodePtr, DecodedInfo->InstSize);
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auto Value = FEXCore::Utils::crc32(ExistingCodePtr, DecodedInfo->InstSize);
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auto CRC = WantsDiskCachePatching ?
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Thread->OpDispatcher->_PatchableGuestCRC(IR::OpSize::i64Bit, Value, (int64_t)ExistingCodePtr, DecodedInfo->InstSize) :
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Thread->OpDispatcher->Constant(Value);
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@@ -0,0 +1,46 @@
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// SPDX-License-Identifier: MIT
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#pragma once
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#include <cstddef>
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#include <cstdint>
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#if defined(ARCHITECTURE_arm64)
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#include <arm_acle.h>
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#elif defined(ARCHITECTURE_x86_64)
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#include <nmmintrin.h>
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#endif
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namespace FEXCore::Utils {
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template<typename T>
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static inline uint32_t crc32(const T* Ptr, size_t Size) {
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uint32_t Result {};
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#if defined(ARCHITECTURE_arm64)
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#define do_crc(type, suffix) \
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while (Size >= sizeof(type)) { \
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Result = __crc32##suffix(Result, *reinterpret_cast<const type*>(Ptr)); \
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Ptr += sizeof(type); \
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Size -= sizeof(type); \
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}
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do_crc(uint64_t, d);
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do_crc(uint32_t, w);
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do_crc(uint16_t, h);
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do_crc(uint8_t, b);
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#elif defined(ARCHITECTURE_x86_64)
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#define do_crc(type, intrinsic) \
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while (Size >= sizeof(type)) { \
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Result = intrinsic(Result, *reinterpret_cast<const type*>(Ptr)); \
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Ptr += sizeof(type); \
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Size -= sizeof(type); \
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}
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do_crc(uint64_t, _mm_crc32_u64);
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do_crc(uint32_t, _mm_crc32_u32);
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do_crc(uint16_t, _mm_crc32_u16);
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do_crc(uint8_t, _mm_crc32_u8);
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#else
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// Unsupported on non-arm.
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return 0;
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#endif
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#undef do_crc
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return Result;
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}
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} // namespace FEXCore::Utils
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@@ -6,6 +6,7 @@ foreach(TEST ${TESTS})
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add_executable(FEXCore_Tests_${TEST_NAME} ${TEST})
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target_link_libraries(FEXCore_Tests_${TEST_NAME} PRIVATE ${LIBS})
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target_include_directories(FEXCore_Tests_${TEST_NAME} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/../../Source/")
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target_compile_options(FEXCore_Tests_${TEST_NAME} PRIVATE ${FEX_TUNE_COMPILE_FLAGS})
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set_target_properties(FEXCore_Tests_${TEST_NAME} PROPERTIES RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/FEXCore_Tests")
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catch_discover_tests(FEXCore_Tests_${TEST_NAME} TEST_SUFFIX ".${TEST_NAME}.FEXCore_Tests")
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endforeach()
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@@ -0,0 +1,14 @@
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// SPDX-License-Identifier: MIT
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#include <catch2/catch_all.hpp>
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#include "Utils/crc32.h"
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TEST_CASE("Simple") {
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uint32_t data = 0x41424344U;
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// Arm and x86 use different polynomials by default.
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#if defined(ARCHITECTURE_arm64)
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CHECK(FEXCore::Utils::crc32(&data, sizeof(data)) == 0xa53ea072);
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#elif defined(ARCHITECTURE_x86_64)
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CHECK(FEXCore::Utils::crc32(&data, sizeof(data)) == 0x968d46eb);
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#endif
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}
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