mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 13:00:15 +02:00
Jit64: Used deferred signals in dispatcher
This commit is contained in:
1 parent
802c588695
commit
f75d3550b4
1 file changed
+17
-95
@@ -170,38 +170,11 @@ X86Dispatcher::X86Dispatcher(FEXCore::Context::ContextImpl *ctx, const Dispatche
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ret();
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}
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constexpr bool SignalSafeCompile = true;
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// Block creation
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{
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L(NoBlock);
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#ifndef _WIN32
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if (SignalSafeCompile) {
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// When compiling code, mask all signals to reduce the chance of reentrant allocations
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// RDI: SETMASK
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// RSI: Pointer to mask value (uint64_t)
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// RDX: Pointer to old mask value (uint64_t)
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// R10: Size of mask, sizeof(uint64_t)
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// RAX: Syscall
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// Backup rdx
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mov(r9, rdx);
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mov(rdi, ~0ULL);
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sub(rsp, 16);
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mov(qword [rsp], rdi);
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mov(qword [rsp + 8], rdi);
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mov(rdi, SIG_SETMASK);
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mov(rsi, rsp);
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mov(rdx, rsp);
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mov(r10, 8);
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mov(rax, SYS_rt_sigprocmask);
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syscall();
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mov(rdx, r9);
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}
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#endif
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inc(qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalRefCount)]);
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// {rdi, rsi, rdx}
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mov(rdi, reinterpret_cast<uint64_t>(CTX));
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@@ -210,26 +183,15 @@ X86Dispatcher::X86Dispatcher(FEXCore::Context::ContextImpl *ctx, const Dispatche
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call(rax);
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#ifndef _WIN32
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if (SignalSafeCompile) {
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// Now restore the signal mask
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// Living in the same location
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// Backup rdx
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mov(r9, rdx);
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dec(qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalRefCount)]);
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mov(rdi, SIG_SETMASK);
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mov(rsi, rsp);
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mov(rdx, 0); // Don't care about result
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mov(r10, 8);
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mov(rax, SYS_rt_sigprocmask);
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syscall();
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Label AfterStore;
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// Skip the deferred fault address if the refcount isn't zero
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jne(AfterStore);
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mov(rax, qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalFaultAddress)]);
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mov(rax, qword [rax]);
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// Bring stack back
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add(rsp, 16);
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mov(rdx, r9);
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}
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#endif
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L(AfterStore);
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// rdx already contains RIP here
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jmp(LoopTop);
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@@ -237,34 +199,7 @@ X86Dispatcher::X86Dispatcher(FEXCore::Context::ContextImpl *ctx, const Dispatche
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{
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ExitFunctionLinkerAddress = getCurr<uint64_t>();
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#ifndef _WIN32
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if (SignalSafeCompile) {
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// When compiling code, mask all signals to reduce the chance of reentrant allocations
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// RDI: SETMASK
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// RSI: Pointer to mask value (uint64_t)
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// RDX: Pointer to old mask value (uint64_t)
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// R10: Size of mask, sizeof(uint64_t)
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// RAX: Syscall
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// Backup rax
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mov(r9, rax);
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mov(rdi, ~0ULL);
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sub(rsp, 16);
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mov(qword [rsp], rdi);
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mov(qword [rsp + 8], rdi);
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mov(rdi, SIG_SETMASK);
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mov(rsi, rsp);
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mov(rdx, rsp);
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mov(r10, 8);
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mov(rax, SYS_rt_sigprocmask);
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syscall();
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mov(rax, r9);
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}
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#endif
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inc(qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalRefCount)]);
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// {rdi, rsi}
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mov(rdi, STATE);
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@@ -272,30 +207,17 @@ X86Dispatcher::X86Dispatcher(FEXCore::Context::ContextImpl *ctx, const Dispatche
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call(qword STATE_PTR(CpuStateFrame, Pointers.Common.ExitFunctionLink));
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#ifndef _WIN32
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if (SignalSafeCompile) {
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// Now restore the signal mask
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// Living in the same location
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// Backup rax
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mov(r9, rax);
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dec(qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalRefCount)]);
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mov(rdi, SIG_SETMASK);
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mov(rsi, rsp);
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mov(rdx, 0); // Don't care about result
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mov(r10, 8);
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mov(rax, SYS_rt_sigprocmask);
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syscall();
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Label AfterStore;
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// Skip the deferred fault address if the refcount isn't zero
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jne(AfterStore);
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mov(rbx, qword [STATE + offsetof(FEXCore::Core::CPUState, DeferredSignalFaultAddress)]);
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mov(qword [rbx], rbx);
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// Bring stack back
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add(rsp, 16);
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L(AfterStore);
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jmp(r9);
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}
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else
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#endif
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{
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jmp(rax);
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}
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jmp(rax);
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}
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{
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