IR: remove F80Cmp flags

nothing is optimizing around this, it's just adding pointless complexity. if we
want to actually optimize F80Cmp, the right way would be to lift the
implementation into the OpcodeDispatcher or JIT. it wouldn't be terribly
difficult. This kludge doesn't get us closer there.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

FEXCore/Source/Interface/Core/Interpreter/Fallbacks/F80Fallbacks.h

@@ -39,7 +39,6 @@ struct OpHandlers<IR::OP_F80CVTTO> {
 
 template<>
 struct OpHandlers<IR::OP_F80CMP> {
-  template<uint32_t Flags>
   FEXCORE_PRESERVE_ALL_ATTR static uint64_t handle(uint16_t NewFCW, X80SoftFloat Src1, X80SoftFloat Src2) {
     LoadDeferredFCW(NewFCW);
 
@@ -47,13 +46,13 @@ struct OpHandlers<IR::OP_F80CMP> {
     uint64_t ResultFlags = 0;
 
     X80SoftFloat::FCMP(Src1, Src2, &eq, &lt, &nan);
-    if (Flags & (1 << IR::FCMP_FLAG_LT) && lt) {
+    if (lt) {
       ResultFlags |= (1 << IR::FCMP_FLAG_LT);
     }
-    if (Flags & (1 << IR::FCMP_FLAG_UNORDERED) && nan) {
+    if (nan) {
       ResultFlags |= (1 << IR::FCMP_FLAG_UNORDERED);
     }
-    if (Flags & (1 << IR::FCMP_FLAG_EQ) && eq) {
+    if (eq) {
       ResultFlags |= (1 << IR::FCMP_FLAG_EQ);
     }
     return ResultFlags;

FEXCore/Source/Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp

@@ -35,14 +35,7 @@ void InterpreterOps::FillFallbackIndexPointers(uint64_t* Info) {
   Info[Core::OPINDEX_F80CVTINT_TRUNC2] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CVTINT>::handle2t);
   Info[Core::OPINDEX_F80CVTINT_TRUNC4] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CVTINT>::handle4t);
   Info[Core::OPINDEX_F80CVTINT_TRUNC8] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CVTINT>::handle8t);
-  Info[Core::OPINDEX_F80CMP_0] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<0>);
-  Info[Core::OPINDEX_F80CMP_1] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<1>);
-  Info[Core::OPINDEX_F80CMP_2] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<2>);
-  Info[Core::OPINDEX_F80CMP_3] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<3>);
-  Info[Core::OPINDEX_F80CMP_4] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<4>);
-  Info[Core::OPINDEX_F80CMP_5] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<5>);
-  Info[Core::OPINDEX_F80CMP_6] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<6>);
-  Info[Core::OPINDEX_F80CMP_7] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<7>);
+  Info[Core::OPINDEX_F80CMP] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle);
   Info[Core::OPINDEX_F80CVTTOINT_2] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CVTTOINT>::handle2);
   Info[Core::OPINDEX_F80CVTTOINT_4] = reinterpret_cast<uint64_t>(&FEXCore::CPU::OpHandlers<IR::OP_F80CVTTOINT>::handle4);
 
@@ -154,17 +147,8 @@ bool InterpreterOps::GetFallbackHandler(bool SupportsPreserveAllABI, const IR::I
     break;
   }
   case IR::OP_F80CMP: {
-    auto Op = IROp->C<IR::IROp_F80Cmp>();
-
-    static constexpr std::array handlers {
-      &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<0>, &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<1>,
-      &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<2>, &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<3>,
-      &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<4>, &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<5>,
-      &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<6>, &FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle<7>,
-    };
-
-    *Info = {FABI_I64_I16_F80_F80, (void*)handlers[Op->Flags], (Core::FallbackHandlerIndex)(Core::OPINDEX_F80CMP_0 + Op->Flags),
-             SupportsPreserveAllABI};
+    *Info = {FABI_I64_I16_F80_F80, (void*)&FEXCore::CPU::OpHandlers<IR::OP_F80CMP>::handle,
+             (Core::FallbackHandlerIndex)(Core::OPINDEX_F80CMP), SupportsPreserveAllABI};
     return true;
   }
 

FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp

@@ -507,8 +507,7 @@ void OpDispatchBuilder::FTST(OpcodeArgs) {
 
   auto low = _Constant(0);
   Ref data = _VCastFromGPR(16, 8, low);
-
-  Ref Res = _F80Cmp(a, data, (1 << FCMP_FLAG_EQ) | (1 << FCMP_FLAG_LT) | (1 << FCMP_FLAG_UNORDERED));
+  Ref Res = _F80Cmp(a, data);
 
   Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res);
   Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res);
@@ -592,8 +591,7 @@ void OpDispatchBuilder::FCOMI(OpcodeArgs, size_t width, bool Integer, OpDispatch
   }
 
   auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass);
-
-  Ref Res = _F80Cmp(a, b, (1 << FCMP_FLAG_EQ) | (1 << FCMP_FLAG_LT) | (1 << FCMP_FLAG_UNORDERED));
+  Ref Res = _F80Cmp(a, b);
 
   Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res);
   Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res);

FEXCore/Source/Interface/IR/IR.json

@@ -2925,22 +2925,22 @@
         "DestSize": "16",
         "JITDispatch": false
       },
-      "GPR = F80StackTest u8:$SrcStack, u32:$Flags": {
+      "GPR = F80StackTest u8:$SrcStack": {
         "Desc": [
           "Does comparison between value in stack at TOP + SrcStack"
         ],
         "DestSize": "4",
         "X87": true
       },
-      "GPR = F80CmpStack u8:$SrcStack, u32:$Flags": {
+      "GPR = F80CmpStack u8:$SrcStack": {
         "Desc": [
-          "Does a scalar unordered compare between the value at the top of the stack and the value in stack position TOP+$SrcStack and stores the asked for flags in to a GPR",
+          "Does a scalar unordered compare between the value at the top of the stack and the value in stack position TOP+$SrcStack and stores the flags in to a GPR",
           "Ordering flag result is true if either float input is NaN"
         ],
         "DestSize": "4",
         "X87": true
       },
-      "GPR = F80CmpValue FPR:$X80Src, u32:$Flags": {
+      "GPR = F80CmpValue FPR:$X80Src": {
         "Desc": [
           "Does a scalar unordered compare between the value at the top of the stack and $X80Src and stores the asked for flags in to a GPR",
           "Ordering flag result is true if either float input is NaN"
@@ -2949,8 +2949,8 @@
         "HasSideEffects": true,
         "X87": true
       },
-      "GPR = F80Cmp FPR:$X80Src1, FPR:$X80Src2, u32:$Flags": {
-        "Desc": ["Does a scalar unordered compare and stores the asked for flags in to a GPR",
+      "GPR = F80Cmp FPR:$X80Src1, FPR:$X80Src2": {
+        "Desc": ["Does a scalar unordered compare and stores the flags in to a GPR",
                  "Ordering flag result is true if either float input is NaN"
                 ],
         "DestSize": "4",

FEXCore/include/FEXCore/Core/CoreState.h

@@ -185,14 +185,7 @@ enum FallbackHandlerIndex {
   OPINDEX_F80CVTINT_TRUNC2,
   OPINDEX_F80CVTINT_TRUNC4,
   OPINDEX_F80CVTINT_TRUNC8,
-  OPINDEX_F80CMP_0,
-  OPINDEX_F80CMP_1,
-  OPINDEX_F80CMP_2,
-  OPINDEX_F80CMP_3,
-  OPINDEX_F80CMP_4,
-  OPINDEX_F80CMP_5,
-  OPINDEX_F80CMP_6,
-  OPINDEX_F80CMP_7,
+  OPINDEX_F80CMP,
   OPINDEX_F80CVTTOINT_2,
   OPINDEX_F80CVTTOINT_4,