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Merge pull request #5359 from Sonicadvance1/107
OpcodeDispatcher: Fixes memory leak in IREmitter pool allocator
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@@ -506,7 +506,6 @@ ContextImpl::GenerateIRResult
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ContextImpl::GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, bool ExtendedDebugInfo, uint64_t MaxInst) {
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FEXCORE_PROFILE_SCOPED("GenerateIR");
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Thread->OpDispatcher->ReownOrClaimBuffer();
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Thread->OpDispatcher->ResetWorkingList();
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uint64_t TotalInstructions {0};
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@@ -706,8 +705,8 @@ ContextImpl::GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t Gue
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// If we had a dispatch error then leave early
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if (HadDispatchError && TotalInstructions == 0) {
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// Couldn't handle any instruction in op dispatcher
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Thread->OpDispatcher->ResetWorkingList();
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return {{}, 0, 0, 0, 0};
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Thread->OpDispatcher->DelayedDisownBuffer();
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return {std::nullopt, 0, 0, 0, 0};
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}
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if (NeedsBlockEnd) {
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@@ -774,6 +773,7 @@ ContextImpl::CompileCodeResult ContextImpl::CompileCode(FEXCore::Core::InternalT
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auto [IRView, TotalInstructions, TotalInstructionsLength, StartAddr, Length, NeedsAddGuestCodeRanges] =
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GenerateIR(Thread, GuestRIP, Config.GDBSymbols(), MaxInst);
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if (!IRView) {
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// OpDispatcher IR already released in this case.
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return {{}, nullptr, 0, 0, false};
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}
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@@ -784,6 +784,7 @@ ContextImpl::CompileCodeResult ContextImpl::CompileCode(FEXCore::Core::InternalT
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// as expensive and are easily reverted.
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if (MaxInst != 1) {
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if (auto Block = Thread->LookupCache->FindBlock(Thread, GuestRIP)) {
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// Raced to compile, release the OpDispatcher IR.
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Thread->OpDispatcher->DelayedDisownBuffer();
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return {.CompiledCode = {.BlockBegin = reinterpret_cast<uint8_t*>(Block), .EntryPoints = {{GuestRIP, reinterpret_cast<uint8_t*>(Block)}}},
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.DebugData = nullptr,
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@@ -4487,8 +4487,6 @@ void OpDispatchBuilder::StoreResult(RegClass Class, X86Tables::DecodedOp Op, Ref
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OpDispatchBuilder::OpDispatchBuilder(FEXCore::Context::ContextImpl* ctx)
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: IREmitter {ctx->OpDispatcherAllocator, ctx->HostFeatures.SupportsTSOImm9}
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, CTX {ctx} {
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ResetWorkingList();
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if (CTX->HostFeatures.SupportsAVX && CTX->HostFeatures.SupportsSVE256) {
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SaveAVXStateFunc = &OpDispatchBuilder::SaveAVXState;
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RestoreAVXStateFunc = &OpDispatchBuilder::RestoreAVXState;
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@@ -4501,7 +4499,8 @@ OpDispatchBuilder::OpDispatchBuilder(FEXCore::Context::ContextImpl* ctx)
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}
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void OpDispatchBuilder::ResetWorkingList() {
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IREmitter::ResetWorkingList();
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IREmitter::ReownOrClaimBuffer();
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JumpTargets.clear();
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BlockSetRIP = false;
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DecodeFailure = false;
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@@ -305,7 +305,9 @@ public:
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OpDispatchBuilder(FEXCore::Context::ContextImpl* ctx);
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// Should only be called at the start of IR Emission.
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void ResetWorkingList();
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void ResetDecodeFailure() {
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NeedsBlockEnd = DecodeFailure = false;
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}
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@@ -21,15 +21,15 @@ class IREmitter {
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public:
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IREmitter(FEXCore::Utils::IntrusivePooledAllocator& ThreadAllocator, bool SupportsTSOImm9)
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: DualListData {ThreadAllocator, 8 * 1024 * 1024}
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, SupportsTSOImm9(SupportsTSOImm9) {
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ReownOrClaimBuffer();
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ResetWorkingList();
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}
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, SupportsTSOImm9(SupportsTSOImm9) {}
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virtual ~IREmitter() = default;
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void ReownOrClaimBuffer() {
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DualListData.ReownOrClaimBuffer();
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// Reset the working list on new buffer.
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ResetWorkingList();
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}
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void DelayedDisownBuffer() {
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@@ -39,7 +39,6 @@ public:
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IRListView ViewIR() {
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return IRListView(&DualListData);
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}
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void ResetWorkingList();
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/**
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* @name IR allocation routines
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@@ -512,6 +511,9 @@ protected:
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fextl::vector<Ref> CodeBlocks;
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uint64_t Entry {};
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bool SupportsTSOImm9 {};
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private:
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void ResetWorkingList();
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};
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} // namespace FEXCore::IR
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@@ -119,11 +119,7 @@ class DualIntrusiveAllocatorThreadPool final : public DualIntrusiveAllocator {
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public:
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DualIntrusiveAllocatorThreadPool(FEXCore::Utils::IntrusivePooledAllocator& ThreadAllocator, size_t Size)
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: DualIntrusiveAllocator {Size}
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, PoolObject {ThreadAllocator, Size * 2} {
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// Claim a buffer on allocation
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PoolObject.ReownOrClaimBuffer();
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}
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, PoolObject {ThreadAllocator, Size * 2} {}
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void ReownOrClaimBuffer() {
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Data = PoolObject.ReownOrClaimBuffer();
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List = Data + MemorySize;
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