Merge pull request #5137 from Sonicadvance1/23

FEXCore: Revert literal optimization from #4884

FEXCore/Source/Interface/Core/Frontend.cpp

@@ -651,18 +651,10 @@ bool Decoder::NormalOp(const FEXCore::X86Tables::X86InstInfo* Info, uint16_t Op,
           Literal = static_cast<int32_t>(Literal);
         }
         DecodeInst->Src[CurrentSrc].Data.Literal.Size = DestSize;
-        DecodeInst->Src[CurrentSrc].Data.Literal.SignExtend = true;
       }
 
       DecodeInst->Src[CurrentSrc].Type = DecodedOperand::OpType::Literal;
       DecodeInst->Src[CurrentSrc].Data.Literal.Value = Literal;
-      ++CurrentSrc;
-
-      if (Bytes == 8) [[unlikely]] {
-        DecodeInst->Src[CurrentSrc].Data.Literal.Size = 4;
-        DecodeInst->Src[CurrentSrc].Type = DecodedOperand::OpType::Literal;
-        DecodeInst->Src[CurrentSrc].Data.Literal.Value = Literal >> 32;
-      }
     }
 
     Bytes = 0;

FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp

@@ -1325,35 +1325,12 @@ void OpDispatchBuilder::MOVSegOp(OpcodeArgs, bool ToSeg) {
 }
 
 void OpDispatchBuilder::MOVOffsetOp(OpcodeArgs) {
-
-  auto GenMemSrcFromOp = [&](size_t StartingSource) -> AddressMode {
-    const uint64_t Lower = Op->Src[StartingSource].Literal();
-    const uint64_t Upper = Op->Src[StartingSource + 1].Literal();
-    const uint64_t Combined = (Upper << 32) | Lower;
-    const auto GPRSize = GetGPROpSize();
-
-    AddressMode A {
-      .Segment = GetSegment(Op->Flags),
-      .Offset = static_cast<int64_t>(Combined),
-      .AddrSize = (Op->Flags & X86Tables::DecodeFlags::FLAG_ADDRESS_SIZE) != 0 ? (GPRSize >> 1) : GPRSize,
-      .NonTSO = false,
-    };
-
-    return A;
-  };
   switch (Op->OP) {
   case 0xA0:
   case 0xA1: {
     // Source is memory(literal)
     // Dest is GPR
-    Ref Src {};
-    if (Op->Src[0].IsLiteralRelocation() || Op->Src[0].Data.Literal.Size <= 4) {
-      Src = LoadSourceGPR(Op, Op->Src[0], Op->Flags, {.ForceLoad = true});
-    } else {
-      const auto OpSize = OpSizeFromSrc(Op);
-      auto A = GenMemSrcFromOp(0);
-      Src = _LoadMemGPRAutoTSO(OpSize, A, OpSize::i8Bit);
-    }
+    auto Src = LoadSourceGPR(Op, Op->Src[0], Op->Flags, {.ForceLoad = true});
     StoreResultGPR(Op, Op->Dest, Src);
     break;
   }
@@ -1365,13 +1342,7 @@ void OpDispatchBuilder::MOVOffsetOp(OpcodeArgs) {
 
     // This one is a bit special since the destination is a literal
     // So the destination gets stored in Src[1]
-    if (Op->Src[1].IsLiteralRelocation() || Op->Src[1].Data.Literal.Size <= 4) {
-      StoreResultGPR(Op, Op->Src[1], Src);
-    } else {
-      const auto OpSize = OpSizeFromSrc(Op);
-      auto A = GenMemSrcFromOp(1);
-      _StoreMemGPRAutoTSO(OpSize, A, Src, OpSize::i8Bit);
-    }
+    StoreResultGPR(Op, Op->Src[1], Src);
     break;
   }
   }
@@ -4520,20 +4491,6 @@ void OpDispatchBuilder::MOVGPROp(OpcodeArgs, uint32_t SrcIndex) {
   StoreResultGPR(Op, Src, OpSize::i8Bit);
 }
 
-void OpDispatchBuilder::MOVGPRImmediate(OpcodeArgs) {
-  Ref Src {};
-  if (Op->Src[0].IsLiteralRelocation() || Op->Src[0].Data.Literal.Size <= 4) {
-    Src = LoadSourceGPR(Op, Op->Src[0], Op->Flags, {.Align = OpSize::i8Bit, .AllowUpperGarbage = true});
-  } else {
-    // 8-byte literal is special cased.
-    const uint64_t Lower = Op->Src[0].Literal();
-    const uint64_t Upper = Op->Src[1].Literal();
-    const uint64_t Combined = (Upper << 32) | Lower;
-    Src = _Constant(Combined);
-  }
-  StoreResultGPR(Op, Src, OpSize::i8Bit);
-}
-
 void OpDispatchBuilder::MOVGPRNTOp(OpcodeArgs) {
   Ref Src = LoadSourceGPR(Op, Op->Src[0], Op->Flags, {.Align = OpSize::i8Bit});
   StoreResultGPR(Op, Src, OpSize::i8Bit, MemoryAccessType::STREAM);

FEXCore/Source/Interface/Core/OpcodeDispatcher.h

@@ -319,7 +319,6 @@ public:
 
   void UnhandledOp(OpcodeArgs);
   void MOVGPROp(OpcodeArgs, uint32_t SrcIndex);
-  void MOVGPRImmediate(OpcodeArgs);
   void MOVGPRNTOp(OpcodeArgs);
   void MOVVectorAlignedOp(OpcodeArgs);
   void MOVVectorUnalignedOp(OpcodeArgs);

FEXCore/Source/Interface/Core/OpcodeDispatcher/BaseTables.h

@@ -53,7 +53,7 @@ constexpr inline DispatchTableEntry OpDispatch_BaseOpTable[] = {
   {0xAA, 2, &OpDispatchBuilder::STOSOp},
   {0xAC, 2, &OpDispatchBuilder::LODSOp},
   {0xAE, 2, &OpDispatchBuilder::SCASOp},
-  {0xB0, 16, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPRImmediate>},
+  {0xB0, 16, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPROp, 0>},
   {0xC2, 2, &OpDispatchBuilder::RETOp},
   {0xC8, 1, &OpDispatchBuilder::EnterOp},
   {0xC9, 1, &OpDispatchBuilder::LEAVEOp},

FEXCore/Source/Interface/Core/X86Tables/X86Tables.h

@@ -162,9 +162,6 @@ struct DecodedOperand {
 
   uint64_t Literal() const {
     LOGMAN_THROW_A_FMT(IsLiteral(), "Precondition: must be a literal");
-    if (Data.Literal.SignExtend) {
-      return static_cast<int64_t>(static_cast<int32_t>(Data.Literal.Value));
-    }
     return Data.Literal.Value;
   }
 
@@ -185,10 +182,8 @@ struct DecodedOperand {
     } RIPLiteral; // Shared with RIPLiteralRelocation
 
     struct LiteralType {
-      uint32_t Value;
-      uint8_t Size : 7 ;
-      bool SignExtend : 1;
-      auto operator<=>(const LiteralType&) const = default;
+      uint64_t Value;
+      uint8_t Size;
     } Literal;
 
     struct {