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SHRD and SHLD unit tests for flag setting

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Tests all flags aside from PF
This commit is contained in:
Ryan Houdek authored and Stefanos Kornilios Mitsis Poiitidis committed 2020-09-15 13:42:57 +03:00
1 parent d441ebe489
commit cadf53c9d9
12 files changed
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unittests/ASM/TwoByte/0F_A5_2.asm
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%ifdef CONFIG
{
"RegData": {
"R15": "0xFFFFFFFFFFFFFFFF",
"R14": "0x4141414141410000",
"R13": "0",
"R12": "0"
}
}
%endif
mov cl, 0
mov r15, -1
mov r14, 0x4141414141410000
mov r13, 0
mov r12, 0
shld r14w, r15w, cl
shld r13d, r15d, cl
shld r12, r15, cl
hlt
unittests/ASM/TwoByte/0F_A5_3.asm
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%ifdef CONFIG
{
"RegData": {
"R15": "0xFFFFFFFFFFFFFFFF",
"R14": "0x4141414141410000",
"R13": "0",
"R12": "0",
"R11": "0"
}
}
%endif
mov cl, 0
mov r15, -1
mov r14, 0x4141414141410000
mov r13, 0
mov r12, 0
mov r11, 0
; Get the incoming flags
mov rax, 0
lahf
mov r11, rax
shld r14w, r15w, cl
shld r13d, r15d, cl
shld r12, r15, cl
; Get the outgoing flags
; None should have changed
mov rax, 0
lahf
xor r11, rax
hlt
unittests/ASM/TwoByte/0F_A5_4.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1",
"RSI": "1",
"RBP": "1",
"RSP": "0",
"R8": "0",
"r9": "0"
}
}
%endif
mov cl, 1
mov r15, -1
mov r14, 0xFFFFFFFFFFFF4000
mov r13, 0xFFFFFFFF40000000
mov r12, 0x4000000000000000
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 0
mov rdi, 0
mov rbp, 0
mov rsp, 0
mov r8, 0
mov r9, 0
mov r11, 1
; Sign from 0->1 should set OF
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r14w, r15w, cl
cmovo rax, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r13d, r15d, cl
cmovo rbx, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r12, r15, cl
cmovo rdx, r11
; Sign from 1->0 should set OF
mov r15, -1
mov r14, 0xFFFFFFFFFFFF8000
mov r13, 0xFFFFFFFF80000000
mov r12, 0x8000000000000000
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r14w, r15w, cl
cmovo rsi, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r13d, r15d, cl
cmovo rdi, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r12, r15, cl
cmovo rbp, r11
; Sign from 0->0 should NOT set OF
mov r15, -1
mov r14, 0xFFFFFFFFFFFF0000
mov r13, 0xFFFFFFFF00000000
mov r12, 0x0000000000000000
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r14w, r15w, cl
cmovo rsp, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r13d, r15d, cl
cmovo r8, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shld r12, r15, cl
cmovo r9, r11
hlt
unittests/ASM/TwoByte/0F_A5_5.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, -1
mov r14, 0x4141414141414000
mov r13, 0xFFFFFFFF40000000
mov r12, 0x4000000000000000
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shld r14w, r15w, cl
cmovc rax, rsi
shld r13d, r15d, cl
cmovc rbx, rsi
shld r12, r15, cl
cmovc rdx, rsi
hlt
unittests/ASM/TwoByte/0F_A5_6.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, 0
mov r14, 0x4141414141414000
mov r13, 0xFFFFFFFF40000000
mov r12, 0x4000000000000000
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shld r14w, r15w, cl
cmovz rax, rsi
shld r13d, r15d, cl
cmovz rbx, rsi
shld r12, r15, cl
cmovz rdx, rsi
hlt
unittests/ASM/TwoByte/0F_A5_7.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, 0
mov r14, 0x4141414141412000
mov r13, 0xFFFFFFFF20000000
mov r12, 0x2000000000000000
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shld r14w, r15w, cl
cmovs rax, rsi
shld r13d, r15d, cl
cmovs rbx, rsi
shld r12, r15, cl
cmovs rdx, rsi
hlt
unittests/ASM/TwoByte/0F_AD_2.asm
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%ifdef CONFIG
{
"RegData": {
"R15": "0xFFFFFFFFFFFFFFFF",
"R14": "0x4141414141410000",
"R13": "0",
"R12": "0"
}
}
%endif
mov cl, 0
mov r15, -1
mov r14, 0x4141414141410000
mov r13, 0
mov r12, 0
shrd r14w, r15w, cl
shrd r13d, r15d, cl
shrd r12, r15, cl
hlt
unittests/ASM/TwoByte/0F_AD_3.asm
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%ifdef CONFIG
{
"RegData": {
"R15": "0xFFFFFFFFFFFFFFFF",
"R14": "0x4141414141410000",
"R13": "0",
"R12": "0",
"R11": "0"
}
}
%endif
mov cl, 0
mov r15, -1
mov r14, 0x4141414141410000
mov r13, 0
mov r12, 0
mov r11, 0
; Get the incoming flags
mov rax, 0
lahf
mov r11, rax
shrd r14w, r15w, cl
shrd r13d, r15d, cl
shrd r12, r15, cl
; Get the outgoing flags
; None should have changed
mov rax, 0
lahf
xor r11, rax
hlt
unittests/ASM/TwoByte/0F_AD_4.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1",
"RSI": "1",
"RBP": "1",
"RSP": "0",
"R8": "0",
"r9": "0"
}
}
%endif
mov cl, 1
mov r15, -1
mov r14, 0xFFFFFFFFFFFF0000
mov r13, 0xFFFFFFFF00000000
mov r12, 0
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 0
mov rdi, 0
mov rbp, 0
mov rsp, 0
mov r8, 0
mov r9, 0
mov r11, 1
; Sign from 0->1 should set OF
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r14w, r15w, cl
cmovo rax, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r13d, r15d, cl
cmovo rbx, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r12, r15, cl
cmovo rdx, r11
; Sign from 1->0 should set OF
mov r15, -1
mov r14, 0xFFFFFFFFFFFF8000
mov r13, 0xFFFFFFFF80000000
mov r12, 0x8000000000000000
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r14w, r15w, cl
cmovo rsi, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r13d, r15d, cl
cmovo rdi, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r12, r15, cl
cmovo rbp, r11
; Sign from 0->0 should NOT set OF
mov r15, 0xFFFFFFFFFFFFFFFE
mov r14, 0xFFFFFFFFFFFF0000
mov r13, 0xFFFFFFFF00000000
mov r12, 0x0000000000000000
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r14w, r15w, cl
cmovo rsp, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r13d, r15d, cl
cmovo r8, r11
; Let's clear OF really quick
mov rax, 0
ror rax, 1
shrd r12, r15, cl
cmovo r9, r11
hlt
unittests/ASM/TwoByte/0F_AD_5.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, -1
mov r14, 0x4141414141410002
mov r13, 0xFFFFFFFF00000002
mov r12, 0x0000000000000002
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shrd r14w, r15w, cl
cmovc rax, rsi
shrd r13d, r15d, cl
cmovc rbx, rsi
shrd r12, r15, cl
cmovc rdx, rsi
hlt
unittests/ASM/TwoByte/0F_AD_6.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, 0
mov r14, 0x4141414141410002
mov r13, 0xFFFFFFFF00000002
mov r12, 0x0000000000000002
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shrd r14w, r15w, cl
cmovz rax, rsi
shrd r13d, r15d, cl
cmovz rbx, rsi
shrd r12, r15, cl
cmovz rdx, rsi
hlt
unittests/ASM/TwoByte/0F_AD_7.asm
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%ifdef CONFIG
{
"RegData": {
"RAX": "1",
"RBX": "1",
"RDX": "1"
}
}
%endif
mov cl, 2
mov r15, 0xFFFFFFFFFFFFFFF2
mov r14, 0x4141414141410000
mov r13, 0xFFFFFFFF00000000
mov r12, 0x0000000000000000
mov rax, 0
mov rbx, 0
mov rdx, 0
mov rsi, 1
shrd r14w, r15w, cl
cmovs rax, rsi
shrd r13d, r15d, cl
cmovs rbx, rsi
shrd r12, r15, cl
cmovs rdx, rsi
hlt