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Merge pull request #3113 from lioncash/shrn

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Arm64/VectorOps: Elide moves in ASIMD VUShrNI2 if possible
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Ryan Houdek authored and GitHub committed 2023-09-17 13:03:42 -07:00
2 parents 8168a49d10 047646be6d
commit b3269f20ef
1 file changed
+11 -3
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FEXCore/Source/Interface/Core/JIT/Arm64/VectorOps.cpp
+11 -3
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@@ -3078,9 +3078,17 @@ DEF_OP(VUShrNI2) {
}
splice<ARMEmitter::OpType::Destructive>(SubRegSize, Dst.Z(), Mask, Dst.Z(), VTMP2.Z());
} else {
mov(VTMP1.Q(), VectorLower.Q());
shrn2(SubRegSize, VTMP1.Q(), VectorUpper.Q(), BitShift);
mov(Dst.Q(), VTMP1.Q());
auto Lower = VectorLower;
if (Dst != VectorLower) {
mov(VTMP1.Q(), VectorLower.Q());
Lower = VTMP1;
}
shrn2(SubRegSize, Lower.Q(), VectorUpper.Q(), BitShift);
if (Dst != VectorLower) {
mov(Dst.Q(), Lower.Q());
}
}
}