Merge pull request #3253 from Sonicadvance1/fix_double_munmap

JITArm64: Fixes double munmap issue that was causing crashes

FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp

@@ -335,8 +335,8 @@ namespace x32 {
 }
 
 // We want vixl to not allocate a default buffer. Jit and dispatcher will manually create one.
-Arm64Emitter::Arm64Emitter(FEXCore::Context::ContextImpl *ctx, size_t size)
-  : Emitter(size ? (uint8_t*)FEXCore::Allocator::VirtualAlloc(size, true) : nullptr, size)
+Arm64Emitter::Arm64Emitter(FEXCore::Context::ContextImpl *ctx, void* EmissionPtr, size_t size)
+  : Emitter(static_cast<uint8_t*>(EmissionPtr), size)
   , EmitterCTX {ctx}
 #ifdef VIXL_SIMULATOR
   , Simulator {&SimDecoder}
@@ -379,13 +379,6 @@ Arm64Emitter::Arm64Emitter(FEXCore::Context::ContextImpl *ctx, size_t size)
   }
 }
 
-Arm64Emitter::~Arm64Emitter() {
-  auto BufferSize = GetBufferSize();
-  if (BufferSize) {
-    FEXCore::Allocator::VirtualFree(GetBufferBase(), BufferSize);
-  }
-}
-
 void Arm64Emitter::LoadConstant(ARMEmitter::Size s, ARMEmitter::Register Reg, uint64_t Constant, bool NOPPad) {
   bool Is64Bit = s == ARMEmitter::Size::i64Bit;
   int Segments = Is64Bit ? 4 : 2;

FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.h

@@ -57,8 +57,7 @@ constexpr FEXCore::ARMEmitter::PRegister PRED_TMP_32B = FEXCore::ARMEmitter::PRe
 // be used by both Arm64 JIT and ARM64 Dispatcher
 class Arm64Emitter : public FEXCore::ARMEmitter::Emitter {
 protected:
-  Arm64Emitter(FEXCore::Context::ContextImpl *ctx, size_t size);
-  ~Arm64Emitter();
+  Arm64Emitter(FEXCore::Context::ContextImpl *ctx, void* EmissionPtr = nullptr, size_t size = 0);
 
   FEXCore::Context::ContextImpl *EmitterCTX;
   vixl::aarch64::CPU CPU;

FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp

@@ -56,12 +56,19 @@ uint64_t Dispatcher::GetCompileBlockPtr() {
 constexpr size_t MAX_DISPATCHER_CODE_SIZE = 4096 * 2;
 
 Dispatcher::Dispatcher(FEXCore::Context::ContextImpl *ctx, const DispatcherConfig &config)
-  : Arm64Emitter(ctx, MAX_DISPATCHER_CODE_SIZE)
+  : Arm64Emitter(ctx, FEXCore::Allocator::VirtualAlloc(MAX_DISPATCHER_CODE_SIZE, true), MAX_DISPATCHER_CODE_SIZE)
   , CTX {ctx}
   , config {config} {
   EmitDispatcher();
 }
 
+Dispatcher::~Dispatcher() {
+  auto BufferSize = GetBufferSize();
+  if (BufferSize) {
+    FEXCore::Allocator::VirtualFree(GetBufferBase(), BufferSize);
+  }
+}
+
 void Dispatcher::EmitDispatcher() {
 #ifdef VIXL_DISASSEMBLER
   const auto DisasmBegin = GetCursorAddress<const vixl::aarch64::Instruction*>();

FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h

@@ -43,7 +43,7 @@ public:
   static fextl::unique_ptr<Dispatcher> Create(FEXCore::Context::ContextImpl *CTX, const DispatcherConfig &Config);
 
   Dispatcher(FEXCore::Context::ContextImpl *ctx, const DispatcherConfig &Config);
-  ~Dispatcher() = default;
+  ~Dispatcher();
 
   /**
    * @name Dispatch Helper functions

FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp

@@ -530,7 +530,7 @@ void Arm64JITCore::Op_NoOp(IR::IROp_Header const *IROp, IR::NodeID Node) {
 
 Arm64JITCore::Arm64JITCore(FEXCore::Context::ContextImpl *ctx, FEXCore::Core::InternalThreadState *Thread)
   : CPUBackend(Thread, INITIAL_CODE_SIZE, MAX_CODE_SIZE)
-  , Arm64Emitter(ctx, 0)
+  , Arm64Emitter(ctx)
   , HostSupportsSVE128{ctx->HostFeatures.SupportsSVE}
   , HostSupportsSVE256{ctx->HostFeatures.SupportsAVX}
   , HostSupportsRPRES{ctx->HostFeatures.SupportsRPRES}