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InstCountCI: Update for NOP vector moves

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Adds a couple of instructions that get tested in this code path.
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Ryan Houdek committed 2023-09-12 16:11:43 -07:00
1 parent 304dba5f20
commit 8a44be0c30
3 files changed
+65 -18
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unittests/InstructionCountCI/DDD.json
+9 -18
View File
@@ -240,13 +240,10 @@
]
},
"pfrcpit1 mm0, mm0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"ExpectedInstructionCount": 0,
"Optimal": "Yes",
"Comment": "0x0f 0x0f 0xa6",
"ExpectedArm64ASM": [
"ldr d2, [x28, #752]",
"str d2, [x28, #752]"
]
"ExpectedArm64ASM": []
},
"pfrsqit1 mm0, mm1": {
"ExpectedInstructionCount": 2,
@@ -258,13 +255,10 @@
]
},
"pfrsqit1 mm0, mm0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"ExpectedInstructionCount": 0,
"Optimal": "Yes",
"Comment": "0x0f 0x0f 0xa7",
"ExpectedArm64ASM": [
"ldr d2, [x28, #752]",
"str d2, [x28, #752]"
]
"ExpectedArm64ASM": []
},
"pfsubr mm0, mm1": {
"ExpectedInstructionCount": 4,
@@ -309,13 +303,10 @@
]
},
"pfrcpit2 mm0, mm0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"ExpectedInstructionCount": 0,
"Optimal": "Yes",
"Comment": "0x0f 0x0f 0xb6",
"ExpectedArm64ASM": [
"ldr d2, [x28, #752]",
"str d2, [x28, #752]"
]
"ExpectedArm64ASM": []
},
"db 0x0f, 0x0f, 0xc1, 0xb7": {
"ExpectedInstructionCount": 8,
unittests/InstructionCountCI/Secondary_OpSize.json
+6
View File
@@ -9,6 +9,12 @@
]
},
"Instructions": {
"movupd xmm0, xmm0": {
"ExpectedInstructionCount": 0,
"Optimal": "Yes",
"Comment": "0x66 0x0f 0x10",
"ExpectedArm64ASM": []
},
"movupd xmm0, xmm1": {
"ExpectedInstructionCount": 1,
"Optimal": "Yes",
unittests/InstructionCountCI/VEX_map1.json
+50
View File
@@ -10,6 +10,19 @@
]
},
"Instructions": {
"vmovups xmm0, xmm0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Spurious moves",
"Map 1 0b00 0x10 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmovups xmm0, [rax]": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
@@ -23,6 +36,18 @@
"mov z16.d, p7/m, z2.d"
]
},
"vmovups ymm0, ymm0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Spurious moves",
"Map 1 0b00 0x10 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z16.d, p7/m, z2.d"
]
},
"vmovups ymm0, [rax]": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
@@ -35,6 +60,19 @@
"mov z16.d, p7/m, z2.d"
]
},
"vmovupd xmm0, xmm0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Spurious moves",
"Map 1 0b01 0x10 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmovupd xmm0, [rax]": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
@@ -48,6 +86,18 @@
"mov z16.d, p7/m, z2.d"
]
},
"vmovupd ymm0, ymm0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Spurious moves",
"Map 1 0b01 0x10 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z16.d, p7/m, z2.d"
]
},
"vmovupd ymm0, [rax]": {
"ExpectedInstructionCount": 2,
"Optimal": "No",