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VectorOps: Add trivial case handling in VSQXTN2

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Lets us generate much more optimal code in the event the destination and
lower source are the same.
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LC committed 2026-07-15 07:49:50 -04:00
1 parent 12e8cf008a
commit 6bc808cb06
1 file changed
+7 -3
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FEXCore/Source/Interface/Core/JIT/VectorOps.cpp
+7 -3
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@@ -3562,9 +3562,13 @@ DEF_OP(VSQXTN2) {
mov(Dst.Q(), VectorLower.Q());
ins(ARMEmitter::SubRegSize::i32Bit, Dst, 1, VTMP2, 0);
} else {
mov(VTMP1.Q(), VectorLower.Q());
sqxtn2(SubRegSize, VTMP1, VectorUpper);
mov(Dst.Q(), VTMP1.Q());
if (Dst == VectorLower) {
sqxtn2(SubRegSize, VectorLower, VectorUpper);
} else {
mov(VTMP1.Q(), VectorLower.Q());
sqxtn2(SubRegSize, VTMP1, VectorUpper);
mov(Dst.Q(), VTMP1.Q());
}
}
}
}