FEXCore/Dispatcher: Check encoding errors

This commit is contained in:
Ryan Houdek authored and Billy Laws committed 2025-10-28 23:53:15 +00:00
1 parent 93b7c513d8
commit 65fff73959
1 file changed
+35 -14
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: MIT
#include "Common/SoftFloat.h"
#include "Common/VectorRegType.h"
#include "Interface/Context/Context.h"
#include "Interface/Core/CPUBackend.h"
#include "Interface/Core/Dispatcher/Dispatcher.h"
@@ -26,9 +26,7 @@
#endif
#include <array>
#include <atomic>
#include <bit>
#include <condition_variable>
#include <csignal>
#include <cstring>
@@ -95,7 +93,9 @@ void Dispatcher::EmitDispatcher() {
FillStaticRegs();
ldr(RipReg, STATE_PTR(CpuStateFrame, State.rip));
cbnz(ARMEmitter::Size::i32Bit, ENTRY_FILL_SRA_SINGLE_INST_REG, &CompileSingleStep);
if (!cbnz(ARMEmitter::Size::i32Bit, ENTRY_FILL_SRA_SINGLE_INST_REG, &CompileSingleStep)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
ARMEmitter::BiDirectionalLabel LoopTop {};
@@ -144,7 +144,9 @@ void Dispatcher::EmitDispatcher() {
// We want to ensure that we are 16 byte aligned at the top of this loop
Align16B();
Bind(&LoopTop);
if (!Bind(&LoopTop)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
AbsoluteLoopTopAddress = GetCursorAddress<uint64_t>();
// Load in our RIP
@@ -171,11 +173,15 @@ void Dispatcher::EmitDispatcher() {
ldr(TMP2, STATE_PTR(CpuStateFrame, Pointers.Common.ExitFunctionEC));
br(TMP2);
Bind(&l_NotECCode);
if (!Bind(&l_NotECCode)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
#endif
ldrb(TMP1, STATE_PTR(CpuStateFrame, State.flags[X86State::RFLAG_TF_RAW_LOC]));
cbnz(ARMEmitter::Size::i32Bit, TMP1, &CompileSingleStep);
if (!cbnz(ARMEmitter::Size::i32Bit, TMP1, &CompileSingleStep)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
ARMEmitter::ForwardLabel NoBlock;
@@ -313,7 +319,9 @@ void Dispatcher::EmitDispatcher() {
// Need to create the block
{
Bind(&NoBlock);
if (!Bind(&NoBlock)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
EmitSignalGuardedRegion([&]() {
SpillStaticRegs(TMP1);
@@ -347,7 +355,9 @@ void Dispatcher::EmitDispatcher() {
}
{
Bind(&CompileSingleStep);
if (!Bind(&CompileSingleStep)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
EmitSignalGuardedRegion([&]() {
SpillStaticRegs(TMP1);
@@ -509,7 +519,9 @@ void Dispatcher::EmitDispatcher() {
stp<ARMEmitter::IndexType::PRE>(ARMEmitter::XReg::zr, ARMEmitter::XReg::zr, REG_CALLRET_SP, -0x10);
// Now go back to the regular dispatcher loop
b(&LoopTop);
if (!b(&LoopTop)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
}
auto EmitLongALUOpHandler = [&](auto R, auto Offset) {
@@ -578,14 +590,23 @@ void Dispatcher::EmitDispatcher() {
}
}
Bind(&l_CTX);
if (!Bind(&l_CTX)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
dc64(reinterpret_cast<uintptr_t>(CTX));
Bind(&l_Sleep);
if (!Bind(&l_Sleep)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
dc64(reinterpret_cast<uint64_t>(SleepThread));
Bind(&l_CompileBlock);
if (!Bind(&l_CompileBlock)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
FEXCore::Utils::MemberFunctionToPointerCast PMFCompileBlock(&FEXCore::Context::ContextImpl::CompileBlock);
dc64(PMFCompileBlock.GetConvertedPointer());
Bind(&l_CompileSingleStep);
if (!Bind(&l_CompileSingleStep)) [[unlikely]] {
LOGMAN_MSG_A_FMT("Dispatcher programming mistake");
}
FEXCore::Utils::MemberFunctionToPointerCast PMFCompileSingleStep(&FEXCore::Context::ContextImpl::CompileSingleStep);
dc64(PMFCompileSingleStep.GetConvertedPointer());