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FEXCore: remove very out-of-date optimizer docs
most of this doesn't exist and won't exist. nothing lost here but hopes & dreams. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
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# FEXCore IR Optimization passes
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---
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**This is very much a WIP since these optimization passes aren't in code yet**
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## Pass Managers
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* Need Function level optimization pass manager
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* Need block level optimization pass manager
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### Dead Store Elimination
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We need to do dead store elimination because LLVM can't always handle elimination of our loadstores
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This is very apparent when we are doing flag calculations and LLVM isn't able to remove them
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This is mainly just an issue around the context loadstores.
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We will want this more when the IRJIT comes online.
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### Dead flag elimination
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X86-64 is a fairly disguting ISA in that it calculates a bunch of flags on almost all instructions.
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We need eliminate redundant flag calculations that end up being being overwritten without being used.
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This happens *constantly* and in most cases the flag calculation takes significantly more work than the basic op by itself
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Good chance that breaking out the flags to independent memory locations will make this easier. Or just adding ops for flag handling.
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### Dead Code Elimination
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There are a lot of cases that code will be generated that is immediately dead afterwards.
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Flag calculation elimination will produce a lot of dead code that needs to get removed.
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Additionally there are a decent amount of x86-64 instructions that store their results in to multiple registers and then the next instruction overwrites one of those instructions.
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Multiply and Divide being a big one, since x86 calculates these at higher precision.
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These can rely significantly tracking liveness between LoadContext and StoreContext ops
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### ABI register elimination pass
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This one is very fun and will reduce a decent amount of work that the JIT needs to do.
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When we are targeting a specific x86-64 ABI and we know that we have translated a block of code that is the entire function.
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We can eliminate stores to the context that by ABI standards is a temporary register.
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We will be able to know exactly that these are dead and just remove the store (and run all the passes that optimize the rest away afterwards).
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### Loadstore coalescing pass
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Large amount of x86-64 instructions load or store registers in order from the context.
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We can merge these in to loadstore pair ops to improve perf
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### Function level heuristic pass
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Once we know that a function is a true full recompile we can do some additional optimizations.
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Remove any final flag stores. We know that a compiler won't pass flags past a function call boundary(It doesn't exist in the ABI)
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Remove any loadstores to the context mid function, only do a final store at the end of the function and do loads at the start. Which means ops just map registers directly throughout the entire function.
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### SIMD coalescing pass?
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When operating on older MMX ops(64bit SIMD) and they may end up up generating some independent ops that can be coalesced in to a 128bit op
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