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Merge pull request #5770 from lioncash/cast
CPUBackend: Remove unnecessary reinterpret_casts
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1 file changed
+8
-6
@@ -358,10 +358,10 @@ namespace CPU {
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LogMan::Msg::EFmt("Failed to mprotect last page of code buffer.");
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}
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FEXCore::Allocator::VirtualName("FEXMemJIT", reinterpret_cast<void*>(Ptr), Size);
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FEXCore::Allocator::VirtualName("FEXMemJIT", Ptr, Size);
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// Huge-pages reduce the amount of iTLB misses dramatically when it works.
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FEXCore::Allocator::VirtualTHPControl(reinterpret_cast<void*>(Ptr), Size, FEXCore::Allocator::THPControl::Enable);
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FEXCore::Allocator::VirtualTHPControl(Ptr, Size, FEXCore::Allocator::THPControl::Enable);
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LookupCache = fextl::make_unique<GuestToHostMap>();
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}
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@@ -430,17 +430,19 @@ namespace CPU {
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bool CPUBackend::IsAddressInCodeBuffer(uintptr_t Address) const {
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auto CheckCodeBuffer = [](CodeBuffer& Buffer, uintptr_t Address) {
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const auto CheckCodeBuffer = [](const CodeBuffer& Buffer, uintptr_t Address) {
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const auto BufferPtr = reinterpret_cast<uintptr_t>(Buffer.Ptr);
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// The last page of the code buffer is protected, so we need to exclude it from the valid range
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// when checking if the address is in the code buffer.
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uintptr_t LastPageAddr = AlignDown(reinterpret_cast<uintptr_t>(Buffer.Ptr) + Buffer.AllocatedSize - 1, FEXCore::Utils::FEX_PAGE_SIZE);
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return (Address >= reinterpret_cast<uintptr_t>(Buffer.Ptr) && Address < LastPageAddr);
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const uintptr_t LastPageAddr = AlignDown(BufferPtr + Buffer.AllocatedSize - 1, FEXCore::Utils::FEX_PAGE_SIZE);
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return (Address >= BufferPtr && Address < LastPageAddr);
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};
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if (CheckCodeBuffer(*CurrentCodeBuffer, Address)) {
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return true;
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}
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for (auto& Buffer : SignalHandlerCodeBuffers) {
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for (const auto& Buffer : SignalHandlerCodeBuffers) {
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if (CheckCodeBuffer(*Buffer, Address)) {
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return true;
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}
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