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https://github.com/FEX-Emu/FEX.git
synced 2026-10-14 19:00:43 +02:00
DecodedOperand: Convert operand type into an enum class
Now possible in a less messy way, since the type is now centralized in one location. Makes it strongly typed and prevents any potential accidental implicit assignments to Type instead of something intended for the Data members.
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71c32c0135
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37e2210f64
2 files changed
+28
-28
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+12
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@@ -197,7 +197,7 @@ void Decoder::DecodeModRM_16(X86Tables::DecodedOperand *Operand, X86Tables::ModR
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}
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}
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Operand->Type = DecodedOperand::TYPE_SIB;
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Operand->Type = DecodedOperand::OpType::SIB;
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Operand->Data.SIB.Scale = 1;
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Operand->Data.SIB.Offset = Literal;
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@@ -277,7 +277,7 @@ void Decoder::DecodeModRM_64(X86Tables::DecodedOperand *Operand, X86Tables::ModR
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}
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// SIB
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Operand->Type = DecodedOperand::TYPE_SIB;
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Operand->Type = DecodedOperand::OpType::SIB;
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Operand->Data.SIB.Scale = 1 << SIB.scale;
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// The invalid encoding types are described at Table 1-12. "promoted nsigned is always non-zero"
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@@ -300,12 +300,12 @@ void Decoder::DecodeModRM_64(X86Tables::DecodedOperand *Operand, X86Tables::ModR
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uint32_t Literal;
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Literal = ReadData(4);
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Operand->Type = DecodedOperand::TYPE_RIP_RELATIVE;
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Operand->Type = DecodedOperand::OpType::RIPRelative;
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Operand->Data.RIPLiteral.Value.u = Literal;
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}
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else {
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// Register-direct addressing
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Operand->Type = DecodedOperand::TYPE_GPR_DIRECT;
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Operand->Type = DecodedOperand::OpType::GPRDirect;
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Operand->Data.GPR.GPR = MapModRMToReg(DecodeInst->Flags & DecodeFlags::FLAG_REX_XGPR_B ? 1 : 0, ModRM.rm, false, false, false, false);
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}
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}
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@@ -318,7 +318,7 @@ void Decoder::DecodeModRM_64(X86Tables::DecodedOperand *Operand, X86Tables::ModR
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}
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Displacement = DisplacementSize;
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Operand->Type = DecodedOperand::TYPE_GPR_INDIRECT;
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Operand->Type = DecodedOperand::OpType::GPRIndirect;
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Operand->Data.GPRIndirect.GPR = MapModRMToReg(DecodeInst->Flags & DecodeFlags::FLAG_REX_XGPR_B ? 1 : 0, ModRM.rm, false, false, false, false);
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Operand->Data.GPRIndirect.Displacement = Literal;
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}
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@@ -460,7 +460,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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if (HAS_NON_XMM_SUBFLAG(Info->Flags, FEXCore::X86Tables::InstFlags::FLAGS_SF_DST_RAX) ||
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HAS_NON_XMM_SUBFLAG(Info->Flags, FEXCore::X86Tables::InstFlags::FLAGS_SF_DST_RDX)) {
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// Some instructions hardcode their destination as RAX
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CurrentDest->Type = DecodedOperand::TYPE_GPR;
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CurrentDest->Type = DecodedOperand::OpType::GPR;
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CurrentDest->Data.GPR.HighBits = false;
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CurrentDest->Data.GPR.GPR = HAS_NON_XMM_SUBFLAG(Info->Flags, FEXCore::X86Tables::InstFlags::FLAGS_SF_DST_RAX) ? FEXCore::X86State::REG_RAX : FEXCore::X86State::REG_RDX;
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CurrentDest = &DecodeInst->Src[0];
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@@ -473,7 +473,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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// This also means that the destination is always a GPR on these ones
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// ADDITIONALLY:
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// If there is a REX prefix then that allows extended GPR usage
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CurrentDest->Type = DecodedOperand::TYPE_GPR;
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CurrentDest->Type = DecodedOperand::OpType::GPR;
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DecodeInst->Dest.Data.GPR.HighBits = (Is8BitDest && !HasREX && (Op & 0b111) >= 0b100) || HasHighXMM;
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CurrentDest->Data.GPR.GPR = MapModRMToReg(DecodeInst->Flags & DecodeFlags::FLAG_REX_XGPR_B ? 1 : 0, Op & 0b111, Is8BitDest, HasREX, false, false);
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@@ -501,7 +501,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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ModRM.Hex = DecodeInst->ModRM;
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// Decode the GPR source first
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GPR.Type = DecodedOperand::TYPE_GPR;
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GPR.Type = DecodedOperand::OpType::GPR;
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GPR.Data.GPR.HighBits = (GPR8Bit && ModRM.reg >= 0b100 && !HasREX) || HasHighXMM;
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GPR.Data.GPR.GPR = MapModRMToReg(DecodeInst->Flags & DecodeFlags::FLAG_REX_XGPR_R ? 1 : 0, ModRM.reg, GPR8Bit, HasREX, HasXMMGPR, HasMMGPR);
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@@ -511,7 +511,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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// ModRM.mod == 0b11 == Register
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// ModRM.Mod != 0b11 == Register-direct addressing
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if (ModRM.mod == 0b11) {
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NonGPR.Type = DecodedOperand::TYPE_GPR;
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NonGPR.Type = DecodedOperand::OpType::GPR;
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NonGPR.Data.GPR.HighBits = (NonGPR8Bit && ModRM.rm >= 0b100 && !HasREX) || HasHighXMM;
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NonGPR.Data.GPR.GPR = MapModRMToReg(DecodeInst->Flags & DecodeFlags::FLAG_REX_XGPR_B ? 1 : 0, ModRM.rm, NonGPR8Bit, HasREX, HasXMMNonGPR, HasMMNonGPR);
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if (NonGPR.Data.GPR.GPR == FEXCore::X86State::REG_INVALID)
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@@ -540,13 +540,13 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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}
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if (HAS_NON_XMM_SUBFLAG(Info->Flags, FEXCore::X86Tables::InstFlags::FLAGS_SF_SRC_RAX)) {
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::TYPE_GPR;
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::OpType::GPR;
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DecodeInst->Src[CurrentSrc].Data.GPR.HighBits = false;
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DecodeInst->Src[CurrentSrc].Data.GPR.GPR = FEXCore::X86State::REG_RAX;
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++CurrentSrc;
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}
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else if (HAS_NON_XMM_SUBFLAG(Info->Flags, FEXCore::X86Tables::InstFlags::FLAGS_SF_SRC_RCX)) {
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::TYPE_GPR;
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::OpType::GPR;
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DecodeInst->Src[CurrentSrc].Data.GPR.HighBits = false;
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DecodeInst->Src[CurrentSrc].Data.GPR.GPR = FEXCore::X86State::REG_RCX;
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++CurrentSrc;
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@@ -574,7 +574,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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}
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Bytes = 0;
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::TYPE_LITERAL;
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DecodeInst->Src[CurrentSrc].Type = DecodedOperand::OpType::Literal;
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DecodeInst->Src[CurrentSrc].Data.Literal.Value = Literal;
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}
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+16
-16
@@ -100,36 +100,36 @@ inline void PopOpAddrIf(uint32_t *Flags, uint32_t Flag) {
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}
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struct DecodedOperand {
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enum {
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TYPE_NONE,
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TYPE_GPR,
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TYPE_GPR_DIRECT,
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TYPE_GPR_INDIRECT,
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TYPE_RIP_RELATIVE,
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TYPE_LITERAL,
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TYPE_SIB,
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enum class OpType : uint8_t {
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Nothing,
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GPR,
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GPRDirect,
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GPRIndirect,
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RIPRelative,
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Literal,
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SIB,
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};
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bool IsNone() const {
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return Type == TYPE_NONE;
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return Type == OpType::Nothing;
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}
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bool IsGPR() const {
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return Type == TYPE_GPR;
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return Type == OpType::GPR;
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}
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bool IsGPRDirect() const {
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return Type == TYPE_GPR_DIRECT;
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return Type == OpType::GPRDirect;
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}
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bool IsGPRIndirect() const {
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return Type == TYPE_GPR_INDIRECT;
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return Type == OpType::GPRIndirect;
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}
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bool IsRIPRelative() const {
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return Type == TYPE_RIP_RELATIVE;
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return Type == OpType::RIPRelative;
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}
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bool IsLiteral() const {
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return Type == TYPE_LITERAL;
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return Type == OpType::Literal;
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}
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bool IsSIB() const {
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return Type == TYPE_SIB;
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return Type == OpType::SIB;
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}
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union TypeUnion {
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@@ -163,7 +163,7 @@ struct DecodedOperand {
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} SIB;
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};
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uint8_t Type;
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OpType Type;
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TypeUnion Data;
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};
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