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https://github.com/FEX-Emu/FEX.git
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HostFeatures: Pull MMFR3 identification register
This has the S1POE flag that we will want to use in the future.
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@@ -1,6 +1,9 @@
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// SPDX-License-Identifier: MIT
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#include "Common/CPUInfo.h"
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#include "Common/HostFeatures.h"
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#ifndef _WIN32
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#include "Common/Linux/LinuxVersion.h"
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#endif
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Core/HostFeatures.h>
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@@ -69,7 +72,8 @@ GetSysReg(MIDR_EL1, MIDR_EL1);
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GetSysReg(ISAR1_EL1, ID_AA64ISAR1_EL1);
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GetSysReg(MMFR0_EL1, ID_AA64MMFR0_EL1);
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GetSysReg(MMFR2_EL1, ID_AA64MMFR2_EL1);
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GetSysReg(ZFR0_EL1, s3_0_c0_c4_4); // Can't request by name
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GetSysReg(MMFR3_EL1, s3_0_c0_c7_3); // Can't request by name
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GetSysReg(ZFR0_EL1, s3_0_c0_c4_4); // Can't request by name
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GetSysReg(MMFR1_EL1, ID_AA64MMFR1_EL1);
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GetSysReg(ISAR2_EL1, ID_AA64ISAR2_EL1);
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GetSysReg(DCZID_EL0, DCZID_EL0);
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@@ -84,6 +88,12 @@ public:
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ISAR1.SetReg(Get_ISAR1_EL1());
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MMFR0.SetReg(Get_MMFR0_EL1());
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MMFR2.SetReg(Get_MMFR2_EL1());
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#ifndef _WIN32
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if (FEX::LinuxVersion::CalculateHostKernelVersion() >= FEX::LinuxVersion::KernelVersion(6, 5)) {
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// Only exists in kernel 6.5 and newer.
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MMFR3.SetReg(Get_MMFR3_EL1());
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}
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#endif
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MMFR1.SetReg(Get_MMFR1_EL1());
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ISAR2.SetReg(Get_ISAR2_EL1());
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DCZID.SetReg(Get_DCZID_EL0());
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@@ -158,6 +168,8 @@ public:
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MMFR1.SetReg(ValueHex);
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} else if (Key == "mmfr2") {
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MMFR2.SetReg(ValueHex);
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} else if (Key == "mmfr3") {
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MMFR3.SetReg(ValueHex);
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} else if (Key == "zfr0") {
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ZFR0.SetReg(ValueHex);
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} else if (Key == "dczid") {
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@@ -101,6 +101,8 @@ public:
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SVE_F64MM,
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// MMFR1
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AFP,
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// MMFR3
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S1POE,
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// ISAR2
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WFxt,
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RPRES,
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@@ -148,6 +150,7 @@ public:
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MMFR2_EL1,
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ZFR0_EL1,
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MMFR1_EL1,
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MMFR3_EL1,
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ISAR2_EL1,
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};
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@@ -559,6 +562,30 @@ public:
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};
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};
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class MMFR3Reg final : public FeatureReg {
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public:
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FIELD_FETCHER(S1POE, S1POE, 0b0001);
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private:
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enum Field {
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TCRX = 0 * 4,
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SCTLRX = 1 * 4,
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S1PIE = 2 * 4,
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S2PIE = 3 * 4,
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S1POE = 4 * 4,
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S2POE = 5 * 4,
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AIE = 6 * 4,
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MEC = 7 * 4,
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D128 = 8 * 4,
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D128_2 = 9 * 4,
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SNERR = 10 * 4,
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ANERR = 11 * 4,
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SDERR = 13 * 4,
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ADERR = 14 * 4,
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SPEC_FPACC = 15 * 4,
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};
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};
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class ISAR2Reg final : public FeatureReg {
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public:
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FIELD_FETCHER(WFxt, WFxt, 0b0010);
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@@ -621,6 +648,7 @@ public:
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ZFR0Reg ZFR0;
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MMFR2Reg MMFR2;
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MMFR1Reg MMFR1;
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MMFR3Reg MMFR3;
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ISAR2Reg ISAR2;
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DCZIDReg DCZID;
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SVEVLReg SVEVL;
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@@ -485,6 +485,7 @@ int main(int argc, char** argv, char** envp) {
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features += fmt::format("mmfr0=0x{:x},", Features.MMFR0.Get());
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features += fmt::format("mmfr1=0x{:x},", Features.MMFR1.Get());
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features += fmt::format("mmfr2=0x{:x},", Features.MMFR2.Get());
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features += fmt::format("mmfr3=0x{:x},", Features.MMFR3.Get());
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features += fmt::format("zfr0=0x{:x},", Features.ZFR0.Get());
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features += fmt::format("dczid=0x{:x},", Features.DCZID.Get());
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features += fmt::format("svevl=0x{:x}", Features.SVEVL.Get());
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