unittests: Update tests for new IR operand ordering

unittests/IR/Basic/MemoryData.ir

@@ -16,7 +16,7 @@
   (%ssa2) CodeBlock %start, %end, %ssa1
     (%start i0) BeginBlock %ssa2
     %Addr i64 = Constant #0x100000
-    %Val i32 = LoadMem %Addr i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %Val i32 = LoadMem %Addr i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     (%Store i64) StoreContext %Val i64, #0x08, GPR
     (%brk i0) Break #4, #4
     (%end i0) EndBlock %ssa2

unittests/IR/Basic/Sbfe.ir

@@ -21,7 +21,7 @@
   (%ssa2) CodeBlock %start, %end, %ssa1
     (%start i0) BeginBlock %ssa2
     %Addr1 i64 = Constant #0x1000000
-    %Val i64 = LoadMem %Addr1 i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %Val i64 = LoadMem %Addr1 i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
 ; Test aligned special cases
     %Res1 i64 = Sbfe %Val, #0x8, #0x0
     (%Store1 i64) StoreContext %Res1 i64, #0x08, GPR
@@ -31,7 +31,7 @@
     (%Store3 i64) StoreContext %Res3 i64, #0x18, GPR
     %Addr2 i64 = Constant #0x1000008
 ; Test non special width
-    %Val2 i64 = LoadMem %Addr2 i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %Val2 i64 = LoadMem %Addr2 i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     %Res4 i64 = Sbfe %Val2, #0x6, #0x0
     (%Store4 i64) StoreContext %Res4 i64, #0x20, GPR
 ; Test with + shift

unittests/IR/Correctness/AddTruncate.ir

@@ -20,9 +20,9 @@
   (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
     (%ssa6 i0) BeginBlock %ssa2
     %AddrA i64 = Constant #0x1000000
-    %MemValueA i64 = LoadMem %AddrA i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %MemValueA i64 = LoadMem %AddrA i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     %AddrB i64 = Constant #0x1000010
-    %MemValueB i64 = LoadMem %AddrB i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %MemValueB i64 = LoadMem %AddrB i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     %ResultA i32 = Add %MemValueA, %MemValueB
     %ResultB i64 = Add %MemValueA, %MemValueB
     (%Store i64) StoreContext %ResultA i64, #0x08, GPR

unittests/IR/Correctness/FPRStoreTruncate.ir

@@ -23,14 +23,14 @@
     (%begin i0) BeginBlock %ssa2
 ; Clear registers
     %AddrB i64 = Constant #0x1000010
-    %ClearVal i128 = LoadMem %AddrB i64, %Invalid, #0x10, #0x10, FPR, SXTX, #0x1
+    %ClearVal i128 = LoadMem %AddrB i64, %Invalid, #0x10, FPR, SXTX, #0x1, #0x10
     (%Clear1 i128) StoreContext %ClearVal i128, #0x90, FPR
     (%Clear2 i128) StoreContext %ClearVal i128, #0xa0, FPR
     (%Clear3 i128) StoreContext %ClearVal i128, #0xb0, FPR
     (%Clear4 i128) StoreContext %ClearVal i128, #0xc0, FPR
 
     %AddrA i64 = Constant #0x1000000
-    %MemValueA i128 = LoadMem %AddrA i64, %Invalid, #0x10, #0x10, FPR, SXTX, #0x1
+    %MemValueA i128 = LoadMem %AddrA i64, %Invalid, #0x10, FPR, SXTX, #0x1, #0x10
 
     (%Store1 i64) StoreContext %MemValueA i128, #0x90, FPR
     (%Store2 i32) StoreContext %MemValueA i128, #0xa0, FPR

unittests/IR/Correctness/LeftShiftTruncate.ir

@@ -20,7 +20,7 @@
   (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
     (%ssa6 i0) BeginBlock %ssa2
     %AddrA i64 = Constant #0x1000000
-    %MemValueA i32 = LoadMem %AddrA i64, %Invalid, #0x4, #0x4, GPR, SXTX, #0x1
+    %MemValueA i32 = LoadMem %AddrA i64, %Invalid, #0x4, GPR, SXTX, #0x1, #0x4
     %Shift i64 = Constant #0x1
     %ResultA i32 = Lshl %MemValueA, %Shift
     %ResultB i64 = Lshl %MemValueA, %Shift

unittests/IR/Correctness/SubTruncate.ir

@@ -20,9 +20,9 @@
   (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
     (%ssaStart i0) BeginBlock %ssa2
     %AddrA i64 = Constant #0x1000000
-    %MemValueA i64 = LoadMem %AddrA i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %MemValueA i64 = LoadMem %AddrA i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     %AddrB i64 = Constant #0x1000010
-    %MemValueB i64 = LoadMem %AddrB i64, %Invalid, #0x8, #0x8, GPR, SXTX, #0x1
+    %MemValueB i64 = LoadMem %AddrB i64, %Invalid, #0x8, GPR, SXTX, #0x1, #0x8
     %ResultA i32 = Sub %MemValueA, %MemValueB
     %ResultB i64 = Sub %MemValueA, %MemValueB
     (%Store i64) StoreContext %ResultA i64, #0x08, GPR