steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-06 14:00:16 +02:00
Code Issues Packages Projects Releases 66 Wiki Activity

Merge pull request #5552 from lioncash/literal

Browse Source 
OpcodeDispatcher: Move a few stray literal accesses to Literal()
This commit is contained in:
Ryan Houdek authored and GitHub committed 2026-06-16 19:37:28 -07:00
2 parents e12bd27106 d15b175c33
commit 09aa5abbdf
1 file changed
+4 -4
Download Patch File Download Diff File Expand all files Collapse all files
FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
+4 -4
View File
@@ -1011,7 +1011,7 @@ Ref OpDispatchBuilder::PShufWLane(IR::OpSize Size, FEXCore::IR::IndexNamedVector
}
void OpDispatchBuilder::PSHUFW8ByteOp(OpcodeArgs) {
uint8_t Shuffle = Op->Src[1].Data.Literal.Value;
uint8_t Shuffle = Op->Src[1].Literal();
const auto Size = OpSizeFromSrc(Op);
const auto TBLIndex = FEXCore::IR::INDEXED_NAMED_VECTOR_PSHUFLW;
Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags);
@@ -1531,7 +1531,7 @@ void OpDispatchBuilder::PSHUFW8ByteOp(OpcodeArgs) {
}
void OpDispatchBuilder::PSHUFWOp(OpcodeArgs, bool Low) {
uint16_t Shuffle = Op->Src[1].Data.Literal.Value;
uint16_t Shuffle = Op->Src[1].Literal();
const auto Size = OpSizeFromSrc(Op);
Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags);
const auto IndexedVectorConstant = Low ? FEXCore::IR::IndexNamedVectorConstant::INDEXED_NAMED_VECTOR_PSHUFLW :
@@ -1769,7 +1769,7 @@ Ref OpDispatchBuilder::Single128Bit4ByteVectorShuffle(Ref Src, uint8_t Shuffle)
}
void OpDispatchBuilder::PSHUFDOp(OpcodeArgs) {
uint16_t Shuffle = Op->Src[1].Data.Literal.Value;
uint16_t Shuffle = Op->Src[1].Literal();
Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags);
StoreResultFPR(Op, Single128Bit4ByteVectorShuffle(Src, Shuffle));
}
@@ -3074,7 +3074,7 @@ void OpDispatchBuilder::VFCMPOp(OpcodeArgs) {
Ref Src = LoadSourceFPR_WithOpSize(Op, Op->Src[0], SrcSize, Op->Flags);
Ref Dest = LoadSourceFPR_WithOpSize(Op, Op->Dest, DstSize, Op->Flags);
const uint8_t CompType = Op->Src[1].Data.Literal.Value;
const uint8_t CompType = Op->Src[1].Literal();
Ref Result = VFCMPOpImpl(OpSizeFromSrc(Op), ElementSize, Dest, Src, CompType & 0b111);