Cody Wagner 8f6568cc68 CleanUp ...

-Added Locus EV1 STEP and STL files
-Added Locus PCB picture
-Added very early work on PI3 carrier board
-Added nearly complete VeriMini kicad project
-Added extra details to README

2026-09-19 15:42:16 -04:00

..

STEP

Locus redesign + Some Models

2026-09-01 00:21:06 -04:00

Veri_Bot.stl

CleanUp

2026-09-19 15:42:16 -04:00

Veri_Cap.stl

CleanUp

2026-09-19 15:42:16 -04:00

Veri_Top.stl

CleanUp

2026-09-19 15:42:16 -04:00

VeriEV1.stl

VERSIPELLIS/TURRIM Model files

2026-06-28 21:45:51 -04:00

VeriEV2.stl

VERSIPELLIS/TURRIM Model files

2026-06-28 21:45:51 -04:00