Ryan Houdek 79ab76b42e AVX128: Optimize vpalignr ...

When the shift size is exactly 16bytes, then it turns in to a move.

If the shift size is above 16-bytes then synthesize the zero register in
the OpcodeDispatcher, so the backend doesn't synthesize and not cache.

2025-03-06 17:10:22 -08:00

..

AVX_128.cpp

AVX128: Optimize vpalignr

2025-03-06 17:10:22 -08:00

BaseTables.h

OpcodeDispatcher: Remove previous template instantiantions and use Bind

2024-09-16 18:52:54 -07:00

Crypto.cpp

OpcodeDispatcher: Reuse PSHUFD shuffle mask for sha data shuffling

2025-02-24 12:07:48 -08:00

DDDTables.h

Improve reciprocal estimate and tests

2025-02-27 15:07:14 +01:00

Flags.cpp

OpcodeDispatcher: use 64-bit XOR for AF calc

2024-12-13 10:44:56 -05:00

H0F3ATables.h

OpcodeDispatcher: Fixes FEX's H0F3A table handling of REX.W

2025-01-01 08:22:19 -08:00

H0F38Tables.h

IR: Change VUnZip to use IR::OpSize

2024-10-28 00:31:23 -07:00

PrimaryGroupTables.h

X86Tables: Remove function wraps from Group tables

2024-09-16 18:52:54 -07:00

SecondaryGroupTables.h

Frontend: Mark INVLPG as permission-restricted

2025-02-28 16:22:47 +00:00

SecondaryModRMTables.h

X86Tables: Remove function wraps from SecondaryModRM table

2024-09-16 18:52:54 -07:00

SecondaryTables.h

FEXCore: Somewhat implement LSL

2025-02-27 23:45:14 +00:00

Vector.cpp

Improve reciprocal estimate and tests

2025-02-27 15:07:14 +01:00

VEXTables.h

X86Tables: Remove function wraps from VEX tables

2024-09-16 18:52:55 -07:00

X87.cpp

Various: Removes warnings about uninitialized variables

2025-03-04 19:59:26 -08:00

X87F64.cpp

x87 fst/fld optimization for different addrmodes

2025-01-14 16:20:33 +01:00