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This new variable length pair of integer implementation is taking direct advantage of the most common aspects of FEX's JIT in that most x86 instructions are <= 8-bytes in length, and the ARM implementations of those are /usually/ 16 instructions in length or less. Also only unsigned offsets in this implementation since the common case is forward incrementing. This converts a majority of 16-bit vl encodings in to an 8-bit encoding instead, shaving space off the RIP reconstruction data. An additional optimization is for the 16-bit pair of integers, we continue this optimization through but with more bits and changing over to signed. This captures the second most common cases of /slightly/ larger increments and small loops. Pairs of 32-bit and 64-bit integers are unoptimized since they are uncommon.