mirror of
https://github.com/FEX-Emu/FEX.git
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385 lines
15 KiB
C++
385 lines
15 KiB
C++
// SPDX-License-Identifier: MIT
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#pragma once
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#include "Common/JitSymbols.h"
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#include "Interface/Core/CPUID.h"
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#include "Interface/Core/X86HelperGen.h"
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#include "Interface/Core/ObjectCache/ObjectCacheService.h"
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#include "Interface/Core/Dispatcher/Dispatcher.h"
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#include "Interface/IR/AOTIR.h"
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Core/CoreState.h>
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#include <FEXCore/Core/HostFeatures.h>
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#include <FEXCore/Core/SignalDelegator.h>
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#include <FEXCore/Debug/InternalThreadState.h>
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#include <FEXCore/IR/IR.h>
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#include <FEXCore/Utils/CompilerDefs.h>
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#include <FEXCore/Utils/Event.h>
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#include <FEXCore/Utils/SignalScopeGuards.h>
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#include <FEXCore/fextl/memory.h>
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#include <FEXCore/fextl/set.h>
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#include <FEXCore/fextl/string.h>
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#include <FEXCore/fextl/unordered_map.h>
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#include <FEXCore/fextl/vector.h>
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#include <FEXHeaderUtils/Syscalls.h>
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#include <stdint.h>
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#include <atomic>
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#include <mutex>
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#include <shared_mutex>
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namespace FEXCore {
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class CodeLoader;
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class ThunkHandler;
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namespace CodeSerialize {
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class CodeObjectSerializeService;
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}
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namespace CPU {
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class Arm64JITCore;
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class Dispatcher;
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} // namespace CPU
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namespace HLE {
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struct SyscallArguments;
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class SyscallHandler;
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class SourcecodeResolver;
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struct SourcecodeMap;
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} // namespace HLE
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} // namespace FEXCore
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namespace FEXCore::IR {
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struct IRListCopy;
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class IRListView;
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namespace Validation {
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class IRValidation;
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}
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} // namespace FEXCore::IR
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namespace FEXCore::Context {
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struct FEX_PACKED ExitFunctionLinkData {
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uint64_t HostBranch;
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uint64_t GuestRIP;
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};
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struct CustomIRResult {
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void* Creator;
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void* Data;
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CustomIRResult(void* Creator, void* Data)
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: Creator(Creator)
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, Data(Data) {}
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};
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using BlockDelinkerFunc = void (*)(FEXCore::Core::CpuStateFrame* Frame, FEXCore::Context::ExitFunctionLinkData* Record);
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constexpr uint32_t TSC_SCALE_MAXIMUM = 1'000'000'000; ///< 1Ghz
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class ContextImpl final : public FEXCore::Context::Context, CPU::CodeBufferManager {
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public:
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// Context base class implementation.
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bool InitCore() override;
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void ExecuteThread(FEXCore::Core::InternalThreadState* Thread) override;
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void CompileRIP(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP) override;
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void CompileRIPCount(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, uint64_t MaxInst) override;
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void HandleCallback(FEXCore::Core::InternalThreadState* Thread, uint64_t RIP) override;
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bool IsAddressInCurrentBlock(FEXCore::Core::InternalThreadState* Thread, uint64_t Address, uint64_t Size) override;
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bool IsCurrentBlockSingleInst(FEXCore::Core::InternalThreadState* Thread) override;
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uint64_t RestoreRIPFromHostPC(FEXCore::Core::InternalThreadState* Thread, uint64_t HostPC) override;
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uint32_t ReconstructCompactedEFLAGS(FEXCore::Core::InternalThreadState* Thread, bool WasInJIT, const uint64_t* HostGPRs, uint64_t PSTATE) override;
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void SetFlagsFromCompactedEFLAGS(FEXCore::Core::InternalThreadState* Thread, uint32_t EFLAGS) override;
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void ReconstructXMMRegisters(const FEXCore::Core::InternalThreadState* Thread, __uint128_t* XMM_Low, __uint128_t* YMM_High) override;
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void SetXMMRegistersFromState(FEXCore::Core::InternalThreadState* Thread, const __uint128_t* XMM_Low, const __uint128_t* YMM_High) override;
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/**
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* @brief Used to create FEX thread objects in preparation for creating a true OS thread. Does set a TID or PID.
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*
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* @param InitialRIP The starting RIP of this thread
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* @param StackPointer The starting RSP of this thread
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* @param NewThreadState The initial thread state to setup for our state, if inheriting.
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*
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* @return The InternalThreadState object that tracks all of the emulated thread's state
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*
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* Usecases:
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* Parent thread Creation:
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* - Thread = CreateThread(InitialRIP, InitialStack, nullptr, 0);
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* - CTX->ExecuteThread(Thread);
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* OS thread Creation:
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* - Thread = CreateThread(0, 0, NewState, PPID);
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* - Thread->ExecutionThread = FEXCore::Threads::Thread::Create(ThreadHandler, Arg);
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* - ThreadHandler calls `CTX->ExecuteThread(Thread)`
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* OS fork (New thread created with a clone of thread state):
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* - clone{2, 3}
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* - Thread = CreateThread(0, 0, CopyOfThreadState, PPID);
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* - ExecuteThread(Thread); // Starts executing without creating another host thread
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* Thunk callback executing guest code from native host thread
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* - Thread = CreateThread(0, 0, NewState, PPID);
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* - HandleCallback(Thread, RIP);
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*/
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FEXCore::Core::InternalThreadState* CreateThread(uint64_t InitialRIP, uint64_t StackPointer, const FEXCore::Core::CPUState* NewThreadState) override;
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/**
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* @brief Destroys this FEX thread object and stops tracking it internally
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*
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* @param Thread The internal FEX thread state object
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*/
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void DestroyThread(FEXCore::Core::InternalThreadState* Thread) override;
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#ifndef _WIN32
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void LockBeforeFork(FEXCore::Core::InternalThreadState* Thread) override;
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void UnlockAfterFork(FEXCore::Core::InternalThreadState* Thread, bool Child) override;
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#endif
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void SetSignalDelegator(FEXCore::SignalDelegator* SignalDelegation) override;
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void SetSyscallHandler(FEXCore::HLE::SyscallHandler* Handler) override;
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void SetThunkHandler(FEXCore::ThunkHandler* Handler) override;
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FEXCore::CPUID::FunctionResults RunCPUIDFunction(uint32_t Function, uint32_t Leaf) override;
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FEXCore::CPUID::XCRResults RunXCRFunction(uint32_t Function) override;
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FEXCore::CPUID::FunctionResults RunCPUIDFunctionName(uint32_t Function, uint32_t Leaf, uint32_t CPU) override;
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FEXCore::IR::AOTIRCacheEntry* LoadAOTIRCacheEntry(const fextl::string& Name) override;
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void UnloadAOTIRCacheEntry(FEXCore::IR::AOTIRCacheEntry* Entry) override;
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void SetAOTIRLoader(AOTIRLoaderCBFn CacheReader) override {
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IRCaptureCache.SetAOTIRLoader(std::move(CacheReader));
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}
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void SetAOTIRWriter(AOTIRWriterCBFn CacheWriter) override {
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IRCaptureCache.SetAOTIRWriter(std::move(CacheWriter));
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}
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void SetAOTIRRenamer(AOTIRRenamerCBFn CacheRenamer) override {
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IRCaptureCache.SetAOTIRRenamer(std::move(CacheRenamer));
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}
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void FinalizeAOTIRCache() override {
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IRCaptureCache.FinalizeAOTIRCache();
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}
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void WriteFilesWithCode(AOTIRCodeFileWriterFn Writer) override {
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IRCaptureCache.WriteFilesWithCode(Writer);
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}
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void OnCodeBufferAllocated(CPU::CodeBuffer&) override;
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void ClearCodeCache(FEXCore::Core::InternalThreadState* Thread, bool NewCodeBuffer = true) override;
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void InvalidateGuestCodeRange(FEXCore::Core::InternalThreadState* Thread, uint64_t Start, uint64_t Length) override;
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FEXCore::ForkableSharedMutex& GetCodeInvalidationMutex() override {
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return CodeInvalidationMutex;
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}
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void MarkMemoryShared(FEXCore::Core::InternalThreadState* Thread) override;
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void ConfigureAOTGen(FEXCore::Core::InternalThreadState* Thread, fextl::set<uint64_t>* ExternalBranches, uint64_t SectionMaxAddress) override;
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bool IsAddressInCodeBuffer(FEXCore::Core::InternalThreadState* Thread, uintptr_t Address) const override;
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// returns false if a handler was already registered
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std::optional<CustomIRResult>
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AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void* Creator = nullptr, void* Data = nullptr);
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void AddThunkTrampolineIRHandler(uintptr_t Entrypoint, uintptr_t GuestThunkEntrypoint) override;
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void AddForceTSOInformation(const IntervalList<uint64_t>& ValidRanges, fextl::set<uint64_t>&& Instructions) override;
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void RemoveForceTSOInformation(uint64_t Address, uint64_t Size) override;
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public:
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friend class FEXCore::HLE::SyscallHandler;
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#ifdef JIT_ARM64
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friend class FEXCore::CPU::Arm64JITCore;
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#endif
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friend class FEXCore::IR::Validation::IRValidation;
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struct {
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uint64_t VirtualMemSize {1ULL << 36};
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uint64_t TSCScale = 0;
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// Used if the JIT needs to have its interrupt fault code emitted.
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bool NeedsPendingInterruptFaultCheck {false};
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FEX_CONFIG_OPT(Multiblock, MULTIBLOCK);
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FEX_CONFIG_OPT(SingleStepConfig, SINGLESTEP);
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FEX_CONFIG_OPT(GdbServer, GDBSERVER);
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FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
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FEX_CONFIG_OPT(TSOEnabled, TSOENABLED);
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FEX_CONFIG_OPT(TSOAutoMigration, TSOAUTOMIGRATION);
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FEX_CONFIG_OPT(VectorTSOEnabled, VECTORTSOENABLED);
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FEX_CONFIG_OPT(MemcpySetTSOEnabled, MEMCPYSETTSOENABLED);
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FEX_CONFIG_OPT(ABILocalFlags, ABILOCALFLAGS);
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FEX_CONFIG_OPT(AOTIRCapture, AOTIRCAPTURE);
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FEX_CONFIG_OPT(AOTIRGenerate, AOTIRGENERATE);
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FEX_CONFIG_OPT(AOTIRLoad, AOTIRLOAD);
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FEX_CONFIG_OPT(SMCChecks, SMCCHECKS);
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FEX_CONFIG_OPT(MaxInstPerBlock, MAXINST);
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FEX_CONFIG_OPT(RootFSPath, ROOTFS);
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FEX_CONFIG_OPT(GlobalJITNaming, GLOBALJITNAMING);
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FEX_CONFIG_OPT(LibraryJITNaming, LIBRARYJITNAMING);
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FEX_CONFIG_OPT(BlockJITNaming, BLOCKJITNAMING);
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FEX_CONFIG_OPT(GDBSymbols, GDBSYMBOLS);
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FEX_CONFIG_OPT(ParanoidTSO, PARANOIDTSO);
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FEX_CONFIG_OPT(CacheObjectCodeCompilation, CACHEOBJECTCODECOMPILATION);
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FEX_CONFIG_OPT(x87ReducedPrecision, X87REDUCEDPRECISION);
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FEX_CONFIG_OPT(DisableTelemetry, DISABLETELEMETRY);
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FEX_CONFIG_OPT(DisableVixlIndirectCalls, DISABLE_VIXL_INDIRECT_RUNTIME_CALLS);
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FEX_CONFIG_OPT(SmallTSCScale, SMALLTSCSCALE);
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FEX_CONFIG_OPT(StrictInProcessSplitLocks, STRICTINPROCESSSPLITLOCKS);
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} Config;
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FEXCore::ForkableSharedMutex CodeInvalidationMutex;
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uint32_t StrictSplitLockMutex {};
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FEXCore::HostFeatures HostFeatures;
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// CPUID depends on HostFeatures so needs to be initialized after that.
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FEXCore::CPUIDEmu CPUID;
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FEXCore::HLE::SyscallHandler* SyscallHandler {};
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FEXCore::HLE::SourcecodeResolver* SourcecodeResolver {};
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FEXCore::ThunkHandler* ThunkHandler {};
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fextl::unique_ptr<FEXCore::CPU::Dispatcher> Dispatcher;
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SignalDelegator* SignalDelegation {};
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X86GeneratedCode X86CodeGen;
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ContextImpl(const FEXCore::HostFeatures& Features);
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~ContextImpl();
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static void ThreadRemoveCodeEntry(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP);
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template<auto Fn>
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static uint64_t ThreadExitFunctionLink(FEXCore::Core::CpuStateFrame* Frame, ExitFunctionLinkData* Record) {
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auto Thread = Frame->Thread;
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auto lk = GuardSignalDeferringSection<std::shared_lock>(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);
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return Fn(Frame, Record);
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}
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// Wrapper which takes CpuStateFrame instead of InternalThreadState and unique_locks CodeInvalidationMutex
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// Must be called from owning thread
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static void ThreadRemoveCodeEntryFromJit(FEXCore::Core::CpuStateFrame* Frame, uint64_t GuestRIP) {
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auto Thread = Frame->Thread;
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auto lk = GuardSignalDeferringSection(static_cast<ContextImpl*>(Thread->CTX)->CodeInvalidationMutex, Thread);
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// NOTE: Other threads sharing the same CodeBuffer may reference
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// invalidated data ranges through their L1/L2 caches. This is
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// not currently a problem since FEX does not repurpose the
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// invalidated CodeBuffer memory range currently.
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ThreadRemoveCodeEntry(Thread, GuestRIP);
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}
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void RemoveCustomIREntrypoint(uintptr_t Entrypoint);
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struct GenerateIRResult {
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std::optional<IR::IRListView> IRView;
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uint64_t TotalInstructions;
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uint64_t TotalInstructionsLength;
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uint64_t StartAddr;
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uint64_t Length;
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};
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[[nodiscard]]
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GenerateIRResult GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, bool ExtendedDebugInfo, uint64_t MaxInst);
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struct CompileCodeResult {
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void* CompiledCode;
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fextl::unique_ptr<FEXCore::Core::DebugData> DebugData;
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uint64_t StartAddr;
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uint64_t Length;
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};
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[[nodiscard]]
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CompileCodeResult CompileCode(FEXCore::Core::InternalThreadState* Thread, uint64_t GuestRIP, uint64_t MaxInst = 0);
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uintptr_t CompileBlock(FEXCore::Core::CpuStateFrame* Frame, uint64_t GuestRIP, uint64_t MaxInst = 0);
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uintptr_t CompileSingleStep(FEXCore::Core::CpuStateFrame* Frame, uint64_t GuestRIP);
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IR::OpSize GetGPROpSize() const {
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return Config.Is64BitMode ? IR::OpSize::i64Bit : IR::OpSize::i32Bit;
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}
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FEXCore::JITSymbols Symbols;
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FEXCore::Utils::PooledAllocatorVirtual OpDispatcherAllocator;
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FEXCore::Utils::PooledAllocatorVirtual FrontendAllocator;
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FEXCore::Utils::PooledAllocatorVirtual CPUBackendAllocator;
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// If Atomic-based TSO emulation is enabled or not.
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bool IsAtomicTSOEnabled() const {
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return AtomicTSOEmulationEnabled;
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}
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// If atomic-based TSO emulation is enabled for vector operations.
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bool IsVectorAtomicTSOEnabled() const {
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return VectorAtomicTSOEmulationEnabled;
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}
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// If atomic-based TSO emulation is enabled for memcpy operations.
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bool IsMemcpyAtomicTSOEnabled() const {
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return MemcpyAtomicTSOEmulationEnabled;
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}
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void SetHardwareTSOSupport(bool HardwareTSOSupported) override {
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SupportsHardwareTSO = HardwareTSOSupported;
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UpdateAtomicTSOEmulationConfig();
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}
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void EnableExitOnHLT() override {
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ExitOnHLT = true;
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}
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bool ExitOnHLTEnabled() const {
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return ExitOnHLT;
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}
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protected:
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void UpdateAtomicTSOEmulationConfig() {
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if (SupportsHardwareTSO) {
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// If the hardware supports TSO then we don't need to emulate it through atomics.
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AtomicTSOEmulationEnabled = false;
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VectorAtomicTSOEmulationEnabled = false;
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MemcpyAtomicTSOEmulationEnabled = false;
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} else if (Config.ParanoidTSO) {
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AtomicTSOEmulationEnabled = true;
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VectorAtomicTSOEmulationEnabled = true;
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MemcpyAtomicTSOEmulationEnabled = true;
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} else {
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// Atomic TSO emulation only enabled if the config option is enabled.
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AtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled;
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// Atomic vector TSO emulation only enabled if TSO emulation is enabled and also vector TSO is enabled.
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VectorAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.VectorTSOEnabled;
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// Atomic memcpy TSO emulation only enabled if TSO emulation is enabled and also memcpy TSO is enabled.
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MemcpyAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.MemcpySetTSOEnabled;
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}
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}
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private:
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/**
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* @brief Initializes the JIT compilers for the thread
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*
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* @param State The internal FEX thread state object
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*
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* InitializeCompiler is called inside of CreateThread, so you likely don't need this
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*/
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void InitializeCompiler(FEXCore::Core::InternalThreadState* Thread);
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IR::AOTIRCaptureCache IRCaptureCache;
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fextl::unique_ptr<FEXCore::CodeSerialize::CodeObjectSerializeService> CodeObjectCacheService;
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bool IsMemoryShared = false;
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bool SupportsHardwareTSO = false;
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bool AtomicTSOEmulationEnabled = true;
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bool VectorAtomicTSOEmulationEnabled = false;
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bool MemcpyAtomicTSOEmulationEnabled = false;
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bool ExitOnHLT = false;
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FEX_CONFIG_OPT(AppFilename, APP_FILENAME);
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std::shared_mutex CustomIRMutex;
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std::atomic<bool> HasCustomIRHandlers {};
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fextl::unordered_map<uint64_t, std::tuple<CustomIREntrypointHandler, void*, void*>> CustomIRHandlers;
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IntervalList<uint64_t> ForceTSOValidRanges; // The ranges for which ForceTSOInstructions has populated data
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fextl::set<uint64_t> ForceTSOInstructions;
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};
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} // namespace FEXCore::Context
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