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Folds reg+const memory address into addressing mode, if the constant is within 16Kb. Update instcountci files. Add test 32Bit_ASM/FEX_bugs/SubAddrBug.asm
43 lines
1.4 KiB
C++
43 lines
1.4 KiB
C++
// SPDX-License-Identifier: MIT
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#pragma once
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#include <FEXCore/fextl/memory.h>
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namespace FEXCore {
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class CPUIDEmu;
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}
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namespace FEXCore::Utils {
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class IntrusivePooledAllocator;
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}
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namespace FEXCore::IR {
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class Pass;
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class RegisterAllocationPass;
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class RegisterAllocationData;
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fextl::unique_ptr<FEXCore::IR::Pass>
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CreateConstProp(bool InlineConstants, bool SupportsTSOImm9, bool Is64BitMode);
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fextl::unique_ptr<FEXCore::IR::Pass> CreateContextLoadStoreElimination(bool SupportsAVX);
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fextl::unique_ptr<FEXCore::IR::Pass> CreateInlineCallOptimization(const FEXCore::CPUIDEmu* CPUID);
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fextl::unique_ptr<FEXCore::IR::Pass> CreateDeadFlagCalculationEliminination();
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fextl::unique_ptr<FEXCore::IR::Pass> CreateDeadStoreElimination(bool SupportsAVX);
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fextl::unique_ptr<FEXCore::IR::Pass> CreatePassDeadCodeElimination();
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fextl::unique_ptr<FEXCore::IR::Pass> CreateIRCompaction(FEXCore::Utils::IntrusivePooledAllocator &Allocator);
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fextl::unique_ptr<FEXCore::IR::RegisterAllocationPass>
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CreateRegisterAllocationPass(FEXCore::IR::Pass *CompactionPass,
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bool SupportsAVX);
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fextl::unique_ptr<FEXCore::IR::Pass> CreateLongDivideEliminationPass();
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namespace Validation {
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fextl::unique_ptr<FEXCore::IR::Pass> CreateIRValidation();
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fextl::unique_ptr<FEXCore::IR::Pass> CreateRAValidation();
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fextl::unique_ptr<FEXCore::IR::Pass> CreateValueDominanceValidation();
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}
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namespace Debug {
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fextl::unique_ptr<FEXCore::IR::Pass> CreateIRDumper();
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}
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}
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